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/cmsis-dsp-latest/PythonWrapper/examples/
Dtestdistance.py3 import scipy.spatial.distance as d namespace
14 return(1.0*(ctf + cft - ctt+n)/(cft + ctf + n))
17 print("\nBray-Curtis")
18 ref=d.braycurtis(a,b)
22 assert_allclose(ref,res,1e-6)
26 ref=d.canberra(a,b)
30 assert_allclose(ref,res,1e-6)
33 ref=d.chebyshev(a,b)
37 assert_allclose(ref,res,1e-6)
41 assert_allclose(ref,res,1e-10)
[all …]
Dexample_1_9.py38 ds_state = np.zeros(block_size + len(downsamplingFilter)-1)
61 stateQ31 = np.zeros(block_size + len(downsamplingFilter)-1)
72 stateQ31 = np.zeros(block_size + len(downsamplingFilter)-1)
84 stateQ15 = np.zeros(block_size + len(downsamplingFilter)-1)
93 assert_allclose(ref,outputF32,rtol=2e-3,atol=1e-3)
99 stateQ15 = np.zeros(block_size + len(downsamplingFilter)-1)
108 assert_allclose(ref,outputF32,rtol=2e-3,atol=1e-3)
123 state = np.zeros(block_size + len(upsamplingFilter)//upsamplingFactor-1)
131 #plt.plot(t,wave,t[:-11],output[11:])
134 d = 11 variable
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/cmsis-dsp-latest/Testing/TestScripts/doc/
DFormat.py22 CORTEXCATEGORIES=["Cortex-M","Cortex-R","Cortex-A"]
23 CORECATEGORIES={"Cortex-M":["m0","m4", "m7", "m33" , "m55 scalar", "m55 mve","m55 autovec"],
24 "Cortex-R":["r8","r52"],
25 "Cortex-A":["a32"]
60 sepStr="".join(joinit([":-:" for x in cols],"|"))
84 self._id = self._id - 1
103 margin-top:5px;
104 margin-bottom:10px;
108 font-size: 16px;
112 background-color: #E5ECEB;
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/cmsis-dsp-latest/Testing/FrameworkSource/
DFPGA.cpp1 /* ----------------------------------------------------------------------
13 * Target Processor: Cortex-M cores
14 * -------------------------------------------------------------------- */
16 * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
18 * SPDX-License-Identifier: Apache-2.0
24 * www.apache.org/licenses/LICENSE-2.0
59 this->m_testDesc=testDesc; in FPGA()
60 this->m_patterns=patterns; in FPGA()
62 this->currentDesc=testDesc; in FPGA()
63 this->path=new std::vector<std::string>(); in FPGA()
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/cmsis-dsp-latest/Testing/PatternGeneration/
DMatrix.py42 d=np.diagonal(ma)
43 j = np.argmax(d[k:]) + k
52 if abs(alpha) < 1.0e-18:
58 v = v.reshape((n-k-1,1))
60 ma[k+1:,k+1:] = ma[k+1:,k+1:] - np.matmul(v , np.transpose(v)) / alpha
72 d=np.diag(np.diagonal(ma))
74 return(ll,d,piv)
77 def valid(src,ll,d,piv): argument
84 t = np.matmul(ll,np.matmul(d,np.transpose(ll)))
85 r = a - t
[all …]
DTools.py75 d = (c[i,0] << 24) | (c[i,1] << 16) | (c[i,2] << 8) | c[i,3]
76 result.append(np.uint32(d))
113 return hex(struct.unpack('<Q', struct.pack('<d', f))[0])
119 if (r < -0x08000000000000000):
120 r = -0x08000000000000000
127 if (r < -0x080000000):
128 r = -0x080000000
135 if (r < -0x08000):
136 r = -0x08000
143 if (r < -0x080):
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/cmsis-dsp-latest/Source/ComplexMathFunctions/
Darm_cmplx_mult_cmplx_f16.c1 /* ----------------------------------------------------------------------
4 * Description: Floating-point complex-by-complex multiplication
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
45 @brief Floating-point complex-by-complex multiplication.
66 blkCnt -= 1; in arm_cmplx_mult_cmplx_f16()
97 blkCnt--; in arm_cmplx_mult_cmplx_f16()
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Darm_cmplx_mult_cmplx_q31.c1 /* ----------------------------------------------------------------------
4 * Description: Q31 complex-by-complex multiplication
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
41 @brief Q31 complex-by-complex multiplication.
65 blkCnt -= 1; in arm_cmplx_mult_cmplx_q31()
75 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ in arm_cmplx_mult_cmplx_q31()
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Darm_cmplx_mult_cmplx_q15.c1 /* ----------------------------------------------------------------------
4 * Description: Q15 complex-by-complex multiplication
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
41 @brief Q15 complex-by-complex multiplication.
65 blkCnt -= 1; in arm_cmplx_mult_cmplx_q15()
77 /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1]. */ in arm_cmplx_mult_cmplx_q15()
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Darm_cmplx_mult_cmplx_f32.c1 /* ----------------------------------------------------------------------
4 * Description: Floating-point complex-by-complex multiplication
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
36 @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
49 pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
54 There are separate functions for floating-point, Q15, and Q31 data types.
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/cmsis-dsp-latest/Testing/
DprocessResult.py45 return("Unknown error %d" % id)
68 c = c[n-1]
94 print(Style.BRIGHT + ("%s%s : %s (%d)" % (ident,kind,message,theId)) + Style.RESET_ALL)
106 …print("%s%s %s(%s - %d)%s : %s (cycles = %d)" % (ident,message,Style.BRIGHT,func,theId,Style.RESET…
108 … print("%s%s %s(%s - %d)%s : %s" % (ident,message,Style.BRIGHT,func,theId,Style.RESET_ALL,p))
112 … print(Fore.RED + ("%s %s at line %d" % (ident, errorStr(theError), theLine)) + Style.RESET_ALL)
144 print("<h%d> %s (%d) </h%d>" % (self.nb,message,theId,self.nb))
147 print("<h%d> %s (%d) </h%d>" % (self.nb,message,theId,self.nb))
149 print("<h%d> %s (%d) </h%d>" % (3,message,theId,self.nb))
175 print("<td>%d</td>" % theId)
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DprocessTests.py4 import TestScripts.Deprecate as d namespace
8 parser.add_argument('-f', nargs='?',type = str, default="Output.pickle", help="Pickle path")
10 parser.add_argument('-p', nargs='?',type = str, default="Patterns", help="Pattern dir path")
11 parser.add_argument('-d', nargs='?',type = str, default="Parameters", help="Parameter dir path")
12 parser.add_argument('-gen', nargs='?',type = str, default=".", help="Folder for generated C sources…
14 # -e true when no semihosting
18 parser.add_argument('-e', action='store_true', help="Embedded test")
20 parser.add_argument('-b', action='store_true', help="Benchmark mode to use different generated fold…
31 c = TestScripts.CodeGen.CodeGen(args.p,args.d, args.e)
35 d.deprecate(root,args.others)
/cmsis-dsp-latest/Testing/TestScripts/
DNewParser.py25 d={}
27 d["class"]=toks["class"]
29 d["folder"]=toks["folder"]
30 return(d)
33 d={}
36 d["message"]=toks["message"]
38 d["class"] = toks["desc"]["class"]
41 d["deprecated"] = False
43 d["deprecated"] = True
46 d["PARAMID"] = toks["PARAMID"]
[all …]
DParser.py53 a = str("%s -> %s%s(%d)\n" % (g,' ' * self.ident, str(self.data),self.id))
72 d = {}
77 d["deprecated"] = False
82 d["message"] = data[0].strip()
85 d["class"] = data[1].strip()
88 d["deprecated"] = True
96 self._data = d
102 def writeData(self,d): argument
103 self._data=d
198 def reident(self,current,d=2): argument
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DCodeGen.py29 if value & (1 << (bits-1)):
30 value -= 1 << bits
96 varInit += (",%s(%d)\n" % (theMemberVar,theMemberId))
104 testInit += "this->addContainer(NULL);"
108 testInit += "this->addContainer(&%s);\n" % (theMemberVar)
153 … testInit += "this->addTest(%d,(Client::test)&%s::%s);\n" % (theId,theClass,theTestName)
177 newId = "static const int %s=%d;\n" % (p[0],i)
186 newId = "static const int %s=%d;\n" % (p[0],i)
201 defTestID = "static const int %s_%d=%d;\n" % (theTestName.upper(),theId,theId)
370 textFile.write("%d\n" % len(root.params.full))
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/cmsis-dsp-latest/Source/MatrixFunctions/
Darm_mat_ldlt_f32.c1 /* ----------------------------------------------------------------------
4 * Description: Floating-point LDL decomposition
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
46 * @brief Floating-point LDL^t decomposition of positive semi-definite matrix.
47 * @param[in] pSrc points to the instance of the input floating-point matrix structure.
48 …* @param[out] pl points to the instance of the output floating-point triangular matrix structure.
[all …]
Darm_mat_ldlt_f64.c1 /* ----------------------------------------------------------------------
4 * Description: Floating-point LDL decomposition
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
45 * @brief Floating-point LDL^t decomposition of positive semi-definite matrix.
46 * @param[in] pSrc points to the instance of the input floating-point matrix structure.
47 …* @param[out] pl points to the instance of the output floating-point triangular matrix structure.
[all …]
/cmsis-dsp-latest/Scripts/
DgenMVETwiddleCoefs.py20 parser.add_argument('-f', nargs='?',type = str, default="../Source/CommonTables/arm_mve_tables.c", …
21 parser.add_argument('-f16', nargs='?',type = str, default="../Source/CommonTables/arm_mve_tables_f1…
22 parser.add_argument('-he', nargs='?',type = str, default="../Include/arm_mve_tables.h", help="H Fil…
23 parser.add_argument('-he16', nargs='?',type = str, default="../Include/arm_mve_tables_f16.h", help=…
29 …ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_%s_%d) || defined(ARM_TABLE_TWIDDLECOEF_%s_%d)
40 print("const uint32_t %s[%d]={" % (name,len(arr)),file=f)
42 for d in arr:
43 val = "%d," % d
54 print("const float32_t %s[%d]={" % (name,len(arr)),file=f)
56 for d in arr:
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/cmsis-dsp-latest/Testing/DebugScripts/
Ddebug.py8 import PatternGeneration.DebugTools as d namespace
13 parser.add_argument('-f', nargs='?',type = str, default="f32", help="Format")
14 parser.add_argument('-n', nargs='?',type = str, default="1", help="Test number")
15 parser.add_argument('-i', nargs='?',type = bool, default=False, help="Ifft")
16 parser.add_argument('-ui', nargs='?',const=True,type = bool, default=False, help="Display curves")
26 n = int(args.n) - 18
27 s = FFTSIZES[n-1]
28 sc = n - 1 + 4
33 s = FFTSIZES[int(args.n)-1]
42 inSig = d.readF32Pattern(inputPath)
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Ddebugbiquad.py16 import PatternGeneration.DebugTools as d namespace
27 inSig = d.readF16Pattern(inputPath)
29 refSig = d.readF16Pattern(refPath)
31 sig = d.readF16Output(outputPath)
41 #print(d.SNR(refSig,sig))
48 #plot(np.unwrap(np.angle(sig)) - np.unwrap(np.angle(refSig)))
/cmsis-dsp-latest/Source/TransformFunctions/
Darm_cfft_f16.c1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
101 { ( 0 - 16) * (int32_t)sizeof(float16_t *) in _arm_radix4_butterfly_f16_mve()
102 , ( 4 - 16) * (int32_t)sizeof(float16_t *) in _arm_radix4_butterfly_f16_mve()
103 , ( 8 - 16) * (int32_t)sizeof(float16_t *) in _arm_radix4_butterfly_f16_mve()
104 , (12 - 16) * (int32_t)sizeof(float16_t *)}; in _arm_radix4_butterfly_f16_mve()
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Darm_cfft_q31.c1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
51 (0 - 16) * (int32_t)sizeof(q31_t *), (1 - 16) * (int32_t)sizeof(q31_t *), in _arm_radix4_butterfly_q31_mve()
52 (8 - 16) * (int32_t)sizeof(q31_t *), (9 - 16) * (int32_t)sizeof(q31_t *) in _arm_radix4_butterfly_q31_mve()
67 &S->rearranged_twiddle_stride2[ in _arm_radix4_butterfly_q31_mve()
68 S->rearranged_twiddle_tab_stride2_arr[stage]]; in _arm_radix4_butterfly_q31_mve()
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Darm_cfft_q15.c1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
49 (0 - 16) * (int32_t)sizeof(q15_t *), (4 - 16) * (int32_t)sizeof(q15_t *), in _arm_radix4_butterfly_q15_mve()
50 (8 - 16) * (int32_t)sizeof(q15_t *), (12 - 16) * (int32_t)sizeof(q15_t *) in _arm_radix4_butterfly_q15_mve()
64 &S->rearranged_twiddle_stride2[ in _arm_radix4_butterfly_q15_mve()
65 S->rearranged_twiddle_tab_stride2_arr[stage]]; in _arm_radix4_butterfly_q15_mve()
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/cmsis-dsp-latest/Testing/cmsis_build/
Drunall.py11 parser.add_argument('-avh', nargs='?',type = str, default="C:/Keil_v5/ARM/avh-fvp/bin/models", help…
12 parser.add_argument('-d', action='store_true', help="Debug log")
13 parser.add_argument('-n', action='store_true', help="No force rebuild")
14 parser.add_argument('-r', action='store_true', help="Raw results only")
15 parser.add_argument('-c', action='store_true', help="Display cycles (so passing test are displayed)…
16 parser.add_argument('-g', nargs='?',type = str,help="AC6 / CLANG / GCC")
17 parser.add_argument('-s', action='store_true', help="Take into account AVH error code")
28 if args.d:
129 "CS310":"FVP_Corstone_SSE-310_Ethos-U65",
130 "CS300":"FVP_Corstone_SSE-300_Ethos-U55",
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/cmsis-dsp-latest/Source/InterpolationFunctions/
Darm_spline_interp_init_f32.c1 /* ----------------------------------------------------------------------
4 * Description: Floating-point cubic spline initialization function
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
42 <code>coeffs</code> will contain the b, c, and d coefficients for the (n-1) intervals
43 (n is the number of known points), hence its size must be 3*(n-1); <code>tempBuffer</code>
44 is temporally used for internal computations and its size is n+n-1.
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