| /Zephyr-Core-3.6.0/drivers/interrupt_controller/ |
| D | Kconfig.shared_irq | 4 # SPDX-License-Identifier: Apache-2.0
7 bool "Shared interrupt driver"
11 Include shared interrupt support in system. Shared interrupt
15 int "Shared IRQ init priority"
19 Shared IRQ are initialized on POST_KERNEL init level. They
|
| D | intc_esp32.c | 4 * SPDX-License-Identifier: Apache-2.0
47 /* Typedef for C-callable interrupt handler function */
51 /* shared critical section context */
110 if (vd->cpu > to_insert->cpu) { in insert_vector_desc()
113 if (vd->cpu == to_insert->cpu && vd->intno >= to_insert->intno) { in insert_vector_desc()
117 vd = vd->next; in insert_vector_desc()
121 to_insert->next = vd; in insert_vector_desc()
124 prev->next = to_insert; in insert_vector_desc()
125 to_insert->next = vd; in insert_vector_desc()
135 if (vd->cpu == cpu && vd->intno == intno) { in find_desc_for_int()
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| /Zephyr-Core-3.6.0/boards/arm/lpcxpresso55s69/ |
| D | pinmux.c | 3 * SPDX-License-Identifier: Apache-2.0
19 * Flexcomm 6 and 7 are connected to codec on board, and shared signal in lpcxpresso_55s69_pinmux_init()
24 /* Set shared signal set 0 SCK, WS from Transmit I2S - Flexcomm 7 */ in lpcxpresso_55s69_pinmux_init()
25 SYSCTL->SHAREDCTRLSET[0] = SYSCTL_SHAREDCTRLSET_SHAREDSCKSEL(7) | in lpcxpresso_55s69_pinmux_init()
29 /* Select Data in from Transmit I2S - Flexcomm 7 */ in lpcxpresso_55s69_pinmux_init()
30 SYSCTL->SHAREDCTRLSET[0] |= SYSCTL_SHAREDCTRLSET_SHAREDDATASEL(7); in lpcxpresso_55s69_pinmux_init()
31 /* Enable Transmit I2S - Flexcomm 7 for Shared Data Out */ in lpcxpresso_55s69_pinmux_init()
32 SYSCTL->SHAREDCTRLSET[0] |= SYSCTL_SHAREDCTRLSET_FC7DATAOUTEN(1); in lpcxpresso_55s69_pinmux_init()
35 /* Set Receive I2S - Flexcomm 6 SCK, WS from shared signal set 0 */ in lpcxpresso_55s69_pinmux_init()
36 SYSCTL->FCCTRLSEL[6] = SYSCTL_FCCTRLSEL_SCKINSEL(1) | in lpcxpresso_55s69_pinmux_init()
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| /Zephyr-Core-3.6.0/samples/drivers/virtualization/ivshmem/doorbell/ |
| D | README.rst | 1 .. zephyr:code-sample:: ivshmem-doorbell
3 :relevant-api: ivshmem
5 Use Inter-VM Shared Memory to exchange messages between two processes running on different
20 ivshmem-server needs to be available and running. The server is available in
21 Zephyr SDK or pre-built in some distributions. Otherwise, it is available in
24 ivshmem-client needs to be available as it is employed in this sample as an
25 external application. The same conditions of ivshmem-server applies to the
26 ivshmem-server, as it is also available via QEMU.
31 Building ivshmem-doorbell is as follows:
36 .. zephyr-app-commands::
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| /Zephyr-Core-3.6.0/include/zephyr/multi_heap/ |
| D | shared_multi_heap.h | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Public API for Shared Multi-Heap framework
28 * @brief Shared Multi-Heap (SMH) interface
29 * @defgroup shared_multi_heap Shared multi-heap interface
33 * The shared multi-heap manager uses the multi-heap allocator to manage a set
35 * non-cacheable, etc...).
37 * All the different regions can be added at run-time to the shared multi-heap
44 * - At boot time some platform code initialize the shared multi-heap
49 * - Each memory region encoded in a @ref shared_multi_heap_region structure.
50 * This structure is also carrying an opaque and user-defined integer value
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| /Zephyr-Core-3.6.0/boards/arm/raytac_mdbt53_db_40_nrf5340/ |
| D | raytac_mdbt53_db_40_nrf5340_shared_sram_planning_conf.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Default shared SRAM planning when building for nRF5340.
10 * - 64 kB SRAM allocated as Shared memory (sram0_shared)
11 * - Region defined after the image SRAM of Application MCU
16 /* shared memory reserved for the inter-processor communication */
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 /* SRAM allocated to shared memory */
|
| /Zephyr-Core-3.6.0/boards/arm/nrf5340_audio_dk_nrf5340/ |
| D | nrf5340_audio_dk_nrf5340_shared_sram_planning_conf.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Default shared SRAM planning when building for nRF5340.
10 * - 64 kB SRAM allocated as Shared memory (sram0_shared)
11 * - Region defined after the image SRAM of Application MCU
16 /* shared memory reserved for the inter-processor communication */
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 /* SRAM allocated to shared memory */
|
| /Zephyr-Core-3.6.0/boards/arm/nrf5340dk_nrf5340/ |
| D | nrf5340_shared_sram_planning_conf.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Default shared SRAM planning when building for nRF5340.
10 * - 64 kB SRAM allocated as Shared memory (sram0_shared)
11 * - Region defined after the image SRAM of Application MCU
16 /* shared memory reserved for the inter-processor communication */
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 /* SRAM allocated to shared memory */
|
| /Zephyr-Core-3.6.0/boards/arm/pan1783/ |
| D | pan1783_shared_sram_planning_conf.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Default shared SRAM planning when building for PAN1783 EVB.
10 * - 64 kB SRAM allocated as Shared memory (sram0_shared)
11 * - Region defined after the image SRAM of Application MCU
16 /* shared memory reserved for the inter-processor communication */
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 /* SRAM allocated to shared memory */
|
| /Zephyr-Core-3.6.0/boards/arm/thingy53_nrf5340/ |
| D | thingy53_nrf5340_shared_sram_planning_conf.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Default shared SRAM planning when building for nRF5340.
10 * - 64 kB SRAM allocated as Shared memory (sram0_shared)
11 * - Region defined after the image SRAM of Application MCU
16 /* shared memory reserved for the inter-processor communication */
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 /* SRAM allocated to shared memory */
|
| /Zephyr-Core-3.6.0/boards/arm/raytac_mdbt53v_db_40_nrf5340/ |
| D | raytac_mdbt53v_db_40_nrf5340_shared_sram_planning_conf.dts | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Default shared SRAM planning when building for nRF5340.
10 * - 64 kB SRAM allocated as Shared memory (sram0_shared)
11 * - Region defined after the image SRAM of Application MCU
16 /* shared memory reserved for the inter-processor communication */
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 /* SRAM allocated to shared memory */
|
| /Zephyr-Core-3.6.0/drivers/gpio/ |
| D | gpio_lpc11u6x.c | 5 * SPDX-License-Identifier: Apache-2.0
76 * @brief Structure for resources and information shared between GPIO ports.
78 * This structure is included by all the per-port private configuration.
79 * It gathers all the resources and information shared between all the GPIO
93 const struct gpio_lpc11u6x_shared *shared; member
108 const struct gpio_lpc11u6x_config *config = port->config; in gpio_lpc11u6x_pin_configure()
110 (config->shared->gpio_base + LPC11U6X_GPIO_REGS); in gpio_lpc11u6x_pin_configure()
111 uint8_t port_num = config->port_num; in gpio_lpc11u6x_pin_configure()
115 if (pin >= config->ngpios) { in gpio_lpc11u6x_pin_configure()
116 return -EINVAL; in gpio_lpc11u6x_pin_configure()
[all …]
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| /Zephyr-Core-3.6.0/boards/arm/bl5340_dvk/ |
| D | bl5340_dvk_shared_sram_planning_conf.dtsi | 5 * SPDX-License-Identifier: Apache-2.0
8 /* Default shared SRAM planning when building for BL5340 DVK.
11 * - 64 kB SRAM allocated as Shared memory (sram0_shared)
12 * - Region defined after the image SRAM of Application MCU
17 /* shared memory reserved for the inter-processor communication */
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 /* SRAM allocated to shared memory */
|
| /Zephyr-Core-3.6.0/boards/arm/mimxrt685_evk/ |
| D | init.c | 3 * SPDX-License-Identifier: Apache-2.0
18 /* Set shared signal set 0 SCK, WS from Transmit I2S - Flexcomm3 */ in mimxrt685_evk_init()
19 SYSCTL1->SHAREDCTRLSET[0] = SYSCTL1_SHAREDCTRLSET_SHAREDSCKSEL(3) | in mimxrt685_evk_init()
23 /* Select Data in from Transmit I2S - Flexcomm 3 */ in mimxrt685_evk_init()
24 SYSCTL1->SHAREDCTRLSET[0] |= SYSCTL1_SHAREDCTRLSET_SHAREDDATASEL(3); in mimxrt685_evk_init()
25 /* Enable Transmit I2S - Flexcomm 3 for Shared Data Out */ in mimxrt685_evk_init()
26 SYSCTL1->SHAREDCTRLSET[0] |= SYSCTL1_SHAREDCTRLSET_FC3DATAOUTEN(1); in mimxrt685_evk_init()
29 /* Set Receive I2S - Flexcomm 1 SCK, WS from shared signal set 0 */ in mimxrt685_evk_init()
30 SYSCTL1->FCCTRLSEL[1] = SYSCTL1_FCCTRLSEL_SCKINSEL(1) | in mimxrt685_evk_init()
33 /* Set Transmit I2S - Flexcomm 3 SCK, WS from shared signal set 0 */ in mimxrt685_evk_init()
[all …]
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| /Zephyr-Core-3.6.0/doc/services/virtualization/ |
| D | ivshmem.rst | 3 Inter-VM Shared Memory
16 This is made possible by exposing a shared memory among parties via a feature
17 called ivshmem, which stands for inter-VM Shared Memory.
19 The two types are supported: a plain shared memory (ivshmem-plain) or a shared
21 thus to be interrupted as well itself (ivshmem-doorbell).
34 Because the doorbell version uses MSI-X vectors to support notification vectors,
41 ivshmem-v2
44 Zephyr also supports ivshmem-v2:
46 https://github.com/siemens/jailhouse/blob/master/Documentation/ivshmem-v2-specification.md
49 (e.g. :zephyr:code-sample:`eth-ivshmem`). It is also possible to use ivshmem-v2 without
|
| /Zephyr-Core-3.6.0/boards/arm/mimxrt1010_evk/ |
| D | mimxrt1010_evk.dts | 5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
11 #include "mimxrt1010_evk-pinctrl.dtsi"
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "NXP MIMXRT1010-EVK board";
28 zephyr,shell-uart = &lpuart1;
30 zephyr,flash-controller = &at25sf128a;
31 zephyr,code-partition = &slot0_partition;
35 compatible = "gpio-leds";
36 green_led: led-1 {
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| /Zephyr-Core-3.6.0/doc/kernel/memory_management/ |
| D | shared_multi_heap.rst | 3 Shared Multi Heap
6 The shared multi-heap memory pool manager uses the multi-heap allocator to
8 attributes (cacheable, non-cacheable, etc...).
10 All the different regions can be added at run-time to the shared multi-heap
16 1. At boot time some platform code initialize the shared multi-heap framework
22 structure. This structure is also carrying an opaque and user-defined
26 .. code-block:: c
28 // Init the shared multi-heap pool
50 // Add a non-cacheable region
67 .. code-block:: c
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| /Zephyr-Core-3.6.0/dts/bindings/interrupt-controller/ |
| D | shared-irq.yaml | 1 description: Shared IRQ interrupt dispatcher
3 compatible: "shared-irq"
5 include: [interrupt-controller.yaml, base.yaml]
|
| /Zephyr-Core-3.6.0/subsys/ipc/rpmsg_service/ |
| D | rpmsg_backend.h | 4 * SPDX-License-Identifier: Apache-2.0
23 #define SHM_SIZE (VDEV_SIZE - VDEV_STATUS_SIZE)
29 * @param io Shared memory IO region. This is an output parameter providing
30 * a pointer to an actual shared memory IO region structure.
32 * pointer to the shared memory IO region structure is stored.
|
| /Zephyr-Core-3.6.0/dts/arm/st/f1/ |
| D | stm32f103Xg.dtsi | 1 /* SPDX-License-Identifier: Apache-2.0
18 flash-controller@40022000 {
22 * This matters if you're doing in-application
24 * read-while-write capabilities, but is
25 * otherwise a non-issue.
28 erase-block-size = <DT_SIZE_K(2)>;
33 compatible = "st,stm32-timers";
37 /* Shared with TIM1_BRK */
43 compatible = "st,stm32-pwm";
45 #pwm-cells = <3>;
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| /Zephyr-Core-3.6.0/dts/bindings/ipm/ |
| D | espressif,esp32-ipm.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "espressif,esp32-ipm"
14 shared-memory:
18 shared-memory-size:
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| /Zephyr-Core-3.6.0/subsys/ipc/ipc_service/lib/ |
| D | Kconfig.icmsg | 2 # SPDX-License-Identifier: Apache-2.0
5 bool "Synchronize access to shared memory"
8 Provide synchronization access to shared memory at a library level.
56 from the system work queue. The queue is shared among instances.
60 default -1
61 range -256 -1
72 range -256 -1 if !IPC_SERVICE_BACKEND_ICMSG_WQ_ENABLE
78 with read/write semantics on top of a memory region shared by the
|
| /Zephyr-Core-3.6.0/include/zephyr/drivers/interrupt_controller/ |
| D | intc_esp32.h | 4 * SPDX-License-Identifier: Apache-2.0
17 * Interrupt allocation flags - These flags can be used to specify
30 #define ESP_INTR_FLAG_SHARED (1<<8) /* Interrupt can be shared between ISRs */
31 #define ESP_INTR_FLAG_EDGE (1<<9) /* Edge-triggered interrupt */
51 * pass these pseudo-sources to the functions.
53 #define ETS_INTERNAL_TIMER0_INTR_SOURCE -1 /* Xtensa timer 0 interrupt source */
54 #define ETS_INTERNAL_TIMER1_INTR_SOURCE -2 /* Xtensa timer 1 interrupt source */
55 #define ETS_INTERNAL_TIMER2_INTR_SOURCE -3 /* Xtensa timer 2 interrupt source */
56 #define ETS_INTERNAL_SW0_INTR_SOURCE -4 /* Software int source 1 */
57 #define ETS_INTERNAL_SW1_INTR_SOURCE -5 /* Software int source 2 */
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| /Zephyr-Core-3.6.0/drivers/ethernet/ |
| D | Kconfig.ivshmem | 4 # SPDX-License-Identifier: Apache-2.0
7 bool "Inter-VM shared memory Ethernet driver"
14 Enable Inter-VM Shared Memory Ethernet driver.
|
| /Zephyr-Core-3.6.0/samples/drivers/ipm/ipm_ivshmem/ |
| D | README.rst | 1 .. zephyr:code-sample:: ipm-ivshmem
3 :relevant-api: ipm_interface
5 Implement inter-processor mailbox (IPM) over IVSHMEM (Inter-VM shared memory)
12 ivshmem-server needs to be available and running. The server is available in
13 Zephyr SDK or pre-built in some distributions. Otherwise, it is available in
16 ivshmem-client needs to be available as it is employed in this sample as an
17 external application. The same conditions of ivshmem-server apply to the
18 ivshmem-server, as it is also available via QEMU.
22 #. The ivshmem-server utility for QEMU can be found into the Zephyr SDK
24 ``/path/to/your/zephyr-sdk/zephyr-<version>/sysroots/x86_64-pokysdk-linux/usr/xilinx/bin/``
[all …]
|
