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/hal_intel-latest/.github/workflows/
Dsedi_docs_update.yml7 permissions: read-all
11 runs-on: ubuntu-22.04
18 - name: Checkout Code
21 - name: Git Prepare
24 git config --global user.email "intel_hal@intel.github.com"
25 git config --global user.name "Intel HAL Docs Robot"
28 - name: Install Doxygen Tools
30 sudo apt-get update
31 sudo apt-get install -y graphviz doxygen
33 - name: Run Doxygen
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Diut_zephyr_build.yml7 - cron: '0 20 * * 2,6'
9 permissions: read-all
13 runs-on: ubuntu-22.04
15 image: ghcr.io/zephyrproject-rtos/ci:v0.26.4
17 ZEPHYR_SDK_INSTALL_DIR: /opt/toolchains/zephyr-sdk-0.16.1
20 - name: Apply container owner mismatch workaround
26 git config --global --add safe.directory ${GITHUB_WORKSPACE}
28 - name: Checkout Zephyr
32 - name: Checkout Intel HAL
37 - name: Build IUT Test for ISH 5.4.1
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/hal_intel-latest/bsp_sedi/soc/intel_ish/pm/
Dish_pm.c4 * SPDX-License-Identifier: BSD-3-Clause
85 * ISH PMU does not support both-edge interrupt triggered gpio configuration.
92 * triggered by both-edge, and temporarily set each gpio pin to the single
94 * After exiting LPM, then restore the both-edge trigger configuration.
170 stat->total_time_us += t1 - t0; in log_pm_stat()
171 stat->count++; in log_pm_stat()
180 * add new entry in GDT
191 struct gdt_entry *__gdt = (struct gdt_entry *)(gdt_ptr->entries); in add_gdt_entry()
197 index = (gdt_ptr->limit + 1) >> 3; in add_gdt_entry()
199 /* add the new entry descriptor to the GDT */ in add_gdt_entry()
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/hal_intel-latest/docs/
Dbsp_sedi_doxyfile16 #---------------------------------------------------------------------------
18 #---------------------------------------------------------------------------
21 # file that follow. The default is UTF-8 which is also the encoding used for all
25 # The default value is: UTF-8.
27 DOXYFILE_ENCODING = UTF-8
30 # double-quotes, unless you are using Doxywizard) that should identify the
63 # If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
73 # If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII
74 # characters to appear in the names of generated files. If set to NO, non-ASCII
85 # Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
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/hal_intel-latest/bsp_sedi/include/driver/
Dsedi_driver_i2c.h4 * SPDX-License-Identifier: BSD-3-Clause
73 /*----- I2C Bus Speed -----*/
119 * \brief 10-bit address flag
254 uint32_t address_10_bit : 1; /**< supports 10-bit addressing */
353 * \param[in] addr: slave address (7-bit or 10-bit)
368 * \param[in] addr: slave address (7-bit or 10-bit)
383 * \param[in] addr: slave address (7-bit or 10-bit)
400 * \note As the DW I2C needs 2 channels to do RX DMA operation, need to add
403 * \param[in] addr: slave address(7-bit or 10-bit)
422 * \param[in] addr: slave address (7-bit or 10-bit)
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/hal_intel-latest/bsp_sedi/drivers/spi/
Dsedi_spi_dw_apb.c2 * Copyright (c) 2023 - 2024 Intel Corporation
4 * SPDX-License-Identifier: BSD-3-Clause
34 /* Add easy usage for SSI Clock Divider */
168 if (SEDI_PREG_RBFV_GET(SPI, SSIENR, SSI_EN, &spi->ssienr) == val) { in lld_spi_enable()
172 spi->imr = 0; in lld_spi_enable()
174 SEDI_PREG_RBF_SET(SPI, SSIENR, SSI_EN, val, &spi->ssienr); in lld_spi_enable()
176 SEDI_SPI_POLL_WAIT(SEDI_PREG_RBFV_GET(SPI, SSIENR, SSI_EN, &spi->ssienr) != val); in lld_spi_enable()
182 SEDI_PREG_RBFV_SET(SPI, DMACR, TDMAE, ENABLED, &spi->dmacr); in lld_spi_dma_enable()
183 SEDI_PREG_RBFV_SET(SPI, DMACR, RDMAE, ENABLED, &spi->dmacr); in lld_spi_dma_enable()
185 SEDI_PREG_RBFV_SET(SPI, DMACR, TDMAE, DISABLE, &spi->dmacr); in lld_spi_dma_enable()
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/hal_intel-latest/bsp_sedi/drivers/dma/
Dsedi_dma_ann_1p0.c2 * Copyright (c) 2023-2024 Intel Corporation
4 * SPDX-License-Identifier: BSD-3-Clause
140 config->tf_mode = DMA_TYPE_MAX; in dma_set_default_channel_config()
141 config->sr_mem_type = DMA_SRAM_MEM; in dma_set_default_channel_config()
142 config->dt_mem_type = DMA_SRAM_MEM; in dma_set_default_channel_config()
143 config->sr_msb = 0; in dma_set_default_channel_config()
144 config->dt_msb = 0; in dma_set_default_channel_config()
145 config->burst_length = DMA_BURST_TRANS_LENGTH_MAX; in dma_set_default_channel_config()
146 config->sr_width = DMA_TRANS_WIDTH_MAX; in dma_set_default_channel_config()
147 config->dt_width = DMA_TRANS_WIDTH_MAX; in dma_set_default_channel_config()
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