1/*
2 * Copyright (c) 2020 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <xtensa/coreasm.h>
8#include <xtensa/corebits.h>
9#include <xtensa/config/system.h>
10#include <xtensa/hal.h>
11#include <xtensa-asm2-context.h>
12
13	.section    .iram1, "ax"
14	.align      4
15	.global     z_xtensa_backtrace_get_start
16	.type       z_xtensa_backtrace_get_start, @function
17z_xtensa_backtrace_get_start:
18	entry   a1, 32
19	/* Spill registers onto stack (excluding this function) */
20	call8   xthal_window_spill
21	/* a2, a3, a4 should be out arguments for i PC, i SP, i-1 PC respectively.
22	* Use a6 and a7 as scratch */
23
24	/* Load address for interrupted stack */
25	l32i    a6, a5, 0
26	/* Load i PC in a7 */
27	l32i    a7, a6, BSA_PC_OFF
28	/* Store value of i PC in a2 */
29	s32i    a7, a2, 0
30	/* Load value for (i-1) PC, which return address of i into a7 */
31	l32i    a7, a6, BSA_A0_OFF
32	/* Store value of (i-1) PC in a4 */
33	s32i    a7, a4, 0
34	/* Add BASE_SAVE_AREA_SIZE in interrupted stack to get i SP */
35	addi    a6, a6, BASE_SAVE_AREA_SIZE
36	/* Store i SP in a3 */
37	s32i    a6, a3, 0
38	retw
39