1/*
2 * Copyright (c) 2020 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <xtensa/coreasm.h>
8#include <xtensa/corebits.h>
9#include <xtensa/config/system.h>
10#include <xtensa/hal.h>
11#include <xtensa_asm2_context.h>
12
13#include <zephyr/offsets.h>
14
15	.section    .iram1, "ax"
16	.align      4
17	.global     xtensa_backtrace_get_start
18	.type       xtensa_backtrace_get_start, @function
19xtensa_backtrace_get_start:
20	entry   a1, 32
21	/* Spill registers onto stack (excluding this function) */
22	call8   xthal_window_spill
23	/* a2, a3, a4 should be out arguments for i PC, i SP, i-1 PC respectively.
24	* Use a6 and a7 as scratch */
25
26	/* Load address for interrupted stack */
27	l32i    a6, a5, 0
28	/* Load i PC in a7 */
29	l32i    a7, a6, ___xtensa_irq_bsa_t_pc_OFFSET
30	/* Store value of i PC in a2 */
31	s32i    a7, a2, 0
32	/* Load value for (i-1) PC, which return address of i into a7 */
33	l32i    a7, a6, ___xtensa_irq_bsa_t_a0_OFFSET
34	/* Store value of (i-1) PC in a4 */
35	s32i    a7, a4, 0
36	/* Add base stack frame size in interrupted stack to get i SP */
37	addi    a6, a6, ___xtensa_irq_bsa_t_SIZEOF
38	/* Store i SP in a3 */
39	s32i    a6, a3, 0
40	retw
41