1 
2 /*
3  * Copyright (c) 2015-2019 Cadence Design Systems, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sublicense, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included
14  * in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
19  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
20  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23  */
24 
25 /*
26  * Xtensa-specific interrupt and exception functions for RTOS ports.
27  * Also see xtensa_intr_asm.S.
28  */
29 
30 #include <stdlib.h>
31 
32 #include <xtensa/config/core.h>
33 #include "esp_attr.h"
34 #include "xtensa/xtensa_api.h"
35 #include "sdkconfig.h"
36 #include "esp_rom_sys.h"
37 
38 /*
39  * When compiling for G0-only, we don't have FreeRTOS component.
40  * In fact, FreeRTOS component is only used for the core configuration, so
41  * the macro portNUM_PROCESSORS and the macro/function xPortGetCoreID need to
42  * be defined.
43  */
44 #if __has_include("freertos/FreeRTOS.h")
45     #include "freertos/FreeRTOS.h"
46     #include "freertos/portable.h"
47 #else
48     _Static_assert(portNUM_PROCESSORS == 1, "G0-only Xtensa builds can only be compiled in single-core mode");
49     #define xPortGetCoreID()    0
50 #endif
51 
52 #if XCHAL_HAVE_EXCEPTIONS
53 
54 /* Handler table is in xtensa_intr_asm.S */
55 
56 extern xt_exc_handler _xt_exception_table[];
57 
58 
59 /*
60   Default handler for unhandled exceptions.
61   CHANGED: We do this in panic.c now
62 */
63 
64 //void xt_unhandled_exception(XtExcFrame *frame)
65 //{
66     //exit(-1);
67 //}
68 extern void xt_unhandled_exception(XtExcFrame *frame);
69 
70 
71 /*
72   This function registers a handler for the specified exception.
73   The function returns the address of the previous handler.
74   On error, it returns 0.
75 */
xt_set_exception_handler(int n,xt_exc_handler f)76 xt_exc_handler xt_set_exception_handler(int n, xt_exc_handler f)
77 {
78     xt_exc_handler old;
79 
80     if( n < 0 || n >= XCHAL_EXCCAUSE_NUM )
81         return 0;       /* invalid exception number */
82 
83     /* Convert exception number to _xt_exception_table name */
84     n = n * portNUM_PROCESSORS + xPortGetCoreID();
85     old = _xt_exception_table[n];
86 
87     if (f) {
88         _xt_exception_table[n] = f;
89     }
90     else {
91         _xt_exception_table[n] = &xt_unhandled_exception;
92     }
93 
94     return ((old == &xt_unhandled_exception) ? 0 : old);
95 }
96 
97 #endif
98 
99 #if XCHAL_HAVE_INTERRUPTS
100 
101 /* Handler table is in xtensa_intr_asm.S */
102 
103 typedef struct xt_handler_table_entry {
104     void * handler;
105     void * arg;
106 } xt_handler_table_entry;
107 
108 extern xt_handler_table_entry _xt_interrupt_table[XCHAL_NUM_INTERRUPTS*portNUM_PROCESSORS];
109 
110 
111 /*
112   Default handler for unhandled interrupts.
113 */
xt_unhandled_interrupt(void * arg)114 void IRAM_ATTR xt_unhandled_interrupt(void * arg)
115 {
116     esp_rom_printf("Unhandled interrupt %d on cpu %d!\n", (int)arg, xPortGetCoreID());
117 }
118 
119 //Returns true if handler for interrupt is not the default unhandled interrupt handler
xt_int_has_handler(int intr,int cpu)120 bool xt_int_has_handler(int intr, int cpu)
121 {
122     return (_xt_interrupt_table[intr*portNUM_PROCESSORS+cpu].handler != xt_unhandled_interrupt);
123 }
124 
125 /*
126   This function registers a handler for the specified interrupt. The "arg"
127   parameter specifies the argument to be passed to the handler when it is
128   invoked. The function returns the address of the previous handler.
129   On error, it returns 0.
130 */
xt_set_interrupt_handler(int n,xt_handler f,void * arg)131 xt_handler xt_set_interrupt_handler(int n, xt_handler f, void * arg)
132 {
133     xt_handler_table_entry * entry;
134     xt_handler               old;
135 
136     if( n < 0 || n >= XCHAL_NUM_INTERRUPTS )
137         return 0;       /* invalid interrupt number */
138     if( Xthal_intlevel[n] > XCHAL_EXCM_LEVEL )
139         return 0;       /* priority level too high to safely handle in C */
140 
141     /* Convert exception number to _xt_exception_table name */
142     n = n * portNUM_PROCESSORS + xPortGetCoreID();
143 
144     entry = _xt_interrupt_table + n;
145     old   = entry->handler;
146 
147     if (f) {
148         entry->handler = f;
149         entry->arg     = arg;
150     }
151     else {
152         entry->handler = &xt_unhandled_interrupt;
153         entry->arg     = (void*)n;
154     }
155 
156     return ((old == &xt_unhandled_interrupt) ? 0 : old);
157 }
158 
159 #if CONFIG_APPTRACE_SV_ENABLE
xt_get_interrupt_handler_arg(int n)160 void * xt_get_interrupt_handler_arg(int n)
161 {
162     xt_handler_table_entry * entry;
163 
164     if( n < 0 || n >= XCHAL_NUM_INTERRUPTS )
165         return 0;       /* invalid interrupt number */
166 
167     /* Convert exception number to _xt_exception_table name */
168     n = n * portNUM_PROCESSORS + xPortGetCoreID();
169 
170     entry = _xt_interrupt_table + n;
171     return entry->arg;
172 }
173 #endif
174 
175 #endif /* XCHAL_HAVE_INTERRUPTS */
176