1 // Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #include <stdint.h> 22 #include <stdbool.h> 23 #include "soc/soc_caps.h" 24 25 26 /** 27 * @brief UART port number, can be UART_NUM_0 ~ (UART_NUM_MAX -1). 28 */ 29 typedef int uart_port_t; 30 31 /** 32 * @brief UART mode selection 33 */ 34 typedef enum { 35 UART_MODE_UART = 0x00, /*!< mode: regular UART mode*/ 36 UART_MODE_RS485_HALF_DUPLEX = 0x01, /*!< mode: half duplex RS485 UART mode control by RTS pin */ 37 UART_MODE_IRDA = 0x02, /*!< mode: IRDA UART mode*/ 38 UART_MODE_RS485_COLLISION_DETECT = 0x03, /*!< mode: RS485 collision detection UART mode (used for test purposes)*/ 39 UART_MODE_RS485_APP_CTRL = 0x04, /*!< mode: application control RS485 UART mode (used for test purposes)*/ 40 } uart_mode_t; 41 42 /** 43 * @brief UART word length constants 44 */ 45 typedef enum { 46 UART_DATA_5_BITS = 0x0, /*!< word length: 5bits*/ 47 UART_DATA_6_BITS = 0x1, /*!< word length: 6bits*/ 48 UART_DATA_7_BITS = 0x2, /*!< word length: 7bits*/ 49 UART_DATA_8_BITS = 0x3, /*!< word length: 8bits*/ 50 UART_DATA_BITS_MAX = 0x4, 51 } uart_word_length_t; 52 53 /** 54 * @brief UART stop bits number 55 */ 56 typedef enum { 57 UART_STOP_BITS_1 = 0x1, /*!< stop bit: 1bit*/ 58 UART_STOP_BITS_1_5 = 0x2, /*!< stop bit: 1.5bits*/ 59 UART_STOP_BITS_2 = 0x3, /*!< stop bit: 2bits*/ 60 UART_STOP_BITS_MAX = 0x4, 61 } uart_stop_bits_t; 62 63 /** 64 * @brief UART parity constants 65 */ 66 typedef enum { 67 UART_PARITY_DISABLE = 0x0, /*!< Disable UART parity*/ 68 UART_PARITY_EVEN = 0x2, /*!< Enable UART even parity*/ 69 UART_PARITY_ODD = 0x3 /*!< Enable UART odd parity*/ 70 } uart_parity_t; 71 72 /** 73 * @brief UART hardware flow control modes 74 */ 75 typedef enum { 76 UART_HW_FLOWCTRL_DISABLE = 0x0, /*!< disable hardware flow control*/ 77 UART_HW_FLOWCTRL_RTS = 0x1, /*!< enable RX hardware flow control (rts)*/ 78 UART_HW_FLOWCTRL_CTS = 0x2, /*!< enable TX hardware flow control (cts)*/ 79 UART_HW_FLOWCTRL_CTS_RTS = 0x3, /*!< enable hardware flow control*/ 80 UART_HW_FLOWCTRL_MAX = 0x4, 81 } uart_hw_flowcontrol_t; 82 83 /** 84 * @brief UART signal bit map 85 */ 86 typedef enum { 87 UART_SIGNAL_INV_DISABLE = 0, /*!< Disable UART signal inverse*/ 88 UART_SIGNAL_IRDA_TX_INV = (0x1 << 0), /*!< inverse the UART irda_tx signal*/ 89 UART_SIGNAL_IRDA_RX_INV = (0x1 << 1), /*!< inverse the UART irda_rx signal*/ 90 UART_SIGNAL_RXD_INV = (0x1 << 2), /*!< inverse the UART rxd signal*/ 91 UART_SIGNAL_CTS_INV = (0x1 << 3), /*!< inverse the UART cts signal*/ 92 UART_SIGNAL_DSR_INV = (0x1 << 4), /*!< inverse the UART dsr signal*/ 93 UART_SIGNAL_TXD_INV = (0x1 << 5), /*!< inverse the UART txd signal*/ 94 UART_SIGNAL_RTS_INV = (0x1 << 6), /*!< inverse the UART rts signal*/ 95 UART_SIGNAL_DTR_INV = (0x1 << 7), /*!< inverse the UART dtr signal*/ 96 } uart_signal_inv_t; 97 98 /** 99 * @brief UART source clock 100 */ 101 typedef enum { 102 UART_SCLK_APB = 0x0, /*!< UART source clock from APB*/ 103 #if SOC_UART_SUPPORT_RTC_CLK 104 UART_SCLK_RTC = 0x1, /*!< UART source clock from RTC*/ 105 #endif 106 #if SOC_UART_SUPPORT_XTAL_CLK 107 UART_SCLK_XTAL = 0x2, /*!< UART source clock from XTAL*/ 108 #endif 109 #if SOC_UART_SUPPORT_REF_TICK 110 UART_SCLK_REF_TICK = 0x3, /*!< UART source clock from REF_TICK*/ 111 #endif 112 } uart_sclk_t; 113 114 /** 115 * @brief UART AT cmd char configuration parameters 116 * Note that this function may different on different chip. Please refer to the TRM at confirguration. 117 */ 118 typedef struct { 119 uint8_t cmd_char; /*!< UART AT cmd char*/ 120 uint8_t char_num; /*!< AT cmd char repeat number*/ 121 uint32_t gap_tout; /*!< gap time(in baud-rate) between AT cmd char*/ 122 uint32_t pre_idle; /*!< the idle time(in baud-rate) between the non AT char and first AT char*/ 123 uint32_t post_idle; /*!< the idle time(in baud-rate) between the last AT char and the none AT char*/ 124 } uart_at_cmd_t; 125 126 /** 127 * @brief UART software flow control configuration parameters 128 */ 129 typedef struct { 130 uint8_t xon_char; /*!< Xon flow control char*/ 131 uint8_t xoff_char; /*!< Xoff flow control char*/ 132 uint8_t xon_thrd; /*!< If the software flow control is enabled and the data amount in rxfifo is less than xon_thrd, an xon_char will be sent*/ 133 uint8_t xoff_thrd; /*!< If the software flow control is enabled and the data amount in rxfifo is more than xoff_thrd, an xoff_char will be sent*/ 134 } uart_sw_flowctrl_t; 135 136 /** 137 * @brief UART configuration parameters for uart_param_config function 138 */ 139 typedef struct { 140 int baud_rate; /*!< UART baud rate*/ 141 uart_word_length_t data_bits; /*!< UART byte size*/ 142 uart_parity_t parity; /*!< UART parity mode*/ 143 uart_stop_bits_t stop_bits; /*!< UART stop bits*/ 144 uart_hw_flowcontrol_t flow_ctrl; /*!< UART HW flow control mode (cts/rts)*/ 145 uint8_t rx_flow_ctrl_thresh; /*!< UART HW RTS threshold*/ 146 union { 147 uart_sclk_t source_clk; /*!< UART source clock selection */ 148 bool use_ref_tick __attribute__((deprecated)); /*!< Deprecated method to select ref tick clock source, set source_clk field instead */ 149 }; 150 } uart_config_t; 151 152 #ifdef __cplusplus 153 } 154 #endif 155
