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/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h693 #define ADC_VERID_RES(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_RES_SHIF… argument
700 #define ADC_VERID_DIFFEN(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_DIFFEN_S… argument
707 #define ADC_VERID_MVI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_MVI_SHIF… argument
715 #define ADC_VERID_CSW(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_CSW_SHIF… argument
722 #define ADC_VERID_VR1RNGI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_VR1RNGI_… argument
729 #define ADC_VERID_IADCKI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_IADCKI_S… argument
736 #define ADC_VERID_CALOFSI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_CALOFSI_… argument
739 #define ADC_VERID_MINOR(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_MINOR_SH… argument
742 #define ADC_VERID_MAJOR(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_MAJOR_SH… argument
749 #define ADC_PARAM_TRIG_NUM(x) (((uint32_t)(((uint32_t)(x)) << ADC_PARAM_TRIG_NUM… argument
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DRV32M1_zero_riscy.h664 #define ADC_VERID_RES(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_RES_SHIF… argument
671 #define ADC_VERID_DIFFEN(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_DIFFEN_S… argument
678 #define ADC_VERID_MVI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_MVI_SHIF… argument
686 #define ADC_VERID_CSW(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_CSW_SHIF… argument
693 #define ADC_VERID_VR1RNGI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_VR1RNGI_… argument
700 #define ADC_VERID_IADCKI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_IADCKI_S… argument
707 #define ADC_VERID_CALOFSI(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_CALOFSI_… argument
710 #define ADC_VERID_MINOR(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_MINOR_SH… argument
713 #define ADC_VERID_MAJOR(x) (((uint32_t)(((uint32_t)(x)) << ADC_VERID_MAJOR_SH… argument
720 #define ADC_PARAM_TRIG_NUM(x) (((uint32_t)(((uint32_t)(x)) << ADC_PARAM_TRIG_NUM… argument
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DRV32M1_zero_riscy_features.h729 #define FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1) argument
731 #define FSL_FEATURE_LPI2C_FIFO_SIZEn(x) (4) argument
747 #define FSL_FEATURE_LPSPI_FIFO_SIZEn(x) (4) argument
749 #define FSL_FEATURE_LPSPI_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1) argument
793 #define FSL_FEATURE_LPUART_FIFO_SIZEn(x) (8) argument
819 #define FSL_FEATURE_LPUART_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1) argument
1419 #define FSL_FEATURE_TPM_CHANNEL_COUNTn(x) \ argument
1441 #define FSL_FEATURE_TPM_COMBINE_HAS_EFFECTn(x) (1) argument
1447 #define FSL_FEATURE_TPM_FILTER_HAS_EFFECTn(x) (1) argument
1451 #define FSL_FEATURE_TPM_QDCTRL_HAS_EFFECTn(x) (1) argument
DRV32M1_ri5cy_features.h723 #define FSL_FEATURE_LPI2C_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1) argument
725 #define FSL_FEATURE_LPI2C_FIFO_SIZEn(x) (4) argument
741 #define FSL_FEATURE_LPSPI_FIFO_SIZEn(x) (4) argument
743 #define FSL_FEATURE_LPSPI_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1) argument
787 #define FSL_FEATURE_LPUART_FIFO_SIZEn(x) (8) argument
813 #define FSL_FEATURE_LPUART_HAS_SEPARATE_DMA_RX_TX_REQn(x) (1) argument
1398 #define FSL_FEATURE_TPM_CHANNEL_COUNTn(x) \ argument
1420 #define FSL_FEATURE_TPM_COMBINE_HAS_EFFECTn(x) (1) argument
1426 #define FSL_FEATURE_TPM_FILTER_HAS_EFFECTn(x) (1) argument
1430 #define FSL_FEATURE_TPM_QDCTRL_HAS_EFFECTn(x) (1) argument
/hal_openisa-latest/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_flash.c22 #define ALIGN_DOWN(x, a) ((x) & (uint32_t)(-((int32_t)(a)))) argument
25 #define ALIGN_UP(x, a) (-((int32_t)((uint32_t)(-((int32_t)(x))) & (uint32_t)(-((int32_t)(a)))))) argument
38 #define BYTES_JOIN_TO_WORD_1_3(x, y) (B1P4(x) | B3P1(y)) argument
39 #define BYTES_JOIN_TO_WORD_2_2(x, y) (B2P3(x) | B2P1(y)) argument
40 #define BYTES_JOIN_TO_WORD_3_1(x, y) (B3P2(x) | B1P1(y)) argument
41 #define BYTES_JOIN_TO_WORD_1_1_2(x, y, z) (B1P4(x) | B1P3(y) | B2P1(z)) argument
42 #define BYTES_JOIN_TO_WORD_1_2_1(x, y, z) (B1P4(x) | B2P2(y) | B1P1(z)) argument
43 #define BYTES_JOIN_TO_WORD_2_1_1(x, y, z) (B2P3(x) | B1P2(y) | B1P1(z)) argument
44 #define BYTES_JOIN_TO_WORD_1_1_1_1(x, y, z, w) (B1P4(x) | B1P3(y) | B1P2(z) | B1P1(w)) argument
435 #define MSCM_SPECULATION_DISABLE(x) MSCM_OCMDR_OCM1(x) argument
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Dfsl_flexio.h29 #define FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x) ((uint32_t)(x) << 1U) argument
30 #define FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x) (((uint32_t)(x) << 2U) | 0x1U) argument
31 #define FLEXIO_TIMER_TRIGGER_SEL_TIMn(x) (((uint32_t)(x) << 2U) | 0x3U) argument
Dfsl_common.h163 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) argument
198 #define SDK_PRAGMA(x) _Pragma(#x) argument
Dfsl_usdhc.c20 #define USDHC_PREV_DVS(x) ((x) -= 1U) argument
21 #define USDHC_PREV_CLKFS(x, y) ((x) >>= (y)) argument
Dfsl_cau3.h131 uint32_t x[CAU3_HASH_CTX_SIZE]; member
Dfsl_cau3_ble.h136 uint32_t x[CAU3_HASH_CTX_SIZE]; member
Dfsl_rtc.c119 uint32_t x; in RTC_ConvertSecondsToDatetime() local
Dfsl_cau3_ble.c922 uint8_t *x) in cau3_aes_ccm_auth()
958 uint8_t *x) in cau3_aes_ccm_auth_start()
1097 uint8_t *x, in cau3_aes_ccm_encr_auth()
1165 uint8_t x[CAU3_AES_BLOCK_SIZE]; in cau3_aes_ccm_encrypt() local
1226 uint8_t x[CAU3_AES_BLOCK_SIZE]; in cau3_aes_ccm_decrypt() local
/hal_openisa-latest/vega_sdk_riscv/middleware/wireless/framework/XCVR/RV32M1/
Dfsl_xcvr_trim.c24 #define trunc(x) (uint32_t)(x) argument
26 #define round(x) (uint32_t)((x) + 0.5) argument
27 #define roundf(x) (float)(uint32_t)((x) + 0.5f) argument
75 #define ISIGN(x) !((uint16_t)x & 0x8000) argument
76 #define ABS(x) ((x) > 0 ? (x) : -(x)) argument
Dfsl_xcvr.c23 #define trunc(x) (uint32_t)(x) argument
25 #define round(x) (uint32_t)((x) + 0.5) argument
26 #define roundf(x) (float)(uint32_t)((x) + 0.5) argument
31 #define ABS(x) ((x) > 0 ? (x) : -(x)) argument
Ddbg_ram_capture.c22 #define SIGN_EXTND_12_16(x) ((x) | (((x) & 0x800) ? 0xF000 : 0x0)) argument
23 #define SIGN_EXTND_5_8(x) ((x) | (((x) & 0x10) ? 0xE0 : 0x0)) argument
Dfsl_xcvr.h85 #define B0(x) (((uint32_t)(((uint32_t)(x)) << 0)) & 0xFFU) argument
86 #define B1(x) (((uint32_t)(((uint32_t)(x)) << 8)) & 0xFF00U) argument
87 #define B2(x) (((uint32_t)(((uint32_t)(x)) << 16)) & 0xFF0000U) argument
88 #define B3(x) (((uint32_t)(((uint32_t)(x)) << 24)) & 0xFF000000U) argument
/hal_openisa-latest/vega_sdk_riscv/RISCV/
Dcore_riscv32.h56 #define __BKPT(x) __ASM("ebreak") argument