1 /*!
2     \file    gd32l23x_wwdgt.c
3     \brief   WWDGT driver
4 
5     \version 2021-08-04, V1.0.0, firmware for GD32L23x
6 */
7 
8 /*
9     Copyright (c) 2021, GigaDevice Semiconductor Inc.
10 
11     Redistribution and use in source and binary forms, with or without modification,
12 are permitted provided that the following conditions are met:
13 
14     1. Redistributions of source code must retain the above copyright notice, this
15        list of conditions and the following disclaimer.
16     2. Redistributions in binary form must reproduce the above copyright notice,
17        this list of conditions and the following disclaimer in the documentation
18        and/or other materials provided with the distribution.
19     3. Neither the name of the copyright holder nor the names of its contributors
20        may be used to endorse or promote products derived from this software without
21        specific prior written permission.
22 
23     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 OF SUCH DAMAGE.
33 */
34 
35 #include "gd32l23x_wwdgt.h"
36 
37 /* WWDGT_CTL register value */
38 #define CTL_CNT(regval)             (BITS(0,6) & ((uint32_t)(regval) << 0U))    /*!< write value to WWDGT_CTL_CNT bit field */
39 /* WWDGT_CFG register value */
40 #define CFG_WIN(regval)             (BITS(0,6) & ((uint32_t)(regval) << 0U))    /*!< write value to WWDGT_CFG_WIN bit field */
41 
42 /*!
43     \brief      reset the WWDGT configuration
44     \param[in]  none
45     \param[out] none
46     \retval     none
47 */
wwdgt_deinit(void)48 void wwdgt_deinit(void)
49 {
50     rcu_periph_reset_enable(RCU_WWDGTRST);
51     rcu_periph_reset_disable(RCU_WWDGTRST);
52 }
53 
54 /*!
55     \brief      start the WWDGT counter
56     \param[in]  none
57     \param[out] none
58     \retval     none
59 */
wwdgt_enable(void)60 void wwdgt_enable(void)
61 {
62     WWDGT_CTL |= WWDGT_CTL_WDGTEN;
63 }
64 
65 /*!
66     \brief      configure the WWDGT counter prescaler value
67     \param[in]  prescaler: WWDGT prescaler value
68                 only one parameter can be selected which is shown as below:
69       \arg        WWDGT_CFG_PSC_DIV1: the time base of window watchdog counter = (PCLK1/4096)/1
70       \arg        WWDGT_CFG_PSC_DIV2: the time base of window watchdog counter = (PCLK1/4096)/2
71       \arg        WWDGT_CFG_PSC_DIV4: the time base of window watchdog counter = (PCLK1/4096)/4
72       \arg        WWDGT_CFG_PSC_DIV8: the time base of window watchdog counter = (PCLK1/4096)/8
73       \arg        WWDGT_CFG_PSC_DIV16: the time base of window watchdog counter = (PCLK1/4096)/16
74       \arg        WWDGT_CFG_PSC_DIV32: the time base of window watchdog counter = (PCLK1/4096)/32
75       \arg        WWDGT_CFG_PSC_DIV64: the time base of window watchdog counter = (PCLK1/4096)/64
76       \arg        WWDGT_CFG_PSC_DIV128: the time base of window watchdog counter = (PCLK1/4096)/128
77       \arg        WWDGT_CFG_PSC_DIV256: the time base of window watchdog counter = (PCLK1/4096)/256
78       \arg        WWDGT_CFG_PSC_DIV512: the time base of window watchdog counter = (PCLK1/4096)/512
79       \arg        WWDGT_CFG_PSC_DIV1024: the time base of window watchdog counter = (PCLK1/4096)/1024
80       \arg        WWDGT_CFG_PSC_DIV2048: the time base of window watchdog counter = (PCLK1/4096)/2048
81       \arg        WWDGT_CFG_PSC_DIV4096: the time base of window watchdog counter = (PCLK1/4096)/4096
82       \arg        WWDGT_CFG_PSC_DIV8192: the time base of window watchdog counter = (PCLK1/4096)/8192
83     \param[out] none
84     \retval     none
85 */
wwdgt_prescaler_value_config(uint16_t prescaler)86 void wwdgt_prescaler_value_config(uint16_t prescaler)
87 {
88     uint32_t reg_cfg = 0x00000000U;
89     /* clear WIN and PSC bits */
90     reg_cfg = WWDGT_CFG & (~((uint32_t)WWDGT_CFG_PSC_0_1 | (uint32_t)WWDGT_CFG_PSC_2_3));
91     /* configureand PSC bits */
92     reg_cfg |= (uint32_t)(prescaler);
93 
94     WWDGT_CFG = (uint32_t)reg_cfg;
95 }
96 
97 /*!
98     \brief      configure the WWDGT counter window value
99     \param[in]  window: specify window value(0x0000 - 0x007F)
100     \param[out] none
101     \retval     none
102 */
wwdgt_window_value_config(uint16_t window)103 void wwdgt_window_value_config(uint16_t window)
104 {
105     uint32_t reg_cfg = 0x00000000U;
106     /* clear WIN and PSC bits */
107     reg_cfg = WWDGT_CFG & (~(uint32_t)WWDGT_CFG_WIN);
108     /* configure WIN bits */
109     reg_cfg |= (uint32_t)(window);
110 
111     WWDGT_CFG = (uint32_t)reg_cfg;
112 }
113 
114 /*!
115     \brief      configure the WWDGT counter value
116     \param[in]  counter_value: 0x00 - 0x7F
117     \param[out] none
118     \retval     none
119 */
wwdgt_counter_update(uint16_t counter_value)120 void wwdgt_counter_update(uint16_t counter_value)
121 {
122     WWDGT_CTL = (uint32_t)(CTL_CNT(counter_value));
123 }
124 
125 /*!
126     \brief      configure counter value, window value, and prescaler divider value
127     \param[in]  counter: 0x0000 - 0x007F
128     \param[in]  window: 0x0000 - 0x007F
129     \param[in]  prescaler: WWDGT prescaler value
130                 only one parameter can be selected which is shown as below:
131       \arg        WWDGT_CFG_PSC_DIV1: the time base of window watchdog counter = (PCLK1/4096)/1
132       \arg        WWDGT_CFG_PSC_DIV2: the time base of window watchdog counter = (PCLK1/4096)/2
133       \arg        WWDGT_CFG_PSC_DIV4: the time base of window watchdog counter = (PCLK1/4096)/4
134       \arg        WWDGT_CFG_PSC_DIV8: the time base of window watchdog counter = (PCLK1/4096)/8
135     \param[out] none
136     \retval     none
137 */
wwdgt_config(uint16_t counter,uint16_t window,uint32_t prescaler)138 void wwdgt_config(uint16_t counter, uint16_t window, uint32_t prescaler)
139 {
140     WWDGT_CFG = (uint32_t)(CFG_WIN(window) | prescaler);
141     WWDGT_CTL = (uint32_t)(CTL_CNT(counter));
142 }
143 
144 /*!
145     \brief      enable early wakeup interrupt of WWDGT
146     \param[in]  none
147     \param[out] none
148     \retval     none
149 */
wwdgt_interrupt_enable(void)150 void wwdgt_interrupt_enable(void)
151 {
152     WWDGT_CFG |= WWDGT_CFG_EWIE;
153 }
154 
155 /*!
156     \brief      check early wakeup interrupt state of WWDGT
157     \param[in]  none
158     \param[out] none
159     \retval     FlagStatus: SET or RESET
160 */
wwdgt_flag_get(void)161 FlagStatus wwdgt_flag_get(void)
162 {
163     if(RESET != (WWDGT_STAT & WWDGT_STAT_EWIF)) {
164         return SET;
165     }
166 
167     return RESET;
168 }
169 
170 /*!
171     \brief      clear early wakeup interrupt state of WWDGT
172     \param[in]  none
173     \param[out] none
174     \retval     none
175 */
wwdgt_flag_clear(void)176 void wwdgt_flag_clear(void)
177 {
178     WWDGT_STAT &= ~(uint32_t)(WWDGT_STAT_EWIF);
179 }
180