1 /* ieee802154_cc2520.h - Registers definition for TI CC2520 */
2
3 /*
4 * Copyright (c) 2016 Intel Corporation.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8
9 #ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC2520_H_
10 #define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC2520_H_
11
12 #include <zephyr/linker/sections.h>
13 #include <zephyr/sys/atomic.h>
14 #include <zephyr/drivers/gpio.h>
15 #include <zephyr/drivers/spi.h>
16
17 /* Compile time config structure
18 *******************************
19 */
20
21 struct cc2520_config {
22 struct spi_dt_spec bus;
23 struct gpio_dt_spec vreg_en;
24 struct gpio_dt_spec reset;
25 struct gpio_dt_spec fifo;
26 struct gpio_dt_spec cca;
27 struct gpio_dt_spec sfd;
28 struct gpio_dt_spec fifop;
29 };
30
31 /* Runtime context structure
32 ***************************
33 */
34 struct cc2520_context {
35 struct net_if *iface;
36 /**************************/
37 const struct device *dev;
38 struct gpio_callback sfd_cb;
39 struct gpio_callback fifop_cb;
40 uint8_t mac_addr[8];
41 /************TX************/
42 struct k_sem tx_sync;
43 atomic_t tx;
44 /************RX************/
45 K_KERNEL_STACK_MEMBER(cc2520_rx_stack,
46 CONFIG_IEEE802154_CC2520_RX_STACK_SIZE);
47 struct k_thread cc2520_rx_thread;
48 struct k_sem rx_lock;
49 #ifdef CONFIG_IEEE802154_CC2520_CRYPTO
50 struct k_sem access_lock;
51 #endif
52 bool overflow;
53 };
54
55 #include "ieee802154_cc2520_regs.h"
56
57
58 /* Registers useful routines
59 ***************************
60 */
61
62 bool z_cc2520_access(const struct device *dev, bool read, uint8_t ins,
63 uint16_t addr, void *data, size_t length);
64
65 #define DEFINE_SREG_READ(__reg_name, __reg_addr) \
66 static inline uint8_t read_reg_##__reg_name(const struct device *dev) \
67 { \
68 uint8_t val; \
69 \
70 if (z_cc2520_access(dev, true, CC2520_INS_MEMRD, \
71 __reg_addr, &val, 1)) { \
72 return val; \
73 } \
74 \
75 return 0; \
76 }
77
78 #define DEFINE_SREG_WRITE(__reg_name, __reg_addr) \
79 static inline bool write_reg_##__reg_name(const struct device *dev, \
80 uint8_t val) \
81 { \
82 return z_cc2520_access(dev, false, CC2520_INS_MEMWR, \
83 __reg_addr, &val, 1); \
84 }
85
86 #define DEFINE_FREG_READ(__reg_name, __reg_addr) \
87 static inline uint8_t read_reg_##__reg_name(const struct device *dev) \
88 { \
89 uint8_t val; \
90 \
91 if (z_cc2520_access(dev, true, CC2520_INS_REGRD, \
92 __reg_addr, &val, 1)) { \
93 return val; \
94 } \
95 \
96 return 0; \
97 }
98
99 #define DEFINE_FREG_WRITE(__reg_name, __reg_addr) \
100 static inline bool write_reg_##__reg_name(const struct device *dev, \
101 uint8_t val) \
102 { \
103 return z_cc2520_access(dev, false, CC2520_INS_REGWR, \
104 __reg_addr, &val, 1); \
105 }
106
DEFINE_FREG_READ(excflag0,CC2520_FREG_EXCFLAG0)107 DEFINE_FREG_READ(excflag0, CC2520_FREG_EXCFLAG0)
108 DEFINE_FREG_READ(excflag1, CC2520_FREG_EXCFLAG1)
109 DEFINE_FREG_READ(excflag2, CC2520_FREG_EXCFLAG2)
110 DEFINE_FREG_READ(gpioctrl0, CC2520_FREG_GPIOCTRL0)
111 DEFINE_FREG_READ(gpioctrl1, CC2520_FREG_GPIOCTRL1)
112 DEFINE_FREG_READ(gpioctrl2, CC2520_FREG_GPIOCTRL2)
113 DEFINE_FREG_READ(gpioctrl3, CC2520_FREG_GPIOCTRL3)
114 DEFINE_FREG_READ(gpioctrl4, CC2520_FREG_GPIOCTRL4)
115 DEFINE_FREG_READ(gpioctrl5, CC2520_FREG_GPIOCTRL5)
116 DEFINE_FREG_READ(gpiopolarity, CC2520_FREG_GPIOPOLARITY)
117 DEFINE_FREG_READ(gpioctrl, CC2520_FREG_GPIOCTRL)
118 DEFINE_FREG_READ(txfifocnt, CC2520_FREG_TXFIFOCNT)
119 DEFINE_FREG_READ(rxfifocnt, CC2520_FREG_RXFIFOCNT)
120 DEFINE_FREG_READ(dpustat, CC2520_FREG_DPUSTAT)
121
122 DEFINE_FREG_WRITE(frmctrl0, CC2520_FREG_FRMCTRL0)
123 DEFINE_FREG_WRITE(frmctrl1, CC2520_FREG_FRMCTRL1)
124 DEFINE_FREG_WRITE(excflag0, CC2520_FREG_EXCFLAG0)
125 DEFINE_FREG_WRITE(excflag1, CC2520_FREG_EXCFLAG1)
126 DEFINE_FREG_WRITE(excflag2, CC2520_FREG_EXCFLAG2)
127 DEFINE_FREG_WRITE(frmfilt0, CC2520_FREG_FRMFILT0)
128 DEFINE_FREG_WRITE(frmfilt1, CC2520_FREG_FRMFILT1)
129 DEFINE_FREG_WRITE(srcmatch, CC2520_FREG_SRCMATCH)
130 DEFINE_FREG_WRITE(fifopctrl, CC2520_FREG_FIFOPCTRL)
131 DEFINE_FREG_WRITE(freqctrl, CC2520_FREG_FREQCTRL)
132 DEFINE_FREG_WRITE(txpower, CC2520_FREG_TXPOWER)
133 DEFINE_FREG_WRITE(ccactrl0, CC2520_FREG_CCACTRL0)
134
135 DEFINE_SREG_WRITE(mdmctrl0, CC2520_SREG_MDMCTRL0)
136 DEFINE_SREG_WRITE(mdmctrl1, CC2520_SREG_MDMCTRL1)
137 DEFINE_SREG_WRITE(rxctrl, CC2520_SREG_RXCTRL)
138 DEFINE_SREG_WRITE(fsctrl, CC2520_SREG_FSCTRL)
139 DEFINE_SREG_WRITE(fscal1, CC2520_SREG_FSCAL1)
140 DEFINE_SREG_WRITE(agcctrl1, CC2520_SREG_AGCCTRL1)
141 DEFINE_SREG_WRITE(adctest0, CC2520_SREG_ADCTEST0)
142 DEFINE_SREG_WRITE(adctest1, CC2520_SREG_ADCTEST1)
143 DEFINE_SREG_WRITE(adctest2, CC2520_SREG_ADCTEST2)
144 DEFINE_SREG_WRITE(extclock, CC2520_SREG_EXTCLOCK)
145
146 /* Memory useful routines
147 ************************
148 */
149
150 #define DEFINE_MEM_WRITE(__mem_name, __addr, __sz) \
151 static inline bool write_mem_##__mem_name(const struct device *dev, \
152 uint8_t *buf) \
153 { \
154 return z_cc2520_access(dev, false, CC2520_INS_MEMWR, \
155 __addr, buf, __sz); \
156 }
157
158 DEFINE_MEM_WRITE(short_addr, CC2520_MEM_SHORT_ADDR, 2)
159 DEFINE_MEM_WRITE(pan_id, CC2520_MEM_PAN_ID, 2)
160 DEFINE_MEM_WRITE(ext_addr, CC2520_MEM_EXT_ADDR, 8)
161
162
163 /* Instructions useful routines
164 ******************************
165 */
166
167 static inline bool cc2520_command_strobe(const struct device *dev,
168 uint8_t instruction)
169 {
170 return z_cc2520_access(dev, false, instruction, 0, NULL, 0);
171 }
172
cc2520_command_strobe_snop(const struct device * dev,uint8_t instruction)173 static inline bool cc2520_command_strobe_snop(const struct device *dev,
174 uint8_t instruction)
175 {
176 uint8_t snop[1] = { CC2520_INS_SNOP };
177
178 return z_cc2520_access(dev, false, instruction, 0, snop, 1);
179 }
180
181 #define DEFINE_STROBE_INSTRUCTION(__ins_name, __ins) \
182 static inline bool instruct_##__ins_name(const struct device *dev) \
183 { \
184 return cc2520_command_strobe(dev, __ins); \
185 }
186
187 #define DEFINE_STROBE_SNOP_INSTRUCTION(__ins_name, __ins) \
188 static inline bool instruct_##__ins_name(const struct device *dev) \
189 { \
190 return cc2520_command_strobe_snop(dev, __ins); \
191 }
192
193 DEFINE_STROBE_INSTRUCTION(srxon, CC2520_INS_SRXON)
194 DEFINE_STROBE_INSTRUCTION(srfoff, CC2520_INS_SRFOFF)
195 DEFINE_STROBE_INSTRUCTION(stxon, CC2520_INS_STXON)
196 DEFINE_STROBE_INSTRUCTION(stxoncca, CC2520_INS_STXONCCA)
197 DEFINE_STROBE_INSTRUCTION(sflushrx, CC2520_INS_SFLUSHRX)
198 DEFINE_STROBE_INSTRUCTION(sflushtx, CC2520_INS_SFLUSHTX)
199 DEFINE_STROBE_INSTRUCTION(sxoscoff, CC2520_INS_SXOSCOFF)
200
201 DEFINE_STROBE_SNOP_INSTRUCTION(sxoscon, CC2520_INS_SXOSCON)
202
203 #endif /* ZEPHYR_DRIVERS_IEEE802154_IEEE802154_CC2520_H_ */
204
