| /trusted-firmware-a-3.7.0/plat/xilinx/zynqmp/pm_service/ |
| D | zynqmp_pm_svc_main.c | 149 uint32_t value; in zynqmp_sgi7_irq() local
371 uint32_t value = 0U; in pm_smc_handler() local
393 uint32_t value = 0U; in pm_smc_handler() local
420 uint32_t value = 0U; in pm_smc_handler() local
432 uint32_t value = 0U; in pm_smc_handler() local
444 uint32_t value = 0U; in pm_smc_handler() local
478 uint32_t value = 0U; in pm_smc_handler() local
487 uint32_t value = 0U; in pm_smc_handler() local
499 uint32_t value = 0U; in pm_smc_handler() local
519 uint32_t value = 0U; in pm_smc_handler() local
[all …]
|
| D | pm_api_ioctl.c | 99 uint32_t value) in pm_ioctl_config_boot_addr()
136 static enum pm_ret_status pm_ioctl_config_tcm_comb(uint32_t value) in pm_ioctl_config_tcm_comb()
166 uint32_t value) in pm_ioctl_set_tapdelay_bypass()
239 uint32_t value) in pm_ioctl_sd_set_tapdelay()
419 uint32_t value) in pm_ioctl_write_ggs()
441 uint32_t *value) in pm_ioctl_read_ggs()
462 uint32_t value) in pm_ioctl_write_pggs()
481 uint32_t value) in pm_ioctl_afi()
527 uint32_t *value) in pm_ioctl_read_pggs()
582 static enum pm_ret_status pm_ioctl_set_boot_health_status(uint32_t value) in pm_ioctl_set_boot_health_status()
[all …]
|
| D | zynqmp_pm_api_sys.c | 556 uint32_t value) in pm_mmio_write()
576 enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value) in pm_mmio_read()
620 enum pm_ret_status pm_fpga_get_status(uint32_t *value) in pm_fpga_get_status()
636 enum pm_ret_status pm_get_chipid(uint32_t *value) in pm_get_chipid()
685 uint32_t *value) in pm_aes_engine()
733 uint32_t *value) in pm_ioctl()
1593 uint32_t *value) in pm_secure_image()
1623 uint32_t *value) in pm_fpga_read()
1648 uint32_t value) in pm_pll_set_parameter()
1679 uint32_t *value) in pm_pll_get_parameter()
[all …]
|
| /trusted-firmware-a-3.7.0/plat/brcm/board/stingray/include/ |
| D | scp_utils.h | 22 #define SCP_WRITE_CFG(cfg, value) mmio_write_32(CRMU_CFG_BASE + \ argument
27 #define SCP_WRITE_CFG16(cfg, value) mmio_write_16(CRMU_CFG_BASE + \ argument
32 #define SCP_WRITE_CFG8(cfg, value) mmio_write_8(CRMU_CFG_BASE + \ argument
|
| /trusted-firmware-a-3.7.0/drivers/arm/sp805/ |
| D | sp805.c | 14 static inline void sp805_write_wdog_load(uintptr_t base, uint32_t value) in sp805_write_wdog_load()
19 static inline void sp805_write_wdog_ctrl(uintptr_t base, uint32_t value) in sp805_write_wdog_ctrl()
24 static inline void sp805_write_wdog_lock(uintptr_t base, uint32_t value) in sp805_write_wdog_lock()
|
| /trusted-firmware-a-3.7.0/plat/intel/soc/stratix10/include/ |
| D | s10_memory_controller.h | 22 #define S10_MPFE_IOHMC_CTRLCFG1_CFG_ADDR_ORDER(value) \ argument
72 #define ACT_TO_ACT_DIFF_BANK(value) (((value) & 0x00fc0000) >> 18) argument
73 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
74 #define ACT_TO_RDWR(value) (((value) & 0x0000003f) >> 0) argument
75 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
78 #define RD_TO_RD_DIFF_CHIP(value) (((value) & 0x00000fc0) >> 6) argument
79 #define RD_TO_WR_DIFF_CHIP(value) (((value) & 0x3f000000) >> 24) argument
80 #define RD_TO_WR(value) (((value) & 0x00fc0000) >> 18) argument
81 #define RD_TO_PCH(value) (((value) & 0x00000fc0) >> 6) argument
84 #define CALTIMING3_WR_TO_RD_DIFF_CHIP(value) (((value) & 0x0003f000) >> 12) argument
[all …]
|
| /trusted-firmware-a-3.7.0/include/lib/ |
| D | mmio.h | 12 static inline void mmio_write_8(uintptr_t addr, uint8_t value) in mmio_write_8()
22 static inline void mmio_write_16(uintptr_t addr, uint16_t value) in mmio_write_16()
39 static inline void mmio_write_32(uintptr_t addr, uint32_t value) in mmio_write_32()
49 static inline void mmio_write_64(uintptr_t addr, uint64_t value) in mmio_write_64()
|
| D | utils_def.h | 98 #define round_boundary(value, boundary) \ argument
101 #define round_up(value, boundary) \ argument
104 #define round_down(value, boundary) \ argument
145 #define is_aligned(value, boundary) \ argument
|
| /trusted-firmware-a-3.7.0/plat/intel/soc/agilex/include/ |
| D | agilex_memory_controller.h | 24 #define AGX_MPFE_IOHMC_CTRLCFG1_CFG_ADDR_ORDER(value) \ argument
73 #define ACT_TO_ACT_DIFF_BANK(value) (((value) & 0x00fc0000) >> 18) argument
74 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
75 #define ACT_TO_RDWR(value) (((value) & 0x0000003f) >> 0) argument
76 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
79 #define RD_TO_RD_DIFF_CHIP(value) (((value) & 0x00000fc0) >> 6) argument
80 #define RD_TO_WR_DIFF_CHIP(value) (((value) & 0x3f000000) >> 24) argument
81 #define RD_TO_WR(value) (((value) & 0x00fc0000) >> 18) argument
82 #define RD_TO_PCH(value) (((value) & 0x00000fc0) >> 6) argument
85 #define CALTIMING3_WR_TO_RD_DIFF_CHIP(value) (((value) & 0x0003f000) >> 12) argument
[all …]
|
| /trusted-firmware-a-3.7.0/plat/intel/soc/agilex5/include/ |
| D | agilex5_memory_controller.h | 26 #define AGX_MPFE_IOHMC_CTRLCFG1_CFG_ADDR_ORDER(value) (((value) & 0x00000060) >> 5) argument
74 #define ACT_TO_ACT_DIFF_BANK(value) (((value) & 0x00fc0000) >> 18) argument
75 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
76 #define ACT_TO_RDWR(value) (((value) & 0x0000003f) >> 0) argument
77 #define ACT_TO_ACT(value) (((value) & 0x0003f000) >> 12) argument
80 #define RD_TO_RD_DIFF_CHIP(value) (((value) & 0x00000fc0) >> 6) argument
81 #define RD_TO_WR_DIFF_CHIP(value) (((value) & 0x3f000000) >> 24) argument
82 #define RD_TO_WR(value) (((value) & 0x00fc0000) >> 18) argument
83 #define RD_TO_PCH(value) (((value) & 0x00000fc0) >> 6) argument
86 #define CALTIMING3_WR_TO_RD_DIFF_CHIP(value) (((value) & 0x0003f000) >> 12) argument
[all …]
|
| /trusted-firmware-a-3.7.0/lib/extensions/amu/aarch32/ |
| D | amu.c | 43 static inline __unused void write_hcptr_tam(uint32_t value) in write_hcptr_tam()
49 static inline __unused void write_amcr_cg1rz(uint32_t value) in write_amcr_cg1rz()
87 uint32_t value = read_amcntenset0(); in write_amcntenset0_px() local
98 uint32_t value = read_amcntenset1(); in write_amcntenset1_px() local
109 uint32_t value = read_amcntenclr0(); in write_amcntenclr0_px() local
119 uint32_t value = read_amcntenclr1(); in write_amcntenclr1_px() local
|
| /trusted-firmware-a-3.7.0/drivers/cadence/combo_phy/ |
| D | cdns_combo_phy.c | 24 uint32_t value = 0U; in cdns_sdmmc_write_phy_reg() local
52 uint32_t value = 0; in cdns_sd_card_detect() local
|
| /trusted-firmware-a-3.7.0/lib/extensions/amu/aarch64/ |
| D | amu.c | 66 static inline __unused void write_cptr_el2_tam(uint64_t value) in write_cptr_el2_tam()
74 uint64_t value = read_ctx_reg(get_el3state_ctx(ctx), CTX_SCR_EL3); in ctx_write_scr_el3_amvoffen() local
82 static inline __unused void write_hcr_el2_amvoffen(uint64_t value) in write_hcr_el2_amvoffen()
88 static inline __unused void write_amcr_el0_cg1rz(uint64_t value) in write_amcr_el0_cg1rz()
132 uint64_t value = read_amcntenset0_el0(); in write_amcntenset0_el0_px() local
142 uint64_t value = read_amcntenset1_el0(); in write_amcntenset1_el0_px() local
152 uint64_t value = read_amcntenclr0_el0(); in write_amcntenclr0_el0_px() local
162 uint64_t value = read_amcntenclr1_el0(); in write_amcntenclr1_el0_px() local
|
| /trusted-firmware-a-3.7.0/lib/compiler-rt/builtins/ |
| D | int_lib.h | 122 int __inline __builtin_ctz(uint32_t value) { in __builtin_ctz()
129 int __inline __builtin_clz(uint32_t value) { in __builtin_clz()
137 int __inline __builtin_clzll(uint64_t value) { in __builtin_clzll()
144 int __inline __builtin_clzll(uint64_t value) { in __builtin_clzll()
|
| /trusted-firmware-a-3.7.0/drivers/st/bsec/ |
| D | bsec2.c | 246 uint32_t value; in bsec_set_config() local
295 uint32_t value; in bsec_get_config() local
330 bool value; in bsec_shadow_register() local
410 bool value; in bsec_write_otp() local
707 uint32_t bsec_read_sr_lock(uint32_t otp, bool *value) in bsec_read_sr_lock()
755 uint32_t bsec_read_sw_lock(uint32_t otp, bool *value) in bsec_read_sw_lock()
803 uint32_t bsec_read_sp_lock(uint32_t otp, bool *value) in bsec_read_sp_lock()
826 uint32_t bsec_read_permanent_lock(uint32_t otp, bool *value) in bsec_read_permanent_lock()
|
| /trusted-firmware-a-3.7.0/drivers/cadence/emmc/ |
| D | cdns_sdmmc.c | 165 uint32_t value = 0; in cdns_program_phy_reg() local
384 uint32_t value = 0; in cdns_sdmmc_write_sd_host_reg() local
407 uint32_t value = 0; in cdns_init_hrs_io() local
519 uint32_t value = 0; in cdns_reset() local
615 uint32_t value; in cdns_send_cmd() local
|
| /trusted-firmware-a-3.7.0/drivers/renesas/rcar/qos/ |
| D | qos_common.h | 111 static inline void io_write_32(uintptr_t addr, uint32_t value) in io_write_32()
121 static inline void io_write_64(uintptr_t addr, uint64_t value) in io_write_64()
128 uint64_t value; member
|
| /trusted-firmware-a-3.7.0/drivers/renesas/common/ |
| D | common.c | 18 uint32_t value = regval; in cpg_write() local
|
| /trusted-firmware-a-3.7.0/plat/mediatek/mt8173/drivers/timer/ |
| D | mt_cpuxgpt.c | 14 static void write_cpuxgpt(unsigned int reg_index, unsigned int value) in write_cpuxgpt()
|
| /trusted-firmware-a-3.7.0/common/ |
| D | fdt_wrappers.c | 27 unsigned int cells, uint32_t *value) in fdt_read_uint32_array()
58 uint32_t *value) in fdt_read_uint32()
77 uint64_t *value) in fdt_read_uint64()
97 unsigned int length, void *value) in fdtw_read_bytes()
196 unsigned int cells, void *value) in fdtw_write_inplace_cells()
395 static bool fdtw_xlat_hit(const fdt32_t *value, int child_addr_size, in fdtw_xlat_hit()
|
| /trusted-firmware-a-3.7.0/drivers/nxp/ddr/fsl-mmdc/ |
| D | fsl_mmdc.c | 23 static void set_wait_for_bits_clear(void *ptr, unsigned int value, in set_wait_for_bits_clear()
|
| /trusted-firmware-a-3.7.0/plat/amlogic/axg/ |
| D | axg_pm.c | 29 static void axg_pm_set_reset_addr(u_register_t mpidr, uint64_t value) in axg_pm_set_reset_addr()
37 static void axg_pm_reset(u_register_t mpidr, uint32_t value) in axg_pm_reset()
|
| /trusted-firmware-a-3.7.0/drivers/brcm/ |
| D | chimp.c | 37 void bcm_chimp_write(uintptr_t addr, uint32_t value) in bcm_chimp_write()
82 uint32_t value; in bcm_chimp_handshake_done() local
144 uint32_t value; in bcm_chimp_nitro_reset() local
|
| /trusted-firmware-a-3.7.0/drivers/arm/sbsa/ |
| D | sbsa.c | 13 void sbsa_watchdog_offset_reg_write(uintptr_t base, uint64_t value) in sbsa_watchdog_offset_reg_write()
|
| /trusted-firmware-a-3.7.0/plat/xilinx/common/pm_service/ |
| D | pm_ipi.c | 167 uint32_t *value, size_t count) in pm_ipi_buff_read()
226 enum pm_ret_status pm_ipi_buff_read_callb(uint32_t *value, size_t count) in pm_ipi_buff_read_callb()
282 uint32_t *value, size_t count) in pm_ipi_send_sync()
|
