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Searched defs:value (Results 1 – 13 of 13) sorted by relevance

/hal_openisa-3.5.0-3.4.0/vega_sdk_riscv/devices/RV32M1/drivers/
Dfsl_trng.c99 #define TRNG_WR_SCMISC_RTY_CT(base, value) (TRNG_RMW_SCMISC(base, TRNG_SCMISC_RTY_CT_MASK, TRNG_SCM… argument
126 #define TRNG_WR_SCML(base, value) (TRNG_SCML_REG(base) = (value)) argument
127 #define TRNG_RMW_SCML(base, mask, value) (TRNG_WR_SCML(base, (TRNG_RD_SCML(base) & ~(mask)) | (valu… argument
142 #define TRNG_WR_SCML_MONO_MAX(base, value) (TRNG_RMW_SCML(base, TRNG_SCML_MONO_MAX_MASK, TRNG_SCML_… argument
157 #define TRNG_WR_SCML_MONO_RNG(base, value) (TRNG_RMW_SCML(base, TRNG_SCML_MONO_RNG_MASK, TRNG_SCML_… argument
186 #define TRNG_WR_SCR1L(base, value) (TRNG_SCR1L_REG(base) = (value)) argument
187 #define TRNG_RMW_SCR1L(base, mask, value) (TRNG_WR_SCR1L(base, (TRNG_RD_SCR1L(base) & ~(mask)) | (v… argument
204 #define TRNG_WR_SCR1L_RUN1_MAX(base, value) (TRNG_RMW_SCR1L(base, TRNG_SCR1L_RUN1_MAX_MASK, TRNG_SC… argument
220 #define TRNG_WR_SCR1L_RUN1_RNG(base, value) (TRNG_RMW_SCR1L(base, TRNG_SCR1L_RUN1_RNG_MASK, TRNG_SC… argument
249 #define TRNG_WR_SCR2L(base, value) (TRNG_SCR2L_REG(base) = (value)) argument
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Dfsl_lpi2c.c331 uint32_t value; in LPI2C_MasterInit() local
449 uint32_t value; in LPI2C_MasterSetBaudRate() local
612 uint32_t value; in LPI2C_MasterReceive() local
Dfsl_spm.h806 static inline void SPM_SetDcdcVdd1p2ValueHsrun(SPM_Type *base, uint32_t value) in SPM_SetDcdcVdd1p2ValueHsrun()
819 static inline void SPM_SetDcdcVdd1p2ValueBuck(SPM_Type *base, uint32_t value) in SPM_SetDcdcVdd1p2ValueBuck()
833 static inline void SPM_SetDcdcVdd1p8Value(SPM_Type *base, uint32_t value) in SPM_SetDcdcVdd1p8Value()
Dfsl_flash.c2001 …us_t FLASH_GetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t *value) in FLASH_GetProperty()
2082 …tus_t FLASH_SetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t value) in FLASH_SetProperty()
2609 uint32_t value; in FLASH_PflashGetPrefetchSpeculation() local
2633 uint32_t value; in FLASH_PflashGetPrefetchSpeculation() local
2657 uint32_t value; in FLASH_PflashGetPrefetchSpeculation() local
Dfsl_ewm.c19 uint32_t value = 0U; in EWM_Init() local
Dfsl_wdog32.c45 uint32_t value = 0U; in WDOG32_Init() local
Dfsl_spm.c145 void SPM_BypassDcdcBattMonitor(SPM_Type *base, bool enable, uint32_t value) in SPM_BypassDcdcBattMonitor()
Dfsl_dac.h332 static inline void DAC_SetData(LPDAC_Type *base, uint32_t value) in DAC_SetData()
Dfsl_lptmr.h113 lptmr_prescaler_glitch_value_t value; /*!< Prescaler or glitch filter value */ member
Dfsl_lpadc.h579 static inline void LPADC_SetOffsetValue(ADC_Type *base, uint32_t value) in LPADC_SetOffsetValue()
/hal_openisa-3.5.0-3.4.0/vega_sdk_riscv/RISCV/
Dcore_riscv32.h92 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value) in __REV()
97 __attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value) in __REV16()
/hal_openisa-3.5.0-3.4.0/vega_sdk_riscv/devices/RV32M1/
DRV32M1_ri5cy.h23993 #define NXP_VAL2FLD(field, value) (((value) << (field ## _SHIFT)) & (field ## _MASK)) argument
24000 #define NXP_FLD2VAL(field, value) (((value) & (field ## _MASK)) >> (field ## _SHIFT)) argument
DRV32M1_zero_riscy.h32643 #define NXP_VAL2FLD(field, value) (((value) << (field ## _SHIFT)) & (field ## _MASK)) argument
32650 #define NXP_FLD2VAL(field, value) (((value) & (field ## _MASK)) >> (field ## _SHIFT)) argument