/hal_espressif-2.7.6/components/soc/esp32s2/include/soc/ |
D | cache_memory.h | 52 #define ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name… argument 54 #define ADDRESS_IN_IRAM0(vaddr) ADDRESS_IN_BUS(IRAM0, vaddr) argument 55 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) argument 56 #define ADDRESS_IN_IRAM1(vaddr) ADDRESS_IN_BUS(IRAM1, vaddr) argument 57 #define ADDRESS_IN_DROM0(vaddr) ADDRESS_IN_BUS(DROM0, vaddr) argument 58 #define ADDRESS_IN_DRAM0(vaddr) ADDRESS_IN_BUS(DRAM0, vaddr) argument 59 #define ADDRESS_IN_DRAM0_CACHE(vaddr) ADDRESS_IN_BUS(DRAM0_CACHE, vaddr) argument 60 #define ADDRESS_IN_DRAM1(vaddr) ADDRESS_IN_BUS(DRAM1, vaddr) argument 61 #define ADDRESS_IN_DPORT(vaddr) ADDRESS_IN_BUS(DPORT, vaddr) argument 62 #define ADDRESS_IN_DPORT_CACHE(vaddr) ADDRESS_IN_BUS(DPORT_CACHE, vaddr) argument
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/hal_espressif-2.7.6/components/soc/esp32s3/include/soc/ |
D | cache_memory.h | 35 #define ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name… argument 37 #define ADDRESS_IN_IRAM0(vaddr) ADDRESS_IN_BUS(IRAM0, vaddr) argument 38 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) argument 39 #define ADDRESS_IN_DRAM0(vaddr) ADDRESS_IN_BUS(DRAM0, vaddr) argument 40 #define ADDRESS_IN_DRAM0_CACHE(vaddr) ADDRESS_IN_BUS(DRAM0_CACHE, vaddr) argument
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/hal_espressif-2.7.6/components/soc/esp32c3/include/soc/ |
D | cache_memory.h | 36 #define ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name… argument 38 #define ADDRESS_IN_IRAM0(vaddr) ADDRESS_IN_BUS(IRAM0, vaddr) argument 39 #define ADDRESS_IN_IRAM0_CACHE(vaddr) ADDRESS_IN_BUS(IRAM0_CACHE, vaddr) argument 40 #define ADDRESS_IN_DRAM0(vaddr) ADDRESS_IN_BUS(DRAM0, vaddr) argument 41 #define ADDRESS_IN_DRAM0_CACHE(vaddr) ADDRESS_IN_BUS(DRAM0_CACHE, vaddr) argument
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/hal_espressif-2.7.6/components/esp32/ |
D | cache_sram_mmu.c | 61 unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int pad… in cache_sram_mmu_set() 137 unsigned int cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int ps… in cache_sram_mmu_set()
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/hal_espressif-2.7.6/components/esp_system/port/arch/xtensa/ |
D | panic_arch.c | 183 uint32_t vaddr = 0, size = 0; in print_cache_err_details() local 291 uint32_t vaddr = 0, size = 0; in print_cache_err_details() local
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/hal_espressif-2.7.6/components/esp_rom/include/esp32/rom/ |
D | cache.h | 69 static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, u… in cache_flash_mmu_set()
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/hal_espressif-2.7.6/components/bootloader_support/include_bootloader/ |
D | bootloader_flash_priv.h | 151 static inline uint32_t bootloader_cache_pages_to_map(uint32_t size, uint32_t vaddr) in bootloader_cache_pages_to_map()
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/hal_espressif-2.7.6/components/spi_flash/ |
D | flash_mmap.c | 507 const void *vaddr = NULL; in spi_flash_check_and_flush_cache() local
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/hal_espressif-2.7.6/components/xtensa/include/xtensa/ |
D | hal.h | 1172 #define XTHAL_MPU_ENTRY(vaddr, valid, access, memtype) \ argument 1181 #define XTHAL_MPU_ENTRY_SET_VSTARTADDR(x, vaddr) (x).as = \ argument
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/hal_espressif-2.7.6/components/espcoredump/src/ |
D | core_dump_elf.c | 157 uint32_t type, uint32_t vaddr, in elf_add_segment()
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