1 /***************************************************************************//**
2 * @file
3 * @brief External Bus Interface (EBI) peripheral API
4 *******************************************************************************
5 * # License
6 * <b>Copyright 2018 Silicon Laboratories Inc. www.silabs.com</b>
7 *******************************************************************************
8 *
9 * SPDX-License-Identifier: Zlib
10 *
11 * The licensor of this software is Silicon Laboratories Inc.
12 *
13 * This software is provided 'as-is', without any express or implied
14 * warranty. In no event will the authors be held liable for any damages
15 * arising from the use of this software.
16 *
17 * Permission is granted to anyone to use this software for any purpose,
18 * including commercial applications, and to alter it and redistribute it
19 * freely, subject to the following restrictions:
20 *
21 * 1. The origin of this software must not be misrepresented; you must not
22 * claim that you wrote the original software. If you use this software
23 * in a product, an acknowledgment in the product documentation would be
24 * appreciated but is not required.
25 * 2. Altered source versions must be plainly marked as such, and must not be
26 * misrepresented as being the original software.
27 * 3. This notice may not be removed or altered from any source distribution.
28 *
29 ******************************************************************************/
30
31 #ifndef EM_EBI_H
32 #define EM_EBI_H
33
34 #include "em_device.h"
35 #if defined(EBI_COUNT) && (EBI_COUNT > 0)
36
37 #include <stdint.h>
38 #include <stdbool.h>
39 #include "sl_assert.h"
40
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44
45 /***************************************************************************//**
46 * @addtogroup ebi
47 * @{
48 ******************************************************************************/
49
50 /***************************************************************************//**
51 * @verbatim
52 *
53 * --------- ---------
54 * | | /| |\ | Ext. |
55 * | EBI | / --------- \ | Async |
56 * | | \ --------- / | Device|
57 * | | \| |/ | |
58 * --------- ---------
59 * Parallel interface
60 *
61 * @endverbatim
62 ******************************************************************************/
63
64 /*******************************************************************************
65 ******************************* DEFINES ***********************************
66 ******************************************************************************/
67
68 #define EBI_BANK0 (uint32_t)(1 << 1) /**< EBI address bank 0. */
69 #define EBI_BANK1 (uint32_t)(1 << 2) /**< EBI address bank 1. */
70 #define EBI_BANK2 (uint32_t)(1 << 3) /**< EBI address bank 2. */
71 #define EBI_BANK3 (uint32_t)(1 << 4) /**< EBI address bank 3. */
72
73 #define EBI_CS0 (uint32_t)(1 << 1) /**< EBI chip select line 0. */
74 #define EBI_CS1 (uint32_t)(1 << 2) /**< EBI chip select line 1. */
75 #define EBI_CS2 (uint32_t)(1 << 3) /**< EBI chip select line 2. */
76 #define EBI_CS3 (uint32_t)(1 << 4) /**< EBI chip select line 3. */
77
78 #if defined(_EBI_ROUTE_MASK) && defined(_EBI_ROUTE_APEN_MASK)
79 #define EBI_GENERIC_ALB_A0 EBI_ROUTE_ALB_A0 /**< Pin Enable Lower Bound EBI_A[0] and upwards */
80 #define EBI_GENERIC_ALB_A8 EBI_ROUTE_ALB_A8 /**< Pin Enable Lower Bound EBI_A[8] and upwards*/
81 #define EBI_GENERIC_ALB_A16 EBI_ROUTE_ALB_A16 /**< Pin Enable Lower Bound EBI_A[16] and upwards */
82 #define EBI_GENERIC_ALB_A24 EBI_ROUTE_ALB_A24 /**< Pin Enable Lower Bound EBI_A[24] and upwards */
83 #define EBI_GENERIC_APEN_A0 EBI_ROUTE_APEN_A0 /**< All EBI_A pins enabled */
84 #define EBI_GENERIC_APEN_A5 EBI_ROUTE_APEN_A5 /**< EBI_A[4:L] pins enabled */
85 #define EBI_GENERIC_APEN_A6 EBI_ROUTE_APEN_A6 /**< EBI_A[5:L] pins enabled */
86 #define EBI_GENERIC_APEN_A7 EBI_ROUTE_APEN_A7 /**< EBI_A[6:L] pins enabled */
87 #define EBI_GENERIC_APEN_A8 EBI_ROUTE_APEN_A8 /**< EBI_A[7:L] pins enabled */
88 #define EBI_GENERIC_APEN_A9 EBI_ROUTE_APEN_A9 /**< EBI_A[8:L] pins enabled */
89 #define EBI_GENERIC_APEN_A10 EBI_ROUTE_APEN_A10 /**< EBI_A[9:L] pins enabled */
90 #define EBI_GENERIC_APEN_A11 EBI_ROUTE_APEN_A11 /**< EBI_A[10:L] pins enabled */
91 #define EBI_GENERIC_APEN_A12 EBI_ROUTE_APEN_A12 /**< EBI_A[11:L] pins enabled */
92 #define EBI_GENERIC_APEN_A13 EBI_ROUTE_APEN_A13 /**< EBI_A[12:L] pins enabled */
93 #define EBI_GENERIC_APEN_A14 EBI_ROUTE_APEN_A14 /**< EBI_A[13:L] pins enabled */
94 #define EBI_GENERIC_APEN_A15 EBI_ROUTE_APEN_A15 /**< EBI_A[14:L] pins enabled */
95 #define EBI_GENERIC_APEN_A16 EBI_ROUTE_APEN_A16 /**< EBI_A[15:L] pins enabled */
96 #define EBI_GENERIC_APEN_A17 EBI_ROUTE_APEN_A17 /**< EBI_A[16:L] pins enabled */
97 #define EBI_GENERIC_APEN_A18 EBI_ROUTE_APEN_A18 /**< EBI_A[17:L] pins enabled */
98 #define EBI_GENERIC_APEN_A19 EBI_ROUTE_APEN_A19 /**< EBI_A[18:L] pins enabled */
99 #define EBI_GENERIC_APEN_A20 EBI_ROUTE_APEN_A20 /**< EBI_A[19:L] pins enabled */
100 #define EBI_GENERIC_APEN_A21 EBI_ROUTE_APEN_A21 /**< EBI_A[20:L] pins enabled */
101 #define EBI_GENERIC_APEN_A22 EBI_ROUTE_APEN_A22 /**< EBI_A[21:L] pins enabled */
102 #define EBI_GENERIC_APEN_A23 EBI_ROUTE_APEN_A23 /**< EBI_A[22:L] pins enabled */
103 #define EBI_GENERIC_APEN_A24 EBI_ROUTE_APEN_A24 /**< EBI_A[23:L] pins enabled */
104 #define EBI_GENERIC_APEN_A25 EBI_ROUTE_APEN_A25 /**< EBI_A[24:L] pins enabled */
105 #define EBI_GENERIC_APEN_A26 EBI_ROUTE_APEN_A26 /**< EBI_A[25:L] pins enabled */
106 #define EBI_GENERIC_APEN_A27 EBI_ROUTE_APEN_A27 /**< EBI_A[26:L] pins enabled */
107 #define EBI_GENERIC_APEN_A28 EBI_ROUTE_APEN_A28 /**< EBI_A[27:L] pins enabled */
108 #elif defined(_EBI_ROUTEPEN_MASK)
109 #define EBI_GENERIC_ALB_A0 EBI_ROUTEPEN_ALB_A0 /**< Pin Enable Lower Bound EBI_A[0] and upwards */
110 #define EBI_GENERIC_ALB_A8 EBI_ROUTEPEN_ALB_A8 /**< Pin Enable Lower Bound EBI_A[8] and upwards*/
111 #define EBI_GENERIC_ALB_A16 EBI_ROUTEPEN_ALB_A16 /**< Pin Enable Lower Bound EBI_A[16] and upwards */
112 #define EBI_GENERIC_ALB_A24 EBI_ROUTEPEN_ALB_A24 /**< Pin Enable Lower Bound EBI_A[24] and upwards */
113 #define EBI_GENERIC_APEN_A0 EBI_ROUTEPEN_APEN_A0 /**< All EBI_A pins enabled */
114 #define EBI_GENERIC_APEN_A5 EBI_ROUTEPEN_APEN_A5 /**< EBI_A[4:L] pins enabled */
115 #define EBI_GENERIC_APEN_A6 EBI_ROUTEPEN_APEN_A6 /**< EBI_A[5:L] pins enabled */
116 #define EBI_GENERIC_APEN_A7 EBI_ROUTEPEN_APEN_A7 /**< EBI_A[6:L] pins enabled */
117 #define EBI_GENERIC_APEN_A8 EBI_ROUTEPEN_APEN_A8 /**< EBI_A[7:L] pins enabled */
118 #define EBI_GENERIC_APEN_A9 EBI_ROUTEPEN_APEN_A9 /**< EBI_A[8:L] pins enabled */
119 #define EBI_GENERIC_APEN_A10 EBI_ROUTEPEN_APEN_A10 /**< EBI_A[9:L] pins enabled */
120 #define EBI_GENERIC_APEN_A11 EBI_ROUTEPEN_APEN_A11 /**< EBI_A[10:L] pins enabled */
121 #define EBI_GENERIC_APEN_A12 EBI_ROUTEPEN_APEN_A12 /**< EBI_A[11:L] pins enabled */
122 #define EBI_GENERIC_APEN_A13 EBI_ROUTEPEN_APEN_A13 /**< EBI_A[12:L] pins enabled */
123 #define EBI_GENERIC_APEN_A14 EBI_ROUTEPEN_APEN_A14 /**< EBI_A[13:L] pins enabled */
124 #define EBI_GENERIC_APEN_A15 EBI_ROUTEPEN_APEN_A15 /**< EBI_A[14:L] pins enabled */
125 #define EBI_GENERIC_APEN_A16 EBI_ROUTEPEN_APEN_A16 /**< EBI_A[15:L] pins enabled */
126 #define EBI_GENERIC_APEN_A17 EBI_ROUTEPEN_APEN_A17 /**< EBI_A[16:L] pins enabled */
127 #define EBI_GENERIC_APEN_A18 EBI_ROUTEPEN_APEN_A18 /**< EBI_A[17:L] pins enabled */
128 #define EBI_GENERIC_APEN_A19 EBI_ROUTEPEN_APEN_A19 /**< EBI_A[18:L] pins enabled */
129 #define EBI_GENERIC_APEN_A20 EBI_ROUTEPEN_APEN_A20 /**< EBI_A[19:L] pins enabled */
130 #define EBI_GENERIC_APEN_A21 EBI_ROUTEPEN_APEN_A21 /**< EBI_A[20:L] pins enabled */
131 #define EBI_GENERIC_APEN_A22 EBI_ROUTEPEN_APEN_A22 /**< EBI_A[21:L] pins enabled */
132 #define EBI_GENERIC_APEN_A23 EBI_ROUTEPEN_APEN_A23 /**< EBI_A[22:L] pins enabled */
133 #define EBI_GENERIC_APEN_A24 EBI_ROUTEPEN_APEN_A24 /**< EBI_A[23:L] pins enabled */
134 #define EBI_GENERIC_APEN_A25 EBI_ROUTEPEN_APEN_A25 /**< EBI_A[24:L] pins enabled */
135 #define EBI_GENERIC_APEN_A26 EBI_ROUTEPEN_APEN_A26 /**< EBI_A[25:L] pins enabled */
136 #define EBI_GENERIC_APEN_A27 EBI_ROUTEPEN_APEN_A27 /**< EBI_A[26:L] pins enabled */
137 #define EBI_GENERIC_APEN_A28 EBI_ROUTEPEN_APEN_A28 /**< EBI_A[27:L] pins enabled */
138 #endif
139
140 /*******************************************************************************
141 ******************************** ENUMS ************************************
142 ******************************************************************************/
143
144 /** EBI Mode of operation. */
145 typedef enum {
146 /** 8 data bits, 8 address bits. */
147 ebiModeD8A8 = EBI_CTRL_MODE_D8A8,
148 /** 16 data bits, 16 address bits, using address latch enable. */
149 ebiModeD16A16ALE = EBI_CTRL_MODE_D16A16ALE,
150 /** 8 data bits, 24 address bits, using address latch enable. */
151 ebiModeD8A24ALE = EBI_CTRL_MODE_D8A24ALE,
152 #if defined(EBI_CTRL_MODE_D16)
153 /** Mode D16. */
154 ebiModeD16 = EBI_CTRL_MODE_D16,
155 #endif
156 } EBI_Mode_TypeDef;
157
158 /** EBI Polarity configuration. */
159 typedef enum {
160 /** Active Low. */
161 ebiActiveLow = 0,
162 /** Active High. */
163 ebiActiveHigh = 1
164 } EBI_Polarity_TypeDef;
165
166 /** EBI Pin Line types. */
167 typedef enum {
168 /** Address Ready line. */
169 ebiLineARDY,
170 /** Address Latch Enable line. */
171 ebiLineALE,
172 /** Write Enable line. */
173 ebiLineWE,
174 /** Read Enable line. */
175 ebiLineRE,
176 /** Chip Select line. */
177 ebiLineCS,
178 #if defined(_EBI_POLARITY_BLPOL_MASK)
179 /** BL line. */
180 ebiLineBL,
181 #endif
182 #if defined(_EBI_TFTPOLARITY_MASK)
183 /** TFT VSYNC line. */
184 ebiLineTFTVSync,
185 /** TFT HSYNC line. */
186 ebiLineTFTHSync,
187 /** TFT Data enable line. */
188 ebiLineTFTDataEn,
189 /** TFT DCLK line. */
190 ebiLineTFTDClk,
191 /** TFT Chip select line. */
192 ebiLineTFTCS,
193 #endif
194 } EBI_Line_TypeDef;
195
196 #if !defined(_EFM32_GECKO_FAMILY)
197 /** Address Pin Enable, lower limit - lower range of pins to enable. */
198 typedef enum {
199 /** Address lines EBI_A[0] and upwards are enabled by APEN. */
200 ebiALowA0 = EBI_GENERIC_ALB_A0,
201 /** Address lines EBI_A[8] and upwards are enabled by APEN. */
202 ebiALowA8 = EBI_GENERIC_ALB_A8,
203 /** Address lines EBI_A[16] and upwards are enabled by APEN. */
204 ebiALowA16 = EBI_GENERIC_ALB_A16,
205 /** Address lines EBI_A[24] and upwards are enabled by APEN. */
206 ebiALowA24 = EBI_GENERIC_ALB_A24,
207 } EBI_ALow_TypeDef;
208
209 /** Address Pin Enable, high limit - higher limit of pins to enable. */
210 typedef enum {
211 /** All EBI_A pins are disabled. */
212 ebiAHighA0 = EBI_GENERIC_APEN_A0,
213 /** All EBI_A[4:ALow] are enabled. */
214 ebiAHighA5 = EBI_GENERIC_APEN_A5,
215 /** All EBI_A[5:ALow] are enabled. */
216 ebiAHighA6 = EBI_GENERIC_APEN_A6,
217 /** All EBI_A[6:ALow] are enabled. */
218 ebiAHighA7 = EBI_GENERIC_APEN_A7,
219 /** All EBI_A[7:ALow] are enabled. */
220 ebiAHighA8 = EBI_GENERIC_APEN_A8,
221 /** All EBI_A[8:ALow] are enabled. */
222 ebiAHighA9 = EBI_GENERIC_APEN_A9,
223 /** All EBI_A[9:ALow] are enabled. */
224 ebiAHighA10 = EBI_GENERIC_APEN_A10,
225 /** All EBI_A[10:ALow] are enabled. */
226 ebiAHighA11 = EBI_GENERIC_APEN_A11,
227 /** All EBI_A[11:ALow] are enabled. */
228 ebiAHighA12 = EBI_GENERIC_APEN_A12,
229 /** All EBI_A[12:ALow] are enabled. */
230 ebiAHighA13 = EBI_GENERIC_APEN_A13,
231 /** All EBI_A[13:ALow] are enabled. */
232 ebiAHighA14 = EBI_GENERIC_APEN_A14,
233 /** All EBI_A[14:ALow] are enabled. */
234 ebiAHighA15 = EBI_GENERIC_APEN_A15,
235 /** All EBI_A[15:ALow] are enabled. */
236 ebiAHighA16 = EBI_GENERIC_APEN_A16,
237 /** All EBI_A[16:ALow] are enabled. */
238 ebiAHighA17 = EBI_GENERIC_APEN_A17,
239 /** All EBI_A[17:ALow] are enabled. */
240 ebiAHighA18 = EBI_GENERIC_APEN_A18,
241 /** All EBI_A[18:ALow] are enabled. */
242 ebiAHighA19 = EBI_GENERIC_APEN_A19,
243 /** All EBI_A[19:ALow] are enabled. */
244 ebiAHighA20 = EBI_GENERIC_APEN_A20,
245 /** All EBI_A[20:ALow] are enabled. */
246 ebiAHighA21 = EBI_GENERIC_APEN_A21,
247 /** All EBI_A[21:ALow] are enabled. */
248 ebiAHighA22 = EBI_GENERIC_APEN_A22,
249 /** All EBI_A[22:ALow] are enabled. */
250 ebiAHighA23 = EBI_GENERIC_APEN_A23,
251 /** All EBI_A[23:ALow] are enabled. */
252 ebiAHighA24 = EBI_GENERIC_APEN_A24,
253 /** All EBI_A[24:ALow] are enabled. */
254 ebiAHighA25 = EBI_GENERIC_APEN_A25,
255 /** All EBI_A[25:ALow] are enabled. */
256 ebiAHighA26 = EBI_GENERIC_APEN_A26,
257 /** All EBI_A[26:ALow] are enabled. */
258 ebiAHighA27 = EBI_GENERIC_APEN_A27,
259 /** All EBI_A[27:ALow] are enabled. */
260 ebiAHighA28 = EBI_GENERIC_APEN_A28,
261 } EBI_AHigh_TypeDef;
262 #endif
263
264 #if defined(_EBI_ROUTE_LOCATION_MASK)
265 /** EBI I/O Alternate Pin Location. */
266 typedef enum {
267 /** EBI PIN I/O Location 0. */
268 ebiLocation0 = EBI_ROUTE_LOCATION_LOC0,
269 /** EBI PIN I/O Location 1. */
270 ebiLocation1 = EBI_ROUTE_LOCATION_LOC1,
271 /** EBI PIN I/O Location 2. */
272 ebiLocation2 = EBI_ROUTE_LOCATION_LOC2
273 } EBI_Location_TypeDef;
274 #endif
275
276 #if defined(_EBI_TFTCTRL_MASK)
277 /* TFT support. */
278
279 /** EBI TFT Graphics Bank Select. */
280 typedef enum {
281 /** Memory BANK0 contains frame buffer. */
282 ebiTFTBank0 = EBI_TFTCTRL_BANKSEL_BANK0,
283 /** Memory BANK1 contains frame buffer. */
284 ebiTFTBank1 = EBI_TFTCTRL_BANKSEL_BANK1,
285 /** Memory BANK2 contains frame buffer. */
286 ebiTFTBank2 = EBI_TFTCTRL_BANKSEL_BANK2,
287 /** Memory BANK3 contains frame buffer. */
288 ebiTFTBank3 = EBI_TFTCTRL_BANKSEL_BANK3
289 } EBI_TFTBank_TypeDef;
290
291 #if defined(_EBI_TFTCOLORFORMAT_MASK)
292 /** EBI TFT Color format.*/
293 typedef enum {
294 /** Set ARGB (Alpha, Red, Green, Blue) color format to 0555 */
295 ebiTFTARGB0555 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB0555,
296 /** Set ARGB (Alpha, Red, Green, Blue) color format to 0565 */
297 ebiTFTARGB0565 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB0565,
298 /** Set ARGB (Alpha, Red, Green, Blue) color format to 0666 */
299 ebiTFTARGB0666 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB0666,
300 /** Set ARGB (Alpha, Red, Green, Blue) color format to 0888 */
301 ebiTFTARGB0888 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB0888,
302 /** Set ARGB (Alpha, Red, Green, Blue) color format to 5555 */
303 ebiTFTARGB5555 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB5555,
304 /** Set ARGB (Alpha, Red, Green, Blue) color format to 6565 */
305 ebiTFTARGB6565 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB6565,
306 /** Set ARGB (Alpha, Red, Green, Blue) color format to 6666 */
307 ebiTFTARGB6666 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB6666,
308 /** Set ARGB (Alpha, Red, Green, Blue) color format to 8888 */
309 ebiTFTARGB8888 = EBI_TFTCOLORFORMAT_PIXEL0FORMAT_ARGB8888,
310
311 /** Set RGB (Red, Green, Blue) color format to 555 */
312 ebiTFTRGB555 = EBI_TFTCOLORFORMAT_PIXEL1FORMAT_RGB555,
313 /** Set RGB (Red, Green, Blue) color format to 565 */
314 ebiTFTRGB565 = EBI_TFTCOLORFORMAT_PIXEL1FORMAT_RGB565,
315 /** Set RGB (Red, Green, Blue) color format to 666 */
316 ebiTFTRGB666 = EBI_TFTCOLORFORMAT_PIXEL1FORMAT_RGB666,
317 /** Set RGB (Red, Green, Blue) color format to 888 */
318 ebiTFTRGB888 = EBI_TFTCOLORFORMAT_PIXEL1FORMAT_RGB888,
319 } EBI_TFTColorFormat_TypeDef;
320 #endif
321
322 /** Masking and Alpha blending source color.*/
323 typedef enum {
324 /** Use memory as source color for masking/alpha blending. */
325 ebiTFTColorSrcMem = EBI_TFTCTRL_COLOR1SRC_MEM,
326 /** Use PIXEL1 register as source color for masking/alpha blending. */
327 ebiTFTColorSrcPixel1 = EBI_TFTCTRL_COLOR1SRC_PIXEL1,
328 } EBI_TFTColorSrc_TypeDef;
329
330 /** Bus Data Interleave Mode. */
331 typedef enum {
332 /** Unlimited interleaved accesses per EBI_DCLK period. Can cause jitter. */
333 ebiTFTInterleaveUnlimited = EBI_TFTCTRL_INTERLEAVE_UNLIMITED,
334 /** Allow 1 interleaved access per EBI_DCLK period. */
335 ebiTFTInterleaveOnePerDClk = EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK,
336 /** Only allow accesses during porch periods. */
337 ebiTFTInterleavePorch = EBI_TFTCTRL_INTERLEAVE_PORCH,
338 } EBI_TFTInterleave_TypeDef;
339
340 /** Control frame base pointer copy. */
341 typedef enum {
342 /** Trigger update of frame buffer pointer on vertical sync. */
343 ebiTFTFrameBufTriggerVSync = EBI_TFTCTRL_FBCTRIG_VSYNC,
344 /** Trigger update of frame buffer pointer on horizontal sync. */
345 ebiTFTFrameBufTriggerHSync = EBI_TFTCTRL_FBCTRIG_HSYNC,
346 } EBI_TFTFrameBufTrigger_TypeDef;
347
348 /** Control of mask and alpha blending mode. */
349 typedef enum {
350 /** Masking and blending are disabled. */
351 ebiTFTMBDisabled = EBI_TFTCTRL_MASKBLEND_DISABLED,
352 /** Internal masking. */
353 ebiTFTMBIMask = EBI_TFTCTRL_MASKBLEND_IMASK,
354 /** Internal alpha blending. */
355 ebiTFTMBIAlpha = EBI_TFTCTRL_MASKBLEND_IALPHA,
356 /** Internal masking and alpha blending are enabled. */
357 #if defined(EBI_TFTCTRL_MASKBLEND_IMASKIALPHA)
358 ebiTFTMBIMaskAlpha = EBI_TFTCTRL_MASKBLEND_IMASKIALPHA,
359 #else
360 ebiTFTMBIMaskAlpha = EBI_TFTCTRL_MASKBLEND_IMASKALPHA,
361 #endif
362 #if defined(EBI_TFTCTRL_MASKBLEND_EMASK)
363 /** External masking. */
364 ebiTFTMBEMask = EBI_TFTCTRL_MASKBLEND_EMASK,
365 /** External alpha blending. */
366 ebiTFTMBEAlpha = EBI_TFTCTRL_MASKBLEND_EALPHA,
367 /** External masking and alpha blending. */
368 ebiTFTMBEMaskAlpha = EBI_TFTCTRL_MASKBLEND_EMASKEALPHA,
369 #else
370 /** External masking. */
371 ebiTFTMBEMask = EBI_TFTCTRL_MASKBLEND_EFBMASK,
372 /** External alpha blending. */
373 ebiTFTMBEAlpha = EBI_TFTCTRL_MASKBLEND_EFBALPHA,
374 /** External masking and alpha blending. */
375 ebiTFTMBEMaskAlpha = EBI_TFTCTRL_MASKBLEND_EFBMASKALPHA,
376 /** Internal Frame Buffer masking. */
377 ebiTFTMBEIMask = EBI_TFTCTRL_MASKBLEND_IFBMASK,
378 /** Internal Frame Buffer alpha blending. */
379 ebiTFTMBEIAlpha = EBI_TFTCTRL_MASKBLEND_IFBALPHA,
380 /** Internal Frame Buffer masking and alpha blending. */
381 ebiTFTMBEIMaskAlpha = EBI_TFTCTRL_MASKBLEND_IFBMASKALPHA,
382 #endif
383 } EBI_TFTMaskBlend_TypeDef;
384
385 /** TFT Direct Drive mode. */
386 typedef enum {
387 /** Disabled. */
388 ebiTFTDDModeDisabled = EBI_TFTCTRL_DD_DISABLED,
389 /** Direct Drive from internal memory. */
390 ebiTFTDDModeInternal = EBI_TFTCTRL_DD_INTERNAL,
391 /** Direct Drive from external memory. */
392 ebiTFTDDModeExternal = EBI_TFTCTRL_DD_EXTERNAL,
393 } EBI_TFTDDMode_TypeDef;
394
395 /** TFT Data Increment Width. */
396 typedef enum {
397 /** Pixel increments are 1 byte at a time. */
398 ebiTFTWidthByte = EBI_TFTCTRL_WIDTH_BYTE,
399 /** Pixel increments are 2 bytes (half word). */
400 ebiTFTWidthHalfWord = EBI_TFTCTRL_WIDTH_HALFWORD,
401 } EBI_TFTWidth_TypeDef;
402
403 #endif // _EBI_TFTCTRL_MASK
404
405 /*******************************************************************************
406 ******************************* STRUCTS ***********************************
407 ******************************************************************************/
408
409 /** EBI Initialization structure. */
410 typedef struct {
411 /** EBI operation mode, data, and address limits. */
412 EBI_Mode_TypeDef mode;
413 /** Address Ready pin polarity, active high or low. */
414 EBI_Polarity_TypeDef ardyPolarity;
415 /** Address Latch Enable pin polarity, active high or low. */
416 EBI_Polarity_TypeDef alePolarity;
417 /** Write Enable pin polarity, active high or low. */
418 EBI_Polarity_TypeDef wePolarity;
419 /** Read Enable pin polarity, active high or low. */
420 EBI_Polarity_TypeDef rePolarity;
421 /** Chip Select pin polarity, active high or low. */
422 EBI_Polarity_TypeDef csPolarity;
423 #if !defined(_EFM32_GECKO_FAMILY)
424 /** Byte Lane pin polarity, active high or low. */
425 EBI_Polarity_TypeDef blPolarity;
426 /** Flag to enable or disable Byte Lane support. */
427 bool blEnable;
428 /** Flag to enable or disable idle state insertion between transfers. */
429 bool noIdle;
430 #endif
431 /** Flag to enable or disable Address Ready support. */
432 bool ardyEnable;
433 /** Set to turn off 32 cycle timeout ability. */
434 bool ardyDisableTimeout;
435 /** Mask of flags which selects address banks to configure EBI_BANK<0-3>. */
436 uint32_t banks;
437 /** Mask of flags which selects chip select lines to configure EBI_CS<0-3>. */
438 uint32_t csLines;
439 /** Number of cycles address is held after Address Latch Enable is asserted. */
440 uint32_t addrSetupCycles;
441 /** Number of cycles address is driven onto the ADDRDAT bus before ALE is asserted. */
442 uint32_t addrHoldCycles;
443 #if !defined(_EFM32_GECKO_FAMILY)
444 /** Enable or disables half cycle duration of the ALE strobe in the last address setup cycle. */
445 bool addrHalfALE;
446 #endif
447 /** Number of cycles for address setup before REn is asserted. */
448 uint32_t readSetupCycles;
449 /** Number of cycles REn is held active */
450 uint32_t readStrobeCycles;
451 /** Number of cycles CSn is held active after REn is deasserted. */
452 uint32_t readHoldCycles;
453 #if !defined(_EFM32_GECKO_FAMILY)
454 /** Enable or disable page mode reads. */
455 bool readPageMode;
456 /** Enables or disable prefetching from sequential addresses. */
457 bool readPrefetch;
458 /** Enabled or disables half cycle duration of the REn signal in the last strobe cycle. */
459 bool readHalfRE;
460 #endif
461 /** Number of cycles for address setup before WEn is asserted. */
462 uint32_t writeSetupCycles;
463 /** Number of cycles WEn is held active */
464 uint32_t writeStrobeCycles;
465 /** Number of cycles CSn is held active after WEn is deasserted. */
466 uint32_t writeHoldCycles;
467 #if !defined(_EFM32_GECKO_FAMILY)
468 /** Enable or disable the write buffer */
469 bool writeBufferDisable;
470 /** Enables or disables half cycle duration of the WEn signal in the last strobe cycle. */
471 bool writeHalfWE;
472 /** Lower address pin limit to enable. */
473 EBI_ALow_TypeDef aLow;
474 /** High address pin limit to enable. */
475 EBI_AHigh_TypeDef aHigh;
476 #endif
477 #if defined(_EBI_ROUTE_LOCATION_MASK)
478 /** Pin Location. */
479 EBI_Location_TypeDef location;
480 #endif
481 /** Flag, if EBI should be enabled after configuration. */
482 bool enable;
483 } EBI_Init_TypeDef;
484
485 /** Default configuration for EBI initialization structures. */
486 #if defined(_SILICON_LABS_32B_SERIES_1)
487 #define EBI_INIT_DEFAULT \
488 { \
489 ebiModeD8A8, /* 8 bit address, 8 bit data. */ \
490 ebiActiveLow, /* ARDY polarity. */ \
491 ebiActiveLow, /* ALE polarity. */ \
492 ebiActiveLow, /* WE polarity. */ \
493 ebiActiveLow, /* RE polarity. */ \
494 ebiActiveLow, /* CS polarity. */ \
495 ebiActiveLow, /* BL polarity. */ \
496 false, /* Enable BL. */ \
497 false, /* Enable NOIDLE. */ \
498 false, /* Enable ARDY. */ \
499 false, /* Do not disable ARDY timeout. */ \
500 EBI_BANK0, /* Enable bank 0. */ \
501 EBI_CS0, /* Enable chip select 0. */ \
502 0, /* Address setup cycles. */ \
503 1, /* Address hold cycles. */ \
504 false, /* Do not enable half cycle ALE strobe. */ \
505 0, /* Read setup cycles. */ \
506 0, /* Read strobe cycles. */ \
507 0, /* Read hold cycles. */ \
508 false, /* Disable page mode. */ \
509 false, /* Disable prefetch. */ \
510 false, /* Do not enable half cycle REn strobe. */ \
511 0, /* Write setup cycles. */ \
512 0, /* Write strobe cycles. */ \
513 1, /* Write hold cycles. */ \
514 false, /* Do not disable the write buffer. */ \
515 false, /* Do not enable half cycle WEn strobe. */ \
516 ebiALowA0, /* ALB - Low bound, address lines. */ \
517 ebiAHighA0, /* APEN - High bound, address lines. */ \
518 true, /* Enable EBI. */ \
519 }
520 #elif !defined(_EFM32_GECKO_FAMILY)
521 #define EBI_INIT_DEFAULT \
522 { \
523 ebiModeD8A8, /* 8 bit address, 8 bit data. */ \
524 ebiActiveLow, /* ARDY polarity. */ \
525 ebiActiveLow, /* ALE polarity. */ \
526 ebiActiveLow, /* WE polarity. */ \
527 ebiActiveLow, /* RE polarity. */ \
528 ebiActiveLow, /* CS polarity. */ \
529 ebiActiveLow, /* BL polarity. */ \
530 false, /* Enable BL. */ \
531 false, /* Enable NOIDLE. */ \
532 false, /* Enable ARDY. */ \
533 false, /* Do not disable ARDY timeout. */ \
534 EBI_BANK0, /* Enable bank 0. */ \
535 EBI_CS0, /* Enable chip select 0. */ \
536 0, /* Address setup cycles. */ \
537 1, /* Address hold cycles. */ \
538 false, /* Do not enable half cycle ALE strobe. */ \
539 0, /* Read setup cycles. */ \
540 0, /* Read strobe cycles. */ \
541 0, /* Read hold cycles. */ \
542 false, /* Disable page mode. */ \
543 false, /* Disable prefetch. */ \
544 false, /* Do not enable half cycle REn strobe. */ \
545 0, /* Write setup cycles. */ \
546 0, /* Write strobe cycles. */ \
547 1, /* Write hold cycles. */ \
548 false, /* Do not disable the write buffer. */ \
549 false, /* Do not enable half cycle WEn strobe. */ \
550 ebiALowA0, /* ALB - Low bound, address lines. */ \
551 ebiAHighA0, /* APEN - High bound, address lines. */ \
552 ebiLocation0, /* Use Location. 0 */ \
553 true, /* Enable EBI. */ \
554 }
555 #else
556 #define EBI_INIT_DEFAULT \
557 { \
558 ebiModeD8A8, /* 8 bit address, 8 bit data. */ \
559 ebiActiveLow, /* ARDY polarity. */ \
560 ebiActiveLow, /* ALE polarity. */ \
561 ebiActiveLow, /* WE polarity. */ \
562 ebiActiveLow, /* RE polarity. */ \
563 ebiActiveLow, /* CS polarity. */ \
564 false, /* Enable ARDY. */ \
565 false, /* Do not disable ARDY timeout. */ \
566 EBI_BANK0, /* Enable bank 0. */ \
567 EBI_CS0, /* Enable chip select 0. */ \
568 0, /* Address setup cycles. */ \
569 1, /* Address hold cycles. */ \
570 0, /* Read setup cycles. */ \
571 0, /* Read strobe cycles. */ \
572 0, /* Read hold cycles. */ \
573 0, /* Write setup cycles. */ \
574 0, /* Write strobe cycles. */ \
575 1, /* Write hold cycles. */ \
576 true, /* Enable EBI. */ \
577 }
578 #endif
579
580 #if defined(_EBI_TFTCTRL_MASK)
581
582 /** TFT Initialization structure. */
583 typedef struct {
584 /** External memory bank for driving display. */
585 EBI_TFTBank_TypeDef bank;
586 /** Width. */
587 EBI_TFTWidth_TypeDef width;
588 /** Color source for masking and alpha blending. */
589 EBI_TFTColorSrc_TypeDef colSrc;
590 /** Bus Interleave mode. */
591 EBI_TFTInterleave_TypeDef interleave;
592 /** Trigger for updating frame buffer pointer. */
593 EBI_TFTFrameBufTrigger_TypeDef fbTrigger;
594 /** Drive DCLK from negative clock edge of internal clock. */
595 bool shiftDClk;
596 /** Masking and alpha blending mode. */
597 EBI_TFTMaskBlend_TypeDef maskBlend;
598 /** TFT Direct Drive mode. */
599 EBI_TFTDDMode_TypeDef driveMode;
600 /** TFT Polarity for Chip Select (CS) Line. */
601 EBI_Polarity_TypeDef csPolarity;
602 /** TFT Polarity for Data Clock (DCLK) Line. */
603 EBI_Polarity_TypeDef dclkPolarity;
604 /** TFT Polarity for Data Enable (DATAEN) Line. */
605 EBI_Polarity_TypeDef dataenPolarity;
606 /** TFT Polarity for Horizontal Sync (HSYNC) Line. */
607 EBI_Polarity_TypeDef hsyncPolarity;
608 /** TFT Polarity for Vertical Sync (VSYNC) Line. */
609 EBI_Polarity_TypeDef vsyncPolarity;
610 /** Horizontal size in pixels. */
611 int hsize;
612 /** Horizontal Front Porch Size. */
613 int hPorchFront;
614 /** Horizontal Back Porch Size. */
615 int hPorchBack;
616 /** Horizontal Synchronization Pulse Width. */
617 int hPulseWidth;
618 /** Vertical size in pixels. */
619 int vsize;
620 /** Vertical Front Porch Size. */
621 int vPorchFront;
622 /** Vertical Back Porch Size. */
623 int vPorchBack;
624 /** Vertical Synchronization Pulse Width. */
625 int vPulseWidth;
626 /** TFT Frame Buffer address, offset to EBI bank base address. */
627 uint32_t addressOffset;
628 /** TFT DCLK period in internal cycles. */
629 int dclkPeriod;
630 /** Starting position of External Direct Drive relative to DCLK inactive edge. */
631 int startPosition;
632 /** Number of cycles RGB data is driven before active edge of DCLK. */
633 int setupCycles;
634 /** Number of cycles RGB data is held after active edge of DCLK. */
635 int holdCycles;
636 } EBI_TFTInit_TypeDef;
637
638 /** Default configuration for EBI TFT initialization structure. */
639 #define EBI_TFTINIT_DEFAULT \
640 { \
641 ebiTFTBank0, /* Select EBI Bank 0. */ \
642 ebiTFTWidthHalfWord, /* Select 2-byte increments. */ \
643 ebiTFTColorSrcMem, /* Use memory as source for mask/blending. */ \
644 ebiTFTInterleaveUnlimited, /* Unlimited interleaved accesses. */ \
645 ebiTFTFrameBufTriggerVSync, /* VSYNC as frame buffer update trigger. */ \
646 false, /* Drive DCLK from negative edge of internal clock. */ \
647 ebiTFTMBDisabled, /* No masking and alpha blending enabled. */ \
648 ebiTFTDDModeExternal, /* Drive from external memory. */ \
649 ebiActiveLow, /* CS Active Low polarity. */ \
650 ebiActiveLow, /* DCLK Active Low polarity. */ \
651 ebiActiveLow, /* DATAEN Active Low polarity. */ \
652 ebiActiveLow, /* HSYNC Active Low polarity. */ \
653 ebiActiveLow, /* VSYNC Active Low polarity. */ \
654 320, /* Horizontal size in pixels. */ \
655 1, /* Horizontal Front Porch. */ \
656 29, /* Horizontal Back Porch. */ \
657 2, /* Horizontal Synchronization Pulse Width. */ \
658 240, /* Vertical size in pixels. */ \
659 1, /* Vertical Front Porch. */ \
660 4, /* Vertical Back Porch. */ \
661 2, /* Vertical Synchronization Pulse Width. */ \
662 0x0000, /* Address offset to EBI memory base. */ \
663 5, /* DCLK Period. */ \
664 2, /* DCLK Start. */ \
665 1, /* DCLK Setup cycles. */ \
666 1, /* DCLK Hold cycles. */ \
667 }
668 #endif
669
670 /*******************************************************************************
671 ***************************** PROTOTYPES **********************************
672 ******************************************************************************/
673
674 void EBI_Init(const EBI_Init_TypeDef *ebiInit);
675 void EBI_Disable(void);
676 uint32_t EBI_BankAddress(uint32_t bank);
677 void EBI_BankEnable(uint32_t banks, bool enable);
678
679 #if defined(_EBI_NANDCTRL_MASK)
680 void EBI_NANDFlashEnable(uint32_t banks, bool enable);
681 #endif
682
683 #if defined(_EBI_TFTCTRL_MASK)
684 void EBI_TFTInit(const EBI_TFTInit_TypeDef *ebiTFTInit);
685 void EBI_TFTSizeSet(uint32_t horizontal, uint32_t vertical);
686 void EBI_TFTHPorchSet(uint32_t front, uint32_t back, uint32_t pulseWidth);
687 void EBI_TFTVPorchSet(uint32_t front, uint32_t back, uint32_t pulseWidth);
688 void EBI_TFTTimingSet(uint32_t dclkPeriod, uint32_t start, uint32_t setup, uint32_t hold);
689 #endif
690
691 #if !defined(_EFM32_GECKO_FAMILY)
692 /* This functionality is only available on devices with independent timing support. */
693 void EBI_BankReadTimingSet(uint32_t bank, uint32_t setupCycles, uint32_t strobeCycles, uint32_t holdCycles);
694 void EBI_BankReadTimingConfig(uint32_t bank, bool pageMode, bool prefetch, bool halfRE);
695
696 void EBI_BankWriteTimingSet(uint32_t bank, uint32_t setupCycles, uint32_t strobeCycles, uint32_t holdCycles);
697 void EBI_BankWriteTimingConfig(uint32_t bank, bool writeBufDisable, bool halfWE);
698
699 void EBI_BankAddressTimingSet(uint32_t bank, uint32_t setupCycles, uint32_t holdCycles);
700 void EBI_BankAddressTimingConfig(uint32_t bank, bool halfALE);
701
702 void EBI_BankPolaritySet(uint32_t bank, EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
703 void EBI_BankByteLaneEnable(uint32_t bank, bool enable);
704 void EBI_AltMapEnable(bool enable);
705 #endif
706
707 #if defined(_EBI_TFTCTRL_MASK)
708 /***************************************************************************//**
709 * @brief
710 * Enable or disable TFT Direct Drive.
711 *
712 * @param[in] mode
713 * Drive from Internal or External memory, or Disable Direct Drive.
714 ******************************************************************************/
EBI_TFTEnable(EBI_TFTDDMode_TypeDef mode)715 __STATIC_INLINE void EBI_TFTEnable(EBI_TFTDDMode_TypeDef mode)
716 {
717 EBI->TFTCTRL = (EBI->TFTCTRL & ~(_EBI_TFTCTRL_DD_MASK)) | (uint32_t) mode;
718 }
719
720 /***************************************************************************//**
721 * @brief
722 * Configure frame buffer pointer.
723 *
724 * @param[in] address
725 * Frame pointer address, as offset by EBI base address.
726 ******************************************************************************/
EBI_TFTFrameBaseSet(uint32_t address)727 __STATIC_INLINE void EBI_TFTFrameBaseSet(uint32_t address)
728 {
729 EBI->TFTFRAMEBASE = (uint32_t) address;
730 }
731
732 /***************************************************************************//**
733 * @brief Set TFT Pixel Color 0 or 1.
734 *
735 * @param[in] pixel
736 * Which pixel instance to set.
737 * @param[in] color
738 * Color of pixel, 16-bit value.
739 ******************************************************************************/
EBI_TFTPixelSet(int pixel,uint32_t color)740 __STATIC_INLINE void EBI_TFTPixelSet(int pixel, uint32_t color)
741 {
742 EFM_ASSERT(pixel == 0 || pixel == 1);
743
744 if (pixel == 0) {
745 EBI->TFTPIXEL0 = color;
746 }
747 if (pixel == 1) {
748 EBI->TFTPIXEL1 = color;
749 }
750 }
751
752 /***************************************************************************//**
753 * @brief Set TFT Direct Drive Data from Internal Memory
754 *
755 * @param[in] color
756 * Color of pixel
757 ******************************************************************************/
EBI_TFTDDSet(uint32_t color)758 __STATIC_INLINE void EBI_TFTDDSet(uint32_t color)
759 {
760 EBI->TFTDD = color & _EBI_TFTDD_MASK;
761 }
762
763 #if defined(_EBI_TFTCOLORFORMAT_MASK)
764 /***************************************************************************//**
765 * @brief Set TFT Color Format
766 *
767 * @param[in] color0
768 * ARGB color format to be used.
769 *
770 * @param[in] color1
771 * RGB color format to be used.
772 ******************************************************************************/
EBI_TFTColorFormatSet(EBI_TFTColorFormat_TypeDef color0,EBI_TFTColorFormat_TypeDef color1)773 __STATIC_INLINE void EBI_TFTColorFormatSet(EBI_TFTColorFormat_TypeDef color0, EBI_TFTColorFormat_TypeDef color1)
774 {
775 EBI->TFTCOLORFORMAT = color0 | color1;
776 }
777 #endif
778
779 /***************************************************************************//**
780 * @brief Masking and Blending Mode Set.
781 *
782 * @param[in] maskBlend
783 * Masking and alpha blending mode.
784 ******************************************************************************/
EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)785 __STATIC_INLINE void EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)
786 {
787 EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK)) | maskBlend;
788 }
789
790 /***************************************************************************//**
791 * @brief Masking and Blending Color1 Source Set.
792 *
793 * @param[in] colorSrc
794 * Color1 source.
795 ******************************************************************************/
EBI_TFTColorSrcSet(EBI_TFTColorSrc_TypeDef colorSrc)796 __STATIC_INLINE void EBI_TFTColorSrcSet(EBI_TFTColorSrc_TypeDef colorSrc)
797 {
798 EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_COLOR1SRC_MASK)) | colorSrc;
799 }
800
801 /***************************************************************************//**
802 * @brief Set TFT Alpha Blending Factor.
803 *
804 * @param[in] alpha
805 * 8-bit value indicating blending factor.
806 ******************************************************************************/
EBI_TFTAlphaBlendSet(uint8_t alpha)807 __STATIC_INLINE void EBI_TFTAlphaBlendSet(uint8_t alpha)
808 {
809 EBI->TFTALPHA = alpha;
810 }
811
812 /***************************************************************************//**
813 * @brief Set TFT mask value.
814 * Data accesses that matches this value are suppressed.
815 * @param[in] mask
816 ******************************************************************************/
EBI_TFTMaskSet(uint32_t mask)817 __STATIC_INLINE void EBI_TFTMaskSet(uint32_t mask)
818 {
819 EBI->TFTMASK = mask;
820 }
821
822 /***************************************************************************//**
823 * @brief Get current vertical position counter.
824 * @return
825 * Returns the current line position for the visible part of a frame.
826 ******************************************************************************/
EBI_TFTVCount(void)827 __STATIC_INLINE uint32_t EBI_TFTVCount(void)
828 {
829 return((EBI->TFTSTATUS & _EBI_TFTSTATUS_VCNT_MASK) >> _EBI_TFTSTATUS_VCNT_SHIFT);
830 }
831
832 /***************************************************************************//**
833 * @brief Get current horizontal position counter.
834 * @return
835 * Returns the current horizontal pixel position within a visible line.
836 ******************************************************************************/
EBI_TFTHCount(void)837 __STATIC_INLINE uint32_t EBI_TFTHCount(void)
838 {
839 return((EBI->TFTSTATUS & _EBI_TFTSTATUS_HCNT_MASK) >> _EBI_TFTSTATUS_HCNT_SHIFT);
840 }
841
842 /***************************************************************************//**
843 * @brief Set Frame Buffer Trigger.
844 *
845 * @details
846 * Frame buffer pointer will be updated either on each horizontal line (hsync)
847 * or vertical update (vsync).
848 *
849 * @param[in] sync
850 * Trigger update of frame buffer pointer on vertical or horizontal sync.
851 ******************************************************************************/
EBI_TFTFBTriggerSet(EBI_TFTFrameBufTrigger_TypeDef sync)852 __STATIC_INLINE void EBI_TFTFBTriggerSet(EBI_TFTFrameBufTrigger_TypeDef sync)
853 {
854 EBI->TFTCTRL = ((EBI->TFTCTRL & ~_EBI_TFTCTRL_FBCTRIG_MASK) | sync);
855 }
856
857 /***************************************************************************//**
858 * @brief Set horizontal TFT stride value in number of bytes.
859 *
860 * @param[in] nbytes
861 * Number of bytes to add to frame buffer pointer after each horizontal line
862 * update.
863 ******************************************************************************/
EBI_TFTHStrideSet(uint32_t nbytes)864 __STATIC_INLINE void EBI_TFTHStrideSet(uint32_t nbytes)
865 {
866 EFM_ASSERT(nbytes < 0x1000);
867
868 EBI->TFTSTRIDE = (EBI->TFTSTRIDE & ~(_EBI_TFTSTRIDE_HSTRIDE_MASK))
869 | (nbytes << _EBI_TFTSTRIDE_HSTRIDE_SHIFT);
870 }
871 #endif // _EBI_TFTCTRL_MASK
872
873 #if defined(_EBI_IF_MASK)
874 /***************************************************************************//**
875 * @brief
876 * Clear one or more pending EBI interrupts.
877 * @param[in] flags
878 * Pending EBI interrupt source to clear. Use a logical OR combination
879 * of valid interrupt flags for the EBI module (EBI_IF_nnn).
880 ******************************************************************************/
EBI_IntClear(uint32_t flags)881 __STATIC_INLINE void EBI_IntClear(uint32_t flags)
882 {
883 EBI->IFC = flags;
884 }
885
886 /***************************************************************************//**
887 * @brief
888 * Set one or more pending EBI interrupts.
889 *
890 * @param[in] flags
891 * EBI interrupt sources to set to pending. Use a logical OR combination of
892 * valid interrupt flags for the EBI module (EBI_IF_nnn).
893 ******************************************************************************/
EBI_IntSet(uint32_t flags)894 __STATIC_INLINE void EBI_IntSet(uint32_t flags)
895 {
896 EBI->IFS = flags;
897 }
898
899 /***************************************************************************//**
900 * @brief
901 * Disable one or more EBI interrupts.
902 *
903 * @param[in] flags
904 * EBI interrupt sources to disable. Use logical OR combination of valid
905 * interrupt flags for the EBI module (EBI_IF_nnn)
906 ******************************************************************************/
EBI_IntDisable(uint32_t flags)907 __STATIC_INLINE void EBI_IntDisable(uint32_t flags)
908 {
909 EBI->IEN &= ~(flags);
910 }
911
912 /***************************************************************************//**
913 * @brief
914 * Enable one or more EBI interrupts.
915 *
916 * @param[in] flags
917 * EBI interrupt sources to enable. Use logical OR combination of valid
918 * interrupt flags for the EBI module (EBI_IF_nnn)
919 ******************************************************************************/
EBI_IntEnable(uint32_t flags)920 __STATIC_INLINE void EBI_IntEnable(uint32_t flags)
921 {
922 EBI->IEN |= flags;
923 }
924
925 /***************************************************************************//**
926 * @brief
927 * Get pending EBI interrupt flags.
928 *
929 * @note
930 * Event bits are not cleared by the use of this function.
931 *
932 * @return
933 * EBI interrupt sources pending, a logical combination of valid EBI
934 * interrupt flags, EBI_IF_nnn.
935 ******************************************************************************/
EBI_IntGet(void)936 __STATIC_INLINE uint32_t EBI_IntGet(void)
937 {
938 return EBI->IF;
939 }
940
941 /***************************************************************************//**
942 * @brief
943 * Get enabled and pending EBI interrupt flags.
944 * Useful for handling more interrupt sources in the same interrupt handler.
945 *
946 * @note
947 * Interrupt flags are not cleared by the use of this function.
948 *
949 * @return
950 * Pending and enabled EBI interrupt sources.
951 * The return value is the bitwise AND of
952 * - the enabled interrupt sources in EBI_IEN and
953 * - the pending interrupt flags EBI_IF.
954 ******************************************************************************/
EBI_IntGetEnabled(void)955 __STATIC_INLINE uint32_t EBI_IntGetEnabled(void)
956 {
957 uint32_t ien;
958
959 ien = EBI->IEN;
960 return EBI->IF & ien;
961 }
962 #endif // _EBI_IF_MASK
963
964 #if defined(_EBI_CMD_MASK)
965 /***************************************************************************//**
966 * @brief
967 * Start ECC generator on NAND flash transfers.
968 ******************************************************************************/
EBI_StartNandEccGen(void)969 __STATIC_INLINE void EBI_StartNandEccGen(void)
970 {
971 EBI->CMD = EBI_CMD_ECCSTART | EBI_CMD_ECCCLEAR;
972 }
973
974 /***************************************************************************//**
975 * @brief
976 * Stop NAND flash ECC generator and return generated ECC.
977 *
978 * @return
979 * The generated ECC.
980 ******************************************************************************/
EBI_StopNandEccGen(void)981 __STATIC_INLINE uint32_t EBI_StopNandEccGen(void)
982 {
983 EBI->CMD = EBI_CMD_ECCSTOP;
984 return EBI->ECCPARITY;
985 }
986 #endif // _EBI_CMD_MASK
987
988 void EBI_ChipSelectEnable(uint32_t banks, bool enable);
989 void EBI_ReadTimingSet(uint32_t setupCycles, uint32_t strobeCycles, uint32_t holdCycles);
990 void EBI_WriteTimingSet(uint32_t setupCycles, uint32_t strobeCycles, uint32_t holdCycles);
991 void EBI_AddressTimingSet(uint32_t setupCycles, uint32_t holdCycles);
992 void EBI_PolaritySet(EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
993
994 /** @} (end addtogroup ebi) */
995
996 #ifdef __cplusplus
997 }
998 #endif
999
1000 #endif /* defined(EBI_COUNT) && (EBI_COUNT > 0) */
1001
1002 #endif /* EM_EBI_H */
1003
