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/hal_xtensa-3.6.0/include/xtensa/
Dcore-macros.h334 # define XTHAL_SET_INTENABLE(v) do { int __intenable = (int)(v); \ argument
340 # define XTHAL_SET_INTSET(v) do { int __interrupt = (int)(v); \ argument
343 # define XTHAL_SET_INTCLEAR(v) do { int __interrupt = (int)(v); \ argument
349 # define XTHAL_SET_CCOUNT(v) do { int __ccount = (int)(v); \ argument
356 # define _XTHAL_SET_CCOMPARE(n,v) do { int __ccompare = (int)(v); \ argument
359 # define XTHAL_SET_CCOMPARE(n,v) _XTHAL_SET_CCOMPARE(n,v) argument
362 # define XTHAL_SET_INTENABLE(v) do {/*nothing*/} while(0) argument
364 # define XTHAL_SET_INTSET(v) do {/*nothing*/} while(0) argument
365 # define XTHAL_SET_INTCLEAR(v) do {/*nothing*/} while(0) argument
367 # define XTHAL_SET_CCOUNT(v) do {/*nothing*/} while(0) argument
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/hal_xtensa-3.6.0/src/hal/
Dmpu.c174 static inline void write_cacheadrdis(unsigned v) in write_cacheadrdis()