1 #if CONFIG_WLS_CSI_PROC 2 /** @file wls_structure_defs.h 3 * 4 * @brief This file contains header file for CSI structure definitions 5 * 6 * Copyright 2023-2024 NXP 7 * 8 * SPDX-License-Identifier: BSD-3-Clause 9 * 10 */ 11 12 /************************************************************************ 13 * DFW Header file for CSI structure definitions 14 ************************************************************************/ 15 16 #ifndef WLS_STRUCTURE_DEFS_H 17 #define WLS_STRUCTURE_DEFS_H 18 19 #include "wls_param_defines.h" 20 21 #ifndef DEF_TYPES 22 #define DEF_TYPES 23 #define SINT8 signed char 24 #define SINT16 signed short 25 #define SINT32 signed int 26 #define SINT64 signed long long 27 #define UINT8 unsigned char 28 #define UINT16 unsigned short 29 #define UINT32 unsigned int 30 #define UINT64 unsigned long long 31 #endif 32 33 typedef struct csiHeaderInfoStruct 34 { 35 unsigned char csi; 36 unsigned char LTF; 37 unsigned short dataLength; 38 unsigned short FCF; 39 unsigned short dataParameter; 40 unsigned int HTCF; 41 unsigned int TSF; 42 unsigned char ADDR1[6]; 43 unsigned char ADDR2[6]; 44 unsigned char SBFnIndex; 45 // unsigned short PKTinfo; 46 unsigned char rxDevBw; 47 unsigned char nRx; 48 unsigned char nTx; 49 unsigned char Ng; 50 unsigned char sigBw; 51 unsigned char psb; 52 unsigned char packetType; 53 54 unsigned char cfoCourseEst; 55 // unsigned int LSig; 56 unsigned char LSigRate; 57 unsigned char LSigRateMbps; 58 unsigned short LSigLength; 59 unsigned char LSigParity; 60 unsigned char LSigTail; 61 62 unsigned char cfoFineEst; 63 64 unsigned char HtSigMcs; 65 unsigned char HtSigCbw20_40; 66 unsigned short HtSigLength; 67 68 unsigned char HtSigSmoothing; 69 unsigned char HtSigNotSounding; 70 unsigned char HtSigAggregation; 71 unsigned char HtSigStbc; 72 unsigned char HtSigFecCoding; 73 unsigned char HtSigShortGi; 74 unsigned char HtSigNoExtSpatStreams; 75 unsigned char HtSigCrc; 76 unsigned char HtSigTailBits; 77 78 unsigned char VhtSigBw; 79 unsigned char VhtSigStbc; 80 unsigned char VhtSigGroupId; 81 unsigned char VhtSigSuNoSts; 82 unsigned short VhtSigPartialAid; 83 unsigned char VhtSigTxOpPsNotAllwd; 84 85 unsigned char VhtSigShortGi; 86 unsigned char VhtSigShortGiDisAmb; 87 unsigned char VhtSigSuCoding; 88 unsigned char VhtSigLdpcExtraSymb; 89 unsigned char VhtSigMcs; 90 unsigned char VhtSigBeamformed; 91 unsigned char VhtSigCrc; 92 unsigned char VhtSigTail; 93 94 unsigned char rxNoiseFloor, rxNfA, rxNfB, rxNfC, rxNfD; 95 unsigned char rxRssi, rxRssiA, rxRssiB, rxRssiC, rxRssiD; 96 97 unsigned char LltfDvgaCtrMax; 98 unsigned char LltfBbCtrMax; 99 unsigned char LltfIfCtrMax; 100 unsigned char LltfLnaCtrMax; 101 unsigned char LltfSlnaMax; 102 103 unsigned char HtDvgaCtrMax; 104 unsigned char HtBbCtrMax; 105 unsigned char HtIfCtrMax; 106 unsigned char HtLnaCtrMax; 107 unsigned char HtSlnaMax; 108 109 unsigned char isLtf; 110 unsigned char NgDsfShift; 111 unsigned char scOffset; 112 113 int totalGainLltf; 114 int totalGainCsi; 115 116 } CsiHeaderInfo; 117 118 #define SOC_W8X64 119 #define SOC_W8864 120 #define SOC_W8964 121 122 typedef struct hal_rxinfo 123 { 124 // DWORD-0 125 #ifdef SOC_W8X64 126 UINT32 reserved0 : 16; 127 UINT32 sign : 16; // 0xBEEF: tagged by MAC HW 128 // DWORD-1 129 #ifdef SOC_W8964 130 UINT32 cfo : 17; 131 UINT32 reservedcfo : 7; 132 UINT32 nf : 8; 133 #else 134 UINT8 nf_c; 135 UINT8 nf_b; 136 UINT8 nf_a; 137 UINT8 nf; 138 #endif 139 // DWORD-2 140 #ifdef SOC_W8964 141 UINT16 dta : 12; 142 UINT16 reserveddta : 4; 143 UINT8 t2; 144 #else 145 UINT8 rssi_c; 146 UINT8 rssi_b; 147 UINT8 rssi_a; 148 #endif 149 UINT8 rssi; // RSSI 150 // DWORD-3 151 UINT16 Rxlength; 152 UINT16 rx_svc; 153 // DWORD-4 154 UINT32 rx_cq : 24; 155 #ifdef SOC_W8964 156 UINT32 reservedrxcq : 8; 157 #else 158 UINT32 rssi_d : 8; 159 #endif 160 // DWORD-5 161 UINT32 ht_sig1 : 24; 162 #ifdef SOC_W8964 163 UINT32 reservedhtsig : 8; 164 #else 165 UINT32 nf_d : 8; 166 #endif 167 // DWORD-6 168 UINT32 ht_sig2 : 18; 169 UINT32 Rx_LSig_Rsvd : 1; 170 UINT32 Rx_LSig_parity : 1; 171 UINT32 Rx_LSig_bad_parity : 1; 172 UINT32 Rx_HTSig_bad_crc : 3; 173 UINT32 rate : 8; 174 #ifdef SOC_W8864 175 // DWORD-7 176 UINT32 Rx_Gain_code_a : 22; 177 UINT32 BBU_Reserved_9_0 : 10; 178 // DWORD-8 179 UINT32 Rx_Gain_code_b : 22; 180 UINT32 BBU_Reserved_19_10 : 10; 181 // DWORD-9 182 UINT32 Rx_Gain_code_c : 22; 183 UINT32 BBU_Reserved_29_20 : 10; 184 // DWORD-10 185 UINT32 Rx_Gain_code_d : 22; 186 #ifdef SOC_W8964 187 UINT32 BBU_Reserved_35_30 : 6; 188 UINT32 mu_cq_valid : 4; 189 #else 190 UINT32 BBU_Reserved_39_30 : 10; 191 #endif 192 // DWORD-11 193 UINT32 pm_rssi_dbm_b : 12; 194 UINT32 pm_rssi_dbm_a : 12; 195 #ifdef SOC_W8964 196 UINT32 mu_cq0 : 8; 197 #else 198 UINT32 BBU_Reserved_47_40 : 8; 199 #endif 200 // DWORD-12 201 UINT32 pm_rssi_dbm_d : 12; 202 UINT32 pm_rssi_dbm_c : 12; 203 #ifdef SOC_W8964 204 UINT32 mu_cq1 : 8; 205 #else 206 UINT32 BBU_Reserved_55_48 : 8; 207 #endif 208 // DWORD-13 209 UINT32 pm_nf_dbm_b : 12; 210 UINT32 pm_nf_dbm_a : 12; 211 #ifdef SOC_W8964 212 UINT32 mu_cq2 : 8; 213 #else 214 UINT32 BBU_Reserved_63_56 : 8; 215 #endif 216 // DWORD-14 217 UINT32 pm_nf_dbm_d : 12; 218 UINT32 pm_nf_dbm_c : 12; 219 #ifdef SOC_W8964 220 UINT32 mu_cq3 : 8; 221 #else 222 UINT32 BBU_Reserved_71_64 : 8; 223 #endif 224 // DWORD-15 225 UINT32 rx_pkt_secondary : 1; 226 UINT32 rx_dyn_bw : 1; 227 UINT32 rx_ind_bw : 2; 228 UINT32 rx_dup_likely_bw : 2; 229 UINT32 rx_pkt_info : 3; 230 #ifdef SOC_W8964 231 UINT32 rx_vhtsigb : 23; 232 // DWORD-16 233 UINT16 lltf_phroll; 234 UINT16 htlf_phroll; 235 #else 236 UINT32 ReservedDword15 : 23; 237 // DWORD-16 238 UINT32 ReservedDword16; 239 #endif 240 // DWORD-17 241 UINT32 T2; 242 // DWORD-18 243 UINT32 T3; 244 // DWORD-19 245 UINT32 Rx_timestamp; 246 // DWORD-20 247 UINT32 TSF; 248 // DWORD-21 249 UINT32 param : 24; 250 UINT32 Rx_AMPDU_Num : 8; 251 // DWORD-22 252 UINT16 qc; // 253 UINT16 sq2; // temp tookout foo fb_mcs_param; 254 // DWORD - 23 255 UINT32 ht_ctrl; // 256 #else 257 // DWORD-7 258 UINT32 Rx_Gain_code_a : 21; 259 UINT32 BBU_Reserved_10_0 : 11; 260 // DWORD-8 261 UINT32 Rx_Gain_code_b : 21; 262 UINT32 BBU_Reserved_22_11 : 11; 263 // DWORD-9 264 UINT32 Rx_Gain_code_c : 21; 265 UINT32 BBU_Reserved_32_22 : 11; 266 // DWORD-10 267 UINT32 Rx_Gain_code_d : 21; 268 UINT32 BBU_Reserved_43_33 : 11; 269 // DWORD-11 270 UINT32 Rx_timestamp; 271 // DWORD-12 272 UINT32 TSF; 273 // DWORD-13 274 UINT32 param : 24; 275 UINT32 Rx_AMPDU_Num : 8; 276 // DWORD-14 277 UINT16 qc; 278 UINT16 sq2; // temp tookout foo fb_mcs_param; 279 // DWORD-15 280 UINT32 ht_ctrl; 281 #endif 282 283 #else 284 UINT32 ht_sig2 : 10; 285 UINT32 params_hi : 6; 286 UINT32 sign : 16; /* Signature = 0xBEEF */ 287 288 // 1 289 UINT8 param; 290 UINT8 sq1; 291 UINT8 rate; 292 UINT8 rssi; 293 // 2 294 UINT8 ts_low; /* timestamp [7:0] */ 295 UINT8 nf; /* Noise floor */ 296 UINT16 ts_hi; /* timestamp [23:8] */ 297 // 3 298 UINT16 qc; /* QoS control */ 299 UINT16 sq2; 300 301 // 4 302 UINT32 ht_sig1; 303 304 // 5 305 UINT8 rssi_c; 306 UINT8 rssi_b; 307 UINT8 rssi_a; 308 UINT8 svc_low; 309 310 // 6 311 UINT8 nf_c; 312 UINT8 nf_b; 313 UINT8 nf_a; 314 UINT8 svc_hi; 315 316 // 7 317 UINT32 ht_ctrl; 318 #endif 319 } hal_rxinfo_t; 320 321 typedef struct hal_csirxinfo 322 { 323 #ifdef SMAC_BFINFO 324 // DWORD-0 325 UINT32 header_length : 13; 326 UINT32 rsvd0 : 3; 327 UINT32 signature : 16; // 0x0000 328 // DWORD-1 329 UINT32 pktinfo : 20; 330 UINT32 rsvd1 : 12; 331 // DWORD-2 332 UINT32 lsig : 24; 333 UINT32 cfo_coarse : 8; 334 // DWORD-3 335 UINT32 htsig1 : 24; 336 UINT32 cfo_fine : 8; 337 // DWORD-4 338 UINT32 htsig2 : 24; 339 UINT32 rsvd2 : 8; 340 // DWORD-5 341 UINT32 rx_rssi : 8; 342 UINT32 rx_noise_floor : 8; 343 UINT32 rsvd3 : 16; 344 // DWORD-6 345 UINT32 rx_rssi_a : 8; 346 UINT32 rx_rssi_b : 8; 347 UINT32 rx_rssi_c : 8; 348 UINT32 rx_rssi_d : 8; 349 // DWORD-7 350 UINT32 rx_rssi_e : 8; 351 UINT32 rx_rssi_f : 8; 352 UINT32 rx_rssi_g : 8; 353 UINT32 rx_rssi_h : 8; 354 // DWORD-8 355 UINT32 rx_nf_a : 8; 356 UINT32 rx_nf_b : 8; 357 UINT32 rx_nf_c : 8; 358 UINT32 rx_nf_d : 8; 359 // DWORD-9 360 UINT32 rx_nf_e : 8; 361 UINT32 rx_nf_f : 8; 362 UINT32 rx_nf_g : 8; 363 UINT32 rx_nf_h : 8; 364 // DWORD-10 365 UINT32 gain_code_11ft : 24; 366 UINT32 rsvd4 : 8; 367 // DWORD-11 368 UINT32 gain_code_ht : 24; 369 UINT32 rsvd5 : 8; 370 // DWORD-12 371 UINT32 timestamp_0; 372 // DWORD-13 373 UINT32 timestamp_1; 374 // DWORD-14 375 UINT32 timestamp_2; 376 // DWORD-15 377 UINT32 timestamp_3; 378 // DWORD-16 379 UINT32 timestamp_4; 380 // DWORD-17 381 UINT32 timestamp_5; 382 // DWORD-18 383 UINT32 timestamp_6; 384 // DWORD-19 385 UINT32 timestamp_7; 386 // DWORD-20 387 UINT32 timestamp_8; 388 #else 389 // DWORD-0 390 UINT32 data_length : 13; // Includes BF_INFO, LTF Data, and CSI Data. Length in dwords 391 UINT32 ltf : 1; 392 UINT32 csi : 1; 393 UINT32 tbd : 1; 394 UINT32 signature : 16; // 0xABCD: tagged by MAC HW 395 // DWORD-1 396 UINT32 dataparam : 16; 397 UINT32 fcf : 16; 398 // DWORD-2 399 UINT32 htcf; 400 // DWORD-3 401 UINT32 tsf; 402 // DWORD-4 403 UINT32 addr1_lo; 404 // DWORD-5 405 UINT32 addr1_hi : 16; 406 UINT32 addr2_lo : 16; 407 // DWORD-6 408 UINT32 addr2_hi; 409 // DWORD-7 410 UINT32 sbfnindex : 7; 411 UINT32 rsvd0 : 17; 412 UINT32 rx_ppdu_seq : 8; 413 // DWORD-8 -- start of BBUD portion, same as SC5/SCBT 414 // DWORD-1 415 UINT32 pktinfo : 20; 416 UINT32 rsvd1 : 12; 417 // DWORD-2 418 UINT32 lsig : 24; 419 UINT32 cfo_coarse : 8; 420 // DWORD-3 421 UINT32 htsig1 : 24; 422 UINT32 cfo_fine : 8; 423 // DWORD-4 424 UINT32 htsig2 : 24; 425 UINT32 rsvd2 : 8; 426 // DWORD-5 427 UINT32 rx_rssi : 8; 428 UINT32 rx_noise_floor : 8; 429 UINT32 rsvd3 : 16; 430 // DWORD-6 431 UINT32 rx_rssi_a : 8; 432 UINT32 rx_rssi_b : 8; 433 UINT32 rx_rssi_c : 8; 434 UINT32 rx_rssi_d : 8; 435 // DWORD-7 436 UINT32 rx_rssi_e : 8; 437 UINT32 rx_rssi_f : 8; 438 UINT32 rx_rssi_g : 8; 439 UINT32 rx_rssi_h : 8; 440 // DWORD-8 441 UINT32 rx_nf_a : 8; 442 UINT32 rx_nf_b : 8; 443 UINT32 rx_nf_c : 8; 444 UINT32 rx_nf_d : 8; 445 // DWORD-9 446 UINT32 rx_nf_e : 8; 447 UINT32 rx_nf_f : 8; 448 UINT32 rx_nf_g : 8; 449 UINT32 rx_nf_h : 8; 450 // DWORD-10 451 UINT32 gain_code_11ft : 24; 452 UINT32 rsvd4 : 8; 453 // DWORD-11 454 UINT32 gain_code_ht : 24; 455 UINT32 rsvd5 : 8; 456 // DWORD-12 457 UINT32 timestamp_0; 458 // DWORD-13 459 UINT32 timestamp_1; 460 // DWORD-14 461 UINT32 timestamp_2; 462 // DWORD-15 463 UINT32 timestamp_3; 464 // DWORD-16 465 UINT32 timestamp_4; 466 // DWORD-17 467 UINT32 timestamp_5; 468 // DWORD-18 469 UINT32 timestamp_6; 470 // DWORD-19 471 UINT32 timestamp_7; 472 // DWORD-20 473 UINT32 timestamp_8; 474 #endif 475 } hal_csirxinfo_t; 476 477 typedef struct hal_pktinfo 478 { 479 UINT32 packetType : 3; 480 UINT32 psb : 3; 481 UINT32 sigBw : 2; 482 UINT32 Ng : 1; 483 UINT32 nTx : 3; 484 UINT32 nRx : 3; 485 UINT32 rxDevBw : 2; 486 UINT32 MU : 1; 487 UINT32 HELTF : 2; 488 UINT32 NgDsfShift : 2; // added to pass parameters 489 UINT32 fftSize : 4; 490 UINT32 rsvd1 : 4; 491 UINT32 scOffset : 12; 492 UINT32 dcPhase : 2; 493 UINT32 rsvd2 : 18; 494 } hal_pktinfo_t; 495 496 #ifndef DFW_CSI_PROC 497 typedef struct hal_wls_processing_input_params 498 { 499 UINT32 enableCsi : 1; // turn on CSI processing 500 UINT32 enableAoA : 1; // turn on AoA (req. enableCsi==1) 501 UINT32 nTx : 3; // limit # tx streams to process 502 UINT32 nRx : 3; // limit # rx to process 503 UINT32 selCal : 8; // choose cal values 504 UINT32 dumpMul : 2; // dump extra peaks in AoA 505 UINT32 enableAntCycling : 1; // enable antenna cycling 506 UINT32 dumpRawAngle : 1; // Dump Raw Angle 507 UINT32 useToaMin : 1; // 1: use min combining, 0: power combining; 508 UINT32 useSubspace : 1; // 1: use subspace algo; 0: no; 509 UINT32 useFindAngleDelayPeaks : 1; // use this algorithm for AoA 510 UINT32 rsvd1 : 9; 511 } hal_wls_processing_input_params_t; 512 513 typedef struct hal_wls_packet_params 514 { 515 UINT32 chNum : 8; // ch_index 1-4, 36:4:140, 149:4:165 516 UINT32 isFtmInit : 1; // indicate if this is FTM exchange initiator or responder 517 UINT32 ftmSignalBW : 3; // Channel bandwidth 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 Mhz, 4-7 reserved 518 UINT32 ftmPacketType : 3; // Format of FTM exchange 0: legacy, 1:HT, 3:VHT, 4:HE 519 UINT32 freqBand : 1; // Declare freq. band, 0: 2.4 GHz, 1: 5 GHz 520 UINT32 peerMacAddress_lo : 16; // first 16 bit of FTM peer MAC address 521 UINT32 peerMacAddress_hi; // rest of FTM peer MAC address 522 UINT32 info_tsf; // TSF counter from tx/rx-info 523 UINT32 cal_data_low_A : 10; 524 UINT32 cal_data_low_B : 10; 525 UINT32 cal_data_low_C : 10; 526 UINT32 rsvd2 : 2; 527 UINT32 cal_data_high_A : 10; 528 UINT32 cal_data_high_B : 10; 529 UINT32 cal_data_high_C : 10; 530 UINT32 rsvd3 : 2; 531 UINT32 cable_len_A : 8; 532 UINT32 cable_len_B : 8; 533 UINT32 cable_len_C : 8; 534 UINT32 antenna_spacing : 8; 535 } hal_wls_packet_params_t; 536 #else 537 #include "dsp_cmd.h" 538 #endif 539 540 typedef struct hal_cal_struc 541 { 542 short calData[4]; 543 short centerFreq; 544 } hal_cal_struc_t; 545 546 typedef struct reg_buf_config 547 { 548 // DWORD-0 549 UINT16 buf_size : 13; 550 UINT16 rsvd1 : 3; 551 UINT16 buf_num : 12; 552 UINT16 rsvd0 : 4; 553 } reg_buf_config_t; 554 555 typedef struct reg_buf_ptr 556 { 557 // DWORD-0 558 UINT16 wr_ptr : 13; 559 UINT16 rsvd1 : 3; 560 UINT16 rd_ptr : 13; 561 UINT16 rsvd0 : 3; 562 } reg_buf_ptr_t; 563 564 #endif 565 566 #endif /* CONFIG_WLS_CSI_PROC */ 567