1 /*!
2 \file gd32e50x_usart.c
3 \brief USART driver
4
5 \version 2020-03-10, V1.0.0, firmware for GD32E50x
6 \version 2020-08-26, V1.1.0, firmware for GD32E50x
7 \version 2020-12-21, V1.1.1, firmware for GD32E50x
8 \version 2021-03-23, V1.2.0, firmware for GD32E50x
9 */
10
11 /*
12 Copyright (c) 2021, GigaDevice Semiconductor Inc.
13
14 Redistribution and use in source and binary forms, with or without modification,
15 are permitted provided that the following conditions are met:
16
17 1. Redistributions of source code must retain the above copyright notice, this
18 list of conditions and the following disclaimer.
19 2. Redistributions in binary form must reproduce the above copyright notice,
20 this list of conditions and the following disclaimer in the documentation
21 and/or other materials provided with the distribution.
22 3. Neither the name of the copyright holder nor the names of its contributors
23 may be used to endorse or promote products derived from this software without
24 specific prior written permission.
25
26 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
31 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
32 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
33 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
35 OF SUCH DAMAGE.
36 */
37
38
39 #include "gd32e50x_usart.h"
40
41 /* USART register bit offset */
42 #define GP_GUAT_OFFSET ((uint32_t)8U) /* bit offset of GUAT in USART_GP */
43 #define RT_BL_OFFSET ((uint32_t)24U) /* bit offset of BL in USART_RT */
44
45 /*!
46 \brief reset USART/UART
47 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
48 \param[out] none
49 \retval none
50 */
usart_deinit(uint32_t usart_periph)51 void usart_deinit(uint32_t usart_periph)
52 {
53 switch(usart_periph){
54 case USART0:
55 rcu_periph_reset_enable(RCU_USART0RST);
56 rcu_periph_reset_disable(RCU_USART0RST);
57 break;
58 case USART1:
59 rcu_periph_reset_enable(RCU_USART1RST);
60 rcu_periph_reset_disable(RCU_USART1RST);
61 break;
62 case USART2:
63 rcu_periph_reset_enable(RCU_USART2RST);
64 rcu_periph_reset_disable(RCU_USART2RST);
65 break;
66 case USART5:
67 rcu_periph_reset_enable(RCU_USART5RST);
68 rcu_periph_reset_disable(RCU_USART5RST);
69 break;
70 case UART3:
71 rcu_periph_reset_enable(RCU_UART3RST);
72 rcu_periph_reset_disable(RCU_UART3RST);
73 break;
74 case UART4:
75 rcu_periph_reset_enable(RCU_UART4RST);
76 rcu_periph_reset_disable(RCU_UART4RST);
77 break;
78 default:
79 break;
80 }
81 }
82
83 /*!
84 \brief configure USART baud rate value
85 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
86 \param[in] baudval: baud rate value
87 \param[out] none
88 \retval none
89 */
usart_baudrate_set(uint32_t usart_periph,uint32_t baudval)90 void usart_baudrate_set(uint32_t usart_periph, uint32_t baudval)
91 {
92 uint32_t uclk=0U, intdiv=0U, fradiv=0U, udiv=0U;
93 switch(usart_periph){
94 /* get clock frequency */
95 case USART0:
96 uclk=rcu_clock_freq_get(CK_APB2);
97 break;
98 case USART5:
99 uclk=rcu_clock_freq_get(CK_USART);
100 break;
101 case USART1:
102 uclk=rcu_clock_freq_get(CK_APB1);
103 break;
104 case USART2:
105 uclk=rcu_clock_freq_get(CK_APB1);
106 break;
107 case UART3:
108 uclk=rcu_clock_freq_get(CK_APB1);
109 break;
110 case UART4:
111 uclk=rcu_clock_freq_get(CK_APB1);
112 break;
113 default:
114 break;
115 }
116
117 if(USART5 == usart_periph){
118 /* configure USART5 baud rate value */
119 if(USART5_CTL0(usart_periph) & USART5_CTL0_OVSMOD){
120 /* when oversampling by 8, configure the value of USART_BAUD */
121 udiv = ((2U*uclk) + baudval/2U)/baudval;
122 intdiv = udiv & 0x0000fff0U;
123 fradiv = (udiv>>1) & 0x00000007U;
124 }else{
125 /* when oversampling by 16, configure the value of USART_BAUD */
126 udiv = (uclk+baudval/2U)/baudval;
127 intdiv = udiv & 0x0000fff0U;
128 fradiv = udiv & 0x0000000fU;
129 }
130 USART5_BAUD(usart_periph) = ((USART5_BAUD_FRADIV | USART5_BAUD_INTDIV) & (intdiv | fradiv));
131 }else{
132 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) baud rate value */
133 if(USART_CTL0(usart_periph) & USART_CTL0_OVSMOD){
134 /* when oversampling by 8, configure the value of USART_BAUD */
135 udiv = ((2U*uclk) + baudval/2U)/baudval;
136 intdiv = udiv & 0x0000fff0U;
137 fradiv = (udiv>>1) & 0x00000007U;
138 }else{
139 /* when oversampling by 16, configure the value of USART_BAUD */
140 udiv = (uclk+baudval/2U)/baudval;
141 intdiv = udiv & 0x0000fff0U;
142 fradiv = udiv & 0x0000000fU;
143 }
144 USART_BAUD(usart_periph) = ((USART_BAUD_FRADIV | USART_BAUD_INTDIV) & (intdiv | fradiv));
145 }
146 }
147
148 /*!
149 \brief configure USART parity function
150 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
151 \param[in] paritycfg: configure USART parity
152 only one parameter can be selected which is shown as below:
153 \arg USART_PM_NONE: no parity
154 \arg USART_PM_EVEN: even parity
155 \arg USART_PM_ODD: odd parity
156 \param[out] none
157 \retval none
158 */
usart_parity_config(uint32_t usart_periph,uint32_t paritycfg)159 void usart_parity_config(uint32_t usart_periph, uint32_t paritycfg)
160 {
161 if(USART5 == usart_periph){
162 /* disable USART5 */
163 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
164 /* clear USART5_CTL0 PM,PCEN Bits */
165 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_PM | USART5_CTL0_PCEN);
166 /* configure USART5 parity mode */
167 USART5_CTL0(usart_periph) |= ((USART5_CTL0_PM | USART5_CTL0_PCEN) & paritycfg);
168 }else{
169 /* clear USART_CTL0 PM,PCEN Bits */
170 USART_CTL0(usart_periph) &= ~(USART_CTL0_PM | USART_CTL0_PCEN);
171 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) parity mode */
172 USART_CTL0(usart_periph) |= ((USART_CTL0_PM | USART_CTL0_PCEN) & paritycfg);
173 }
174 }
175
176 /*!
177 \brief configure USART word length
178 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
179 \param[in] wlen: USART word length configure
180 only one parameter can be selected which is shown as below:
181 \arg USART_WL_8BIT: 8 bits
182 \arg USART_WL_9BIT: 9 bits
183 \param[out] none
184 \retval none
185 */
usart_word_length_set(uint32_t usart_periph,uint32_t wlen)186 void usart_word_length_set(uint32_t usart_periph, uint32_t wlen)
187 {
188 if(USART5 == usart_periph){
189 /* disable USART5 */
190 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
191 /* clear USART5_CTL0 WL bit */
192 USART5_CTL0(usart_periph) &= ~USART5_CTL0_WL;
193 /* configure USART word length */
194 USART5_CTL0(usart_periph) |= (USART5_CTL0_WL & wlen);
195 }else{
196 /* clear USART_CTL0 WL bit */
197 USART_CTL0(usart_periph) &= ~USART_CTL0_WL;
198 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) word length */
199 USART_CTL0(usart_periph) |= (USART_CTL0_WL & wlen);
200 }
201 }
202
203 /*!
204 \brief configure USART stop bit length
205 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
206 \param[in] stblen: USART stop bit configure
207 only one parameter can be selected which is shown as below:
208 \arg USART_STB_1BIT: 1 bit
209 \arg USART_STB_0_5BIT: 0.5 bit(not available for UARTx(x=3,4,6,7))
210 \arg USART_STB_2BIT: 2 bits
211 \arg USART_STB_1_5BIT: 1.5 bits(not available for UARTx(x=3,4,6,7))
212 \param[out] none
213 \retval none
214 */
usart_stop_bit_set(uint32_t usart_periph,uint32_t stblen)215 void usart_stop_bit_set(uint32_t usart_periph, uint32_t stblen)
216 {
217 if(USART5 == usart_periph){
218 /* disable USART5 */
219 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
220 /* clear USART5_CTL1 STB bits */
221 USART5_CTL1(usart_periph) &= ~USART5_CTL1_STB;
222 /* configure USART stop bits */
223 USART5_CTL1(usart_periph) |= (USART5_CTL1_STB & stblen);
224 }else{
225 /* clear USART_CTL1 STB bits */
226 USART_CTL1(usart_periph) &= ~USART_CTL1_STB;
227 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) stop bits */
228 USART_CTL1(usart_periph) |= (USART_CTL1_STB & stblen);
229 }
230 }
231
232 /*!
233 \brief enable USART
234 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
235 \param[out] none
236 \retval none
237 */
usart_enable(uint32_t usart_periph)238 void usart_enable(uint32_t usart_periph)
239 {
240 if(USART5 == usart_periph){
241 /* enable USART5 */
242 USART5_CTL0(usart_periph) |= USART5_CTL0_UEN;
243 }else{
244 /* enable USARTx(x=0,1,2)/UARTx(x=3,4) */
245 USART_CTL0(usart_periph) |= USART_CTL0_UEN;
246 }
247 }
248
249 /*!
250 \brief disable USART
251 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
252 \param[out] none
253 \retval none
254 */
usart_disable(uint32_t usart_periph)255 void usart_disable(uint32_t usart_periph)
256 {
257 if(USART5 == usart_periph){
258 /* disable USART5 */
259 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
260 }else{
261 /* disable USARTx(x=0,1,2)/UARTx(x=3,4) */
262 USART_CTL0(usart_periph) &= ~(USART_CTL0_UEN);
263 }
264 }
265
266 /*!
267 \brief configure USART transmitter
268 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
269 \param[in] txconfig: enable or disable USART transmitter
270 only one parameter can be selected which is shown as below:
271 \arg USART_TRANSMIT_ENABLE: enable USART transmission
272 \arg USART_TRANSMIT_DISABLE: enable USART transmission
273 \param[out] none
274 \retval none
275 */
usart_transmit_config(uint32_t usart_periph,uint32_t txconfig)276 void usart_transmit_config(uint32_t usart_periph, uint32_t txconfig)
277 {
278 uint32_t ctl = 0U;
279
280 if(USART5 == usart_periph){
281 ctl = USART5_CTL0(usart_periph);
282 ctl &= ~USART5_CTL0_TEN;
283 ctl |= (USART5_CTL0_TEN & txconfig);
284 /* configure USART5 transfer mode */
285 USART5_CTL0(usart_periph) = ctl;
286 }else{
287 ctl = USART_CTL0(usart_periph);
288 ctl &= ~USART_CTL0_TEN;
289 ctl |= (USART_CTL0_TEN & txconfig);
290 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) transfer mode */
291 USART_CTL0(usart_periph) = ctl;
292 }
293 }
294
295 /*!
296 \brief configure USART receiver
297 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
298 \param[in] rxconfig: enable or disable USART receiver
299 only one parameter can be selected which is shown as below:
300 \arg USART_RECEIVE_ENABLE: enable USART reception
301 \arg USART_RECEIVE_DISABLE: disable USART reception
302 \param[out] none
303 \retval none
304 */
usart_receive_config(uint32_t usart_periph,uint32_t rxconfig)305 void usart_receive_config(uint32_t usart_periph, uint32_t rxconfig)
306 {
307 uint32_t ctl = 0U;
308
309 if(USART5 == usart_periph){
310 ctl = USART5_CTL0(usart_periph);
311 ctl &= ~USART5_CTL0_REN;
312 ctl |= (USART5_CTL0_REN & rxconfig);
313 /* configure USART5 receive mode */
314 USART5_CTL0(usart_periph) = ctl;
315 }else{
316 ctl = USART_CTL0(usart_periph);
317 ctl &= ~USART_CTL0_REN;
318 ctl |= (USART_CTL0_REN & rxconfig);
319 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) receive mode */
320 USART_CTL0(usart_periph) = ctl;
321 }
322 }
323
324 /*!
325 \brief configure the USART oversample mode
326 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
327 \param[in] oversamp: oversample value
328 only one parameter can be selected which is shown as below:
329 \arg USART_OVSMOD_8: 8 bits
330 \arg USART_OVSMOD_16: 16 bits
331 \param[out] none
332 \retval none
333 */
usart_oversample_config(uint32_t usart_periph,uint32_t oversamp)334 void usart_oversample_config(uint32_t usart_periph, uint32_t oversamp)
335 {
336 if(USART5 == usart_periph){
337 /* disable USART5 */
338 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
339 /* clear OVSMOD bit */
340 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_OVSMOD);
341 /* configure the USART5 oversample mode */
342 USART5_CTL0(usart_periph) |= (USART5_CTL0_OVSMOD & oversamp);
343 }else{
344 /* clear OVSMOD bit */
345 USART_CTL0(usart_periph) &= ~(USART_CTL0_OVSMOD);
346 /* configure the USARTx(x=0,1,2)/UARTx(x=3,4) oversample mode */
347 USART_CTL0(usart_periph) |= (USART_CTL0_OVSMOD & oversamp);
348 }
349 }
350
351 /*!
352 \brief configure sample bit method
353 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
354 \param[in] obsm: sample bit
355 only one parameter can be selected which is shown as below:
356 \arg USART_OSB_1bit: 1 bit
357 \arg USART_OSB_3bit: 3 bits
358 \param[out] none
359 \retval none
360 */
usart_sample_bit_config(uint32_t usart_periph,uint32_t obsm)361 void usart_sample_bit_config(uint32_t usart_periph, uint32_t obsm)
362 {
363 if(USART5 == usart_periph){
364 /* disable USART5 */
365 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
366 /* clear USART5 OSB bit */
367 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_OSB);
368 /* configure USART5 sample bit method */
369 USART5_CTL2(usart_periph) |= (USART5_CTL2_OSB & obsm);
370 }else{
371 USART_CTL2(usart_periph) &= ~(USART_CTL2_OSB);
372 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) sample bit method */
373 USART_CTL2(usart_periph) |= (USART_CTL2_OSB & obsm);
374 }
375 }
376
377 /*!
378 \brief enable receiver timeout of USART
379 \param[in] usart_periph: USARTx(x=0,1,2,5)
380 \param[out] none
381 \retval none
382 */
usart_receiver_timeout_enable(uint32_t usart_periph)383 void usart_receiver_timeout_enable(uint32_t usart_periph)
384 {
385 if(USART5 ==usart_periph){
386 /* enable receiver timeout of USART5 */
387 USART5_CTL1(usart_periph) |= USART5_CTL1_RTEN;
388 }else{
389 /* enable receiver timeout of USARTx(x=0,1,2) */
390 USART_CTL3(usart_periph) |= USART_CTL3_RTEN;
391 }
392 }
393
394 /*!
395 \brief disable receiver timeout of USART
396 \param[in] usart_periph: USARTx(x=0,1,2,5)
397 \param[out] none
398 \retval none
399 */
usart_receiver_timeout_disable(uint32_t usart_periph)400 void usart_receiver_timeout_disable(uint32_t usart_periph)
401 {
402 if(USART5 ==usart_periph){
403 /* disable receiver timeout of USART5 */
404 USART5_CTL1(usart_periph) &= ~USART5_CTL1_RTEN;
405 }else{
406 /* disable receiver timeout of USARTx(x=0,1,2) */
407 USART_CTL3(usart_periph) &= ~(USART_CTL3_RTEN);
408 }
409 }
410
411 /*!
412 \brief configure the receiver timeout threshold of USART
413 \param[in] usart_periph: USARTx(x=0,1,2,5)
414 \param[in] rtimeout: 0x00000000-0x00FFFFFF
415 \param[out] none
416 \retval none
417 */
usart_receiver_timeout_threshold_config(uint32_t usart_periph,uint32_t rtimeout)418 void usart_receiver_timeout_threshold_config(uint32_t usart_periph, uint32_t rtimeout)
419 {
420 if(USART5 == usart_periph){
421 USART5_RT(usart_periph) &= ~(USART5_RT_RT);
422 /* configure USART5 receiver timeout threshold */
423 USART5_RT(usart_periph) |= (USART5_RT_RT & rtimeout);
424 }else{
425 USART_RT(usart_periph) &= ~(USART_RT_RT);
426 /* configure USARTx(x=0,1,2) receiver timeout threshold */
427 USART_RT(usart_periph) |= (USART_RT_RT & rtimeout);
428 }
429 }
430
431 /*!
432 \brief USART transmit data function
433 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
434 \param[in] data: data of transmission
435 \param[out] none
436 \retval none
437 */
usart_data_transmit(uint32_t usart_periph,uint32_t data)438 void usart_data_transmit(uint32_t usart_periph, uint32_t data)
439 {
440 if(USART5 == usart_periph){
441 /* USART5 transmit data */
442 USART5_TDATA(usart_periph) = ((uint16_t)USART5_TDATA_TDATA & data);
443 }else{
444 /* USARTx(x=0,1,2)/UARTx(x=3,4) transmit data */
445 USART_DATA(usart_periph) = ((uint16_t)USART_DATA_DATA & data);
446 }
447 }
448
449 /*!
450 \brief USART receive data function
451 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
452 \param[out] none
453 \retval data of received
454 */
usart_data_receive(uint32_t usart_periph)455 uint16_t usart_data_receive(uint32_t usart_periph)
456 {
457 if(USART5 == usart_periph){
458 /* USART5 receive data */
459 return (uint16_t)(GET_BITS(USART5_RDATA(usart_periph), 0U, 8U));
460 }else{
461 /* USARTx(x=0,1,2)/UARTx(x=3,4) receive data */
462 return (uint16_t)(GET_BITS(USART_DATA(usart_periph), 0U, 8U));
463 }
464 }
465
466 /*!
467 \brief enable mute mode
468 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
469 \param[out] none
470 \retval none
471 */
usart_mute_mode_enable(uint32_t usart_periph)472 void usart_mute_mode_enable(uint32_t usart_periph)
473 {
474 if(USART5 == usart_periph){
475 /* enable USART5 mute mode */
476 USART5_CTL0(usart_periph) |= USART5_CTL0_MEN;
477 }else{
478 /* enable USARTx(x=0,1,2)/UARTx(x=3,4) mute mode */
479 USART_CTL0(usart_periph) |= USART_CTL0_RWU;
480 }
481 }
482
483 /*!
484 \brief disable mute mode
485 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
486 \param[out] none
487 \retval none
488 */
usart_mute_mode_disable(uint32_t usart_periph)489 void usart_mute_mode_disable(uint32_t usart_periph)
490 {
491 if(USART5 == usart_periph){
492 /* disable USART5 mute mode */
493 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_MEN);
494 }else{
495 /* disable USARTx(x=0,1,2)/UARTx(x=3,4) mute mode */
496 USART_CTL0(usart_periph) &= ~(USART_CTL0_RWU);
497 }
498 }
499
500 /*!
501 \brief configure wakeup method in mute mode
502 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
503 \param[in] wmethod: two method be used to enter or exit the mute mode
504 only one parameter can be selected which is shown as below:
505 \arg USART_WM_IDLE: idle line
506 \arg USART_WM_ADDR: address mask
507 \param[out] none
508 \retval none
509 */
usart_mute_mode_wakeup_config(uint32_t usart_periph,uint32_t wmethod)510 void usart_mute_mode_wakeup_config(uint32_t usart_periph, uint32_t wmethod)
511 {
512 if(USART5 == usart_periph){
513 /* disable USART5 */
514 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
515 /* clear USART5 WM bit */
516 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_WM);
517 /* configure USART5 wakeup method in mute mode */
518 USART5_CTL0(usart_periph) |= (USART5_CTL0_WM & wmethod);
519 }else{
520 /* clear USARTx(x=0,1,2)/UARTx(x=3,4) WM bit */
521 USART_CTL0(usart_periph) &= ~(USART_CTL0_WM);
522 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) wakeup method in mute mode */
523 USART_CTL0(usart_periph) |= (USART_CTL0_WM & wmethod);
524 }
525 }
526
527 /*!
528 \brief enable LIN mode
529 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
530 \param[out] none
531 \retval none
532 */
usart_lin_mode_enable(uint32_t usart_periph)533 void usart_lin_mode_enable(uint32_t usart_periph)
534 {
535 if(USART5 == usart_periph){
536 /* disable USART5 */
537 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
538 /* enable USART5 LIN mode */
539 USART5_CTL1(usart_periph) |= USART5_CTL1_LMEN;
540 }else{
541 /* enable USARTx(x=0,1,2)/UARTx(x=3,4) LIN mode */
542 USART_CTL1(usart_periph) |= USART_CTL1_LMEN;
543 }
544 }
545
546 /*!
547 \brief disable LIN mode
548 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
549 \param[out] none
550 \retval none
551 */
usart_lin_mode_disable(uint32_t usart_periph)552 void usart_lin_mode_disable(uint32_t usart_periph)
553 {
554 if(USART5 == usart_periph){
555 /* disable USART5 */
556 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
557 /* disable USART5 LIN mode */
558 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_LMEN);
559 }else{
560 /* disable USARTx(x=0,1,2)/UARTx(x=3,4) LIN mode */
561 USART_CTL1(usart_periph) &= ~(USART_CTL1_LMEN);
562 }
563 }
564
565 /*!
566 \brief configure lin break frame length
567 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
568 \param[in] lblen: lin break frame length
569 only one parameter can be selected which is shown as below:
570 \arg USART_LBLEN_10B: 10 bits
571 \arg USART_LBLEN_11B: 11 bits
572 \param[out] none
573 \retval none
574 */
usart_lin_break_detection_length_config(uint32_t usart_periph,uint32_t lblen)575 void usart_lin_break_detection_length_config(uint32_t usart_periph, uint32_t lblen)
576 {
577 if(USART5 == usart_periph){
578 /* disable USART5 */
579 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
580
581 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_LBLEN);
582 /* configure USART5 lin brek frame length */
583 USART5_CTL1(usart_periph) |= USART5_CTL1_LBLEN & (lblen);
584 }else{
585 USART_CTL1(usart_periph) &= ~(USART_CTL1_LBLEN);
586 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) lin brek frame length */
587 USART_CTL1(usart_periph) |= (USART_CTL1_LBLEN & lblen);
588 }
589 }
590
591 /*!
592 \brief enable half duplex mode
593 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
594 \param[out] none
595 \retval none
596 */
usart_halfduplex_enable(uint32_t usart_periph)597 void usart_halfduplex_enable(uint32_t usart_periph)
598 {
599 if(USART5 == usart_periph){
600 /* disable USART5 */
601 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
602 /* enable USART5 half duplex mode */
603 USART5_CTL2(usart_periph) |= (USART5_CTL2_HDEN);
604 }else{
605 /* enable USARTx(x=0,1,2)/UARTx(x=3,4) half duplex mode */
606 USART_CTL2(usart_periph) |= USART_CTL2_HDEN;
607 }
608 }
609
610 /*!
611 \brief disable half duplex mode
612 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
613 \param[out] none
614 \retval none
615 */
usart_halfduplex_disable(uint32_t usart_periph)616 void usart_halfduplex_disable(uint32_t usart_periph)
617 {
618 if(USART5 == usart_periph){
619 /* disable USART5 */
620 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
621 /* disable USART5 half duplex mode */
622 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_HDEN);
623 }else{
624 /* disable USARTx(x=0,1,2)/UARTx(x=3,4) half duplex mode */
625 USART_CTL2(usart_periph) &= ~(USART_CTL2_HDEN);
626 }
627 }
628
629 /*!
630 \brief enable CK pin in synchronous mode
631 \param[in] usart_periph: USARTx(x=0,1,2,5)
632 \param[out] none
633 \retval none
634 */
usart_synchronous_clock_enable(uint32_t usart_periph)635 void usart_synchronous_clock_enable(uint32_t usart_periph)
636 {
637 if(USART5 == usart_periph){
638 /* disable USART5 */
639 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
640 /* enable USART5 CK pin in synchronous mode */
641 USART5_CTL1(usart_periph) |= USART5_CTL1_CKEN;
642 }else{
643 /* enable USARTx(x=0,1,2) CK pin in synchronous mode */
644 USART_CTL1(usart_periph) |= USART_CTL1_CKEN;
645 }
646 }
647
648 /*!
649 \brief disable CK pin in synchronous mode
650 \param[in] usart_periph: USARTx(x=0,1,2,5)
651 \param[out] none
652 \retval none
653 */
usart_synchronous_clock_disable(uint32_t usart_periph)654 void usart_synchronous_clock_disable(uint32_t usart_periph)
655 {
656 if(USART5 == usart_periph){
657 /* disable USART5 */
658 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
659 /* disable USART5 CK pin in synchronous mode */
660 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_CKEN);
661 }else{
662 /* disable USARTx(x=0,1,2) CK pin in synchronous mode */
663 USART_CTL1(usart_periph) &= ~(USART_CTL1_CKEN);
664 }
665 }
666
667 /*!
668 \brief configure USART synchronous mode parameters
669 \param[in] usart_periph: USARTx(x=0,1,2,5)
670 \param[in] clen: CK length
671 only one parameter can be selected which is shown as below:
672 \arg USART_CLEN_NONE: there are 7 CK pulses for an 8 bit frame and 8 CK pulses for a 9 bit frame
673 \arg USART_CLEN_EN: there are 8 CK pulses for an 8 bit frame and 9 CK pulses for a 9 bit frame
674 \param[in] cph: clock phase
675 only one parameter can be selected which is shown as below:
676 \arg USART_CPH_1CK: first clock transition is the first data capture edge
677 \arg USART_CPH_2CK: second clock transition is the first data capture edge
678 \param[in] cpl: clock polarity
679 only one parameter can be selected which is shown as below:
680 \arg USART_CPL_LOW: steady low value on CK pin
681 \arg USART_CPL_HIGH: steady high value on CK pin
682 \param[out] none
683 \retval none
684 */
usart_synchronous_clock_config(uint32_t usart_periph,uint32_t clen,uint32_t cph,uint32_t cpl)685 void usart_synchronous_clock_config(uint32_t usart_periph, uint32_t clen, uint32_t cph, uint32_t cpl)
686 {
687 uint32_t ctl = 0U;
688
689 if(USART5 == usart_periph){
690 /* disable USART5 */
691 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
692 /* read USART5_CTL1 register */
693 ctl = USART5_CTL1(usart_periph);
694 /* reset USART5_CTL1 CLEN,CPH,CPL bits */
695 ctl &= ~(USART5_CTL1_CLEN | USART5_CTL1_CPH | USART5_CTL1_CPL);
696 /* set USART5 CK length, CK phase, CK polarity */
697 ctl |= (USART5_CTL1_CLEN & clen) | (USART5_CTL1_CPH & cph) | (USART5_CTL1_CPL & cpl);
698
699 USART5_CTL1(usart_periph) = ctl;
700 }else{
701 /* read USART_CTL1 register */
702 ctl = USART_CTL1(usart_periph);
703 /* reset USART_CTL1 CLEN,CPH,CPL bits */
704 ctl &= ~(USART_CTL1_CLEN | USART_CTL1_CPH | USART_CTL1_CPL);
705 /* set USARTx(x=0,1,2) CK length, CK phase, CK polarity */
706 ctl |= (USART_CTL1_CLEN & clen) | (USART_CTL1_CPH & cph) | (USART_CTL1_CPL & cpl);
707
708 USART_CTL1(usart_periph) = ctl;
709 }
710 }
711
712 /*!
713 \brief configure guard time value in smartcard mode
714 \param[in] usart_periph: USARTx(x=0,1,2,5)
715 \param[in] guat: guard time value, 0x00000000-0x000000FF
716 \param[out] none
717 \retval none
718 */
usart_guard_time_config(uint32_t usart_periph,uint32_t guat)719 void usart_guard_time_config(uint32_t usart_periph,uint32_t guat)
720 {
721 if(USART5 == usart_periph){
722 /* disable USART5 */
723 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
724
725 USART5_GP(usart_periph) &= ~(USART5_GP_GUAT);
726 /* configure USART5 guard time value */
727 USART5_GP(usart_periph) |= (USART5_GP_GUAT & ((guat) << 8));
728 }else{
729 USART_GP(usart_periph) &= ~(USART_GP_GUAT);
730 /* configure USARTx(x=0,1,2) guard time value */
731 USART_GP(usart_periph) |= (USART_GP_GUAT & ((guat)<<GP_GUAT_OFFSET));
732 }
733 }
734
735 /*!
736 \brief enable smartcard mode
737 \param[in] usart_periph: USARTx(x=0,1,2,5)
738 \param[out] none
739 \retval none
740 */
usart_smartcard_mode_enable(uint32_t usart_periph)741 void usart_smartcard_mode_enable(uint32_t usart_periph)
742 {
743 if(USART5 == usart_periph){
744 /* disable USART5 */
745 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
746
747 /* enable USART5 smartcard mode */
748 USART5_CTL2(usart_periph) |= USART5_CTL2_SCEN;
749 }else{
750 /* enable USARTx(x=0,1,2) smartcard mode */
751 USART_CTL2(usart_periph) |= USART_CTL2_SCEN;
752 }
753 }
754
755 /*!
756 \brief disable smartcard mode
757 \param[in] usart_periph: USARTx(x=0,1,2,5)
758 \param[out] none
759 \retval none
760 */
usart_smartcard_mode_disable(uint32_t usart_periph)761 void usart_smartcard_mode_disable(uint32_t usart_periph)
762 {
763 if(USART5 == usart_periph){
764 /* disable USART5 */
765 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
766 /* disable USART5 smartcard mode */
767 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_SCEN);
768 }else{
769 /* disable USARTx(x=0,1,2) smartcard mode */
770 USART_CTL2(usart_periph) &= ~(USART_CTL2_SCEN);
771 }
772 }
773
774 /*!
775 \brief enable NACK in smartcard mode
776 \param[in] usart_periph: USARTx(x=0,1,2,5)
777 \param[out] none
778 \retval none
779 */
usart_smartcard_mode_nack_enable(uint32_t usart_periph)780 void usart_smartcard_mode_nack_enable(uint32_t usart_periph)
781 {
782 if(USART5 == usart_periph){
783 /* disable USART5 */
784 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
785 /* enable USART5 NACK in smartcard mode */
786 USART5_CTL2(usart_periph) |= USART5_CTL2_NKEN;
787 }else{
788 /* enable USARTx(x=0,1,2) NACK in smartcard mode */
789 USART_CTL2(usart_periph) |= USART_CTL2_NKEN;
790 }
791 }
792
793 /*!
794 \brief disable NACK in smartcard mode
795 \param[in] usart_periph: USARTx(x=0,1,2,5)
796 \param[out] none
797 \retval none
798 */
usart_smartcard_mode_nack_disable(uint32_t usart_periph)799 void usart_smartcard_mode_nack_disable(uint32_t usart_periph)
800 {
801 if(USART5 == usart_periph){
802 /* disable USART5 */
803 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
804 /* disable USART5 NACK in smartcard mode */
805 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_NKEN);
806 }else{
807 /* disable USARTx(x=0,1,2) NACK in smartcard mode */
808 USART_CTL2(usart_periph) &= ~(USART_CTL2_NKEN);
809 }
810 }
811
812 /*!
813 \brief configure smartcard auto-retry number
814 \param[in] usart_periph: USARTx(x=0,1,2,5)
815 \param[in] scrtnum: smartcard auto-retry number, 0x00000000-0x00000007
816 \param[out] none
817 \retval none
818 */
usart_smartcard_autoretry_config(uint32_t usart_periph,uint32_t scrtnum)819 void usart_smartcard_autoretry_config(uint32_t usart_periph, uint32_t scrtnum)
820 {
821 if(USART5 == usart_periph){
822 /* disable USART5 */
823 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
824
825 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_SCRTNUM);
826 /* configure USART5 smartcard auto-retry number */
827 USART5_CTL2(usart_periph) |= (USART5_CTL2_SCRTNUM & (scrtnum << 17));
828 }else{
829 USART_CTL3(usart_periph) &= ~(USART_CTL3_SCRTNUM);
830 /* configure USARTx(x=0,1,2) smartcard auto-retry number */
831 USART_CTL3(usart_periph) |= (USART_CTL3_SCRTNUM & ((scrtnum)<<1));
832 }
833 }
834
835 /*!
836 \brief configure block length in Smartcard T=1 reception
837 \param[in] usart_periph: USARTx(x=0,1,2,5)
838 \param[in] bl: block length, 0x00000000-0x000000FF
839 \param[out] none
840 \retval none
841 */
usart_block_length_config(uint32_t usart_periph,uint32_t bl)842 void usart_block_length_config(uint32_t usart_periph, uint32_t bl)
843 {
844 if(USART5 == usart_periph){
845 USART5_RT(usart_periph) &= ~(USART5_RT_BL);
846 /* configure USART5 block length */
847 USART5_RT(usart_periph) |= (USART5_RT_BL & ((bl) << 24));
848 }else{
849 USART_RT(usart_periph) &= ~(USART_RT_BL);
850 /* configure USARTx(x=0,1,2) block length */
851 USART_RT(usart_periph) |= (USART_RT_BL & ((bl) << 24));
852 }
853 }
854
855 /*!
856 \brief enable IrDA mode
857 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
858 \param[out] none
859 \retval none
860 */
usart_irda_mode_enable(uint32_t usart_periph)861 void usart_irda_mode_enable(uint32_t usart_periph)
862 {
863 if(USART5 == usart_periph){
864 /* disable USART5 */
865 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
866 /* enable USART5 IrDA mode */
867 USART5_CTL2(usart_periph) |= USART5_CTL2_IREN;
868 }else{
869 /* enable USARTx(x=0,1,2)/UARTx(x=3,4) IrDA mode */
870 USART_CTL2(usart_periph) |= USART_CTL2_IREN;
871 }
872 }
873
874 /*!
875 \brief disable IrDA mode
876 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
877 \param[out] none
878 \retval none
879 */
usart_irda_mode_disable(uint32_t usart_periph)880 void usart_irda_mode_disable(uint32_t usart_periph)
881 {
882 if(USART5 == usart_periph){
883 /* disable USART */
884 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
885 /* disable USART5 IrDA mode */
886 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_IREN);
887 }else{
888 /* disable USARTx(x=0,1,2)/UARTx(x=3,4) IrDA mode */
889 USART_CTL2(usart_periph) &= ~(USART_CTL2_IREN);
890 }
891 }
892
893 /*!
894 \brief configure the peripheral clock prescaler in USART IrDA low-power mode
895 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
896 \param[in] psc: 0x00000000-0x000000FF
897 \param[out] none
898 \retval none
899 */
usart_prescaler_config(uint32_t usart_periph,uint8_t psc)900 void usart_prescaler_config(uint32_t usart_periph, uint8_t psc)
901 {
902 if(USART5 == usart_periph){
903 /* disable USART5 */
904 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
905
906 USART5_GP(usart_periph) &= ~(USART5_GP_PSC);
907 /* configure the psc in USART5 */
908 USART5_GP(usart_periph) |= (USART5_GP_PSC & psc);
909 }else{
910 USART_GP(usart_periph) &= ~(USART_GP_PSC);
911 /* configure the psc in USARTx(x=0,1,2)/UARTx(x=3,4) */
912 USART_GP(usart_periph) |= (USART_GP_PSC & psc);
913 }
914 }
915
916 /*!
917 \brief configure IrDA low-power
918 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
919 \param[in] irlp: IrDA low-power or normal
920 only one parameter can be selected which is shown as below:
921 \arg USART_IRLP_LOW: low-power
922 \arg USART_IRLP_NORMAL: normal
923 \param[out] none
924 \retval none
925 */
usart_irda_lowpower_config(uint32_t usart_periph,uint32_t irlp)926 void usart_irda_lowpower_config(uint32_t usart_periph, uint32_t irlp)
927 {
928 if(USART5 == usart_periph){
929 /* disable USART5 */
930 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
931
932 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_IRLP);
933 /* configure USART5 IrDA low-power */
934 USART5_CTL2(usart_periph) |= (USART5_CTL2_IRLP & irlp);
935 }else{
936 USART_CTL2(usart_periph) &= ~(USART_CTL2_IRLP);
937 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) IrDA low-power */
938 USART_CTL2(usart_periph) |= (USART_CTL2_IRLP & irlp);
939 }
940 }
941
942 /*!
943 \brief configure USART DMA reception
944 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
945 \param[in] dmacmd: enable or disable DMA for reception
946 only one parameter can be selected which is shown as below:
947 \arg USART_DENR_ENABLE: DMA enable for reception
948 \arg USART_DENR_DISABLE: DMA disable for reception
949 \param[out] none
950 \retval none
951 */
usart_dma_receive_config(uint32_t usart_periph,uint32_t dmacmd)952 void usart_dma_receive_config(uint32_t usart_periph, uint32_t dmacmd)
953 {
954 uint32_t ctl = 0U;
955
956 if(USART5 == usart_periph){
957 ctl = USART5_CTL2(usart_periph);
958 ctl &= ~USART5_CTL2_DENR;
959 ctl |= (USART5_CTL2_DENR & dmacmd);
960 /* configure USART5 DMA reception */
961 USART5_CTL2(usart_periph) = ctl;
962 }else{
963 ctl = USART_CTL2(usart_periph);
964 ctl &= ~USART_CTL2_DENR;
965 ctl |= (USART_CTL2_DENR & dmacmd);
966 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) DMA reception */
967 USART_CTL2(usart_periph) = ctl;
968 }
969 }
970
971 /*!
972 \brief configure USART DMA transmission
973 \param[in] usart_periph: USARTx(x=0,1,2,5)/UARTx(x=3,4)
974 \param[in] dmacmd: enable or disable DMA for transmission
975 only one parameter can be selected which is shown as below:
976 \arg USART_DENT_ENABLE: DMA enable for transmission
977 \arg USART_DENT_DISABLE: DMA disable for transmission
978 \param[out] none
979 \retval none
980 */
usart_dma_transmit_config(uint32_t usart_periph,uint32_t dmacmd)981 void usart_dma_transmit_config(uint32_t usart_periph, uint32_t dmacmd)
982 {
983 uint32_t ctl = 0U;
984
985 if(USART5 == usart_periph){
986 ctl = USART5_CTL2(usart_periph);
987 ctl &= ~USART5_CTL2_DENT;
988 ctl |= (USART5_CTL2_DENT & dmacmd);
989 /* configure USART5 DMA transmission */
990 USART5_CTL2(usart_periph) = ctl;
991 }else{
992 ctl = USART_CTL2(usart_periph);
993 ctl &= ~USART_CTL2_DENT;
994 ctl |= (USART_CTL2_DENT & dmacmd);
995 /* configure USARTx(x=0,1,2)/UARTx(x=3,4) DMA transmission */
996 USART_CTL2(usart_periph) = ctl;
997 }
998 }
999
1000 /*!
1001 \brief configure hardware flow control RTS
1002 \param[in] usart_periph: USARTx(x=0,1,2)
1003 \param[in] rtsconfig: enable or disable RTS
1004 only one parameter can be selected which is shown as below:
1005 \arg USART_RTS_ENABLE: enable RTS
1006 \arg USART_RTS_DISABLE: disable RTS
1007 \param[out] none
1008 \retval none
1009 */
usart_hardware_flow_rts_config(uint32_t usart_periph,uint32_t rtsconfig)1010 void usart_hardware_flow_rts_config(uint32_t usart_periph, uint32_t rtsconfig)
1011 {
1012 uint32_t ctl = 0U;
1013
1014 ctl = USART_CTL2(usart_periph);
1015 ctl &= ~USART_CTL2_RTSEN;
1016 ctl |= (USART_CTL2_RTSEN & rtsconfig);
1017 /* configure USARTx(x=0,1,2) RTS */
1018 USART_CTL2(usart_periph) = ctl;
1019 }
1020
1021 /*!
1022 \brief configure hardware flow control CTS
1023 \param[in] usart_periph: USARTx(x=0,1,2)
1024 \param[in] ctsconfig: enable or disable CTS
1025 only one parameter can be selected which is shown as below:
1026 \arg USART_CTS_ENABLE: enable CTS
1027 \arg USART_CTS_DISABLE: disable CTS
1028 \param[out] none
1029 \retval none
1030 */
usart_hardware_flow_cts_config(uint32_t usart_periph,uint32_t ctsconfig)1031 void usart_hardware_flow_cts_config(uint32_t usart_periph, uint32_t ctsconfig)
1032 {
1033 uint32_t ctl = 0U;
1034
1035 ctl = USART_CTL2(usart_periph);
1036 ctl &= ~USART_CTL2_CTSEN;
1037 ctl |= (USART_CTL2_CTSEN & ctsconfig);
1038 /* configure USARTx(x=0,1,2) CTS */
1039 USART_CTL2(usart_periph) = ctl;
1040 }
1041
1042 /*!
1043 \brief data is transmitted/received with the LSB/MSB first
1044 \param[in] usart_periph: USARTx(x=0,1,2)
1045 \param[in] msbf: LSB/MSB
1046 only one parameter can be selected which is shown as below:
1047 \arg USART_MSBF_LSB: LSB first
1048 \arg USART_MSBF_MSB: MSB first
1049 \param[out] none
1050 \retval none
1051 */
usart_data_first_config(uint32_t usart_periph,uint32_t msbf)1052 void usart_data_first_config(uint32_t usart_periph, uint32_t msbf)
1053 {
1054 uint32_t ctl = 0U;
1055
1056 ctl = USART_CTL3(usart_periph);
1057 ctl &= ~(USART_CTL3_MSBF);
1058 ctl |= (USART_CTL3_MSBF & msbf);
1059 /* configure data transmitted/received mode */
1060 USART_CTL3(usart_periph) = ctl;
1061 }
1062
1063 /*!
1064 \brief configure USART inversion
1065 \param[in] usart_periph: USARTx(x=0,1,2)
1066 \param[in] invertpara: refer to enum USART_INVERT_CONFIG
1067 only one parameter can be selected which is shown as below:
1068 \arg USART_DINV_ENABLE: data bit level inversion
1069 \arg USART_DINV_DISABLE: data bit level not inversion
1070 \arg USART_TXPIN_ENABLE: TX pin level inversion
1071 \arg USART_TXPIN_DISABLE: TX pin level not inversion
1072 \arg USART_RXPIN_ENABLE: RX pin level inversion
1073 \arg USART_RXPIN_DISABLE: RX pin level not inversion
1074 \param[out] none
1075 \retval none
1076 */
usart_invert_config(uint32_t usart_periph,usart_invert_enum invertpara)1077 void usart_invert_config(uint32_t usart_periph, usart_invert_enum invertpara)
1078 {
1079 /* inverted or not the specified siginal */
1080 switch(invertpara){
1081 case USART_DINV_ENABLE:
1082 USART_CTL3(usart_periph) |= USART_CTL3_DINV;
1083 break;
1084 case USART_DINV_DISABLE:
1085 USART_CTL3(usart_periph) &= ~(USART_CTL3_DINV);
1086 break;
1087 case USART_TXPIN_ENABLE:
1088 USART_CTL3(usart_periph) |= USART_CTL3_TINV;
1089 break;
1090 case USART_TXPIN_DISABLE:
1091 USART_CTL3(usart_periph) &= ~(USART_CTL3_TINV);
1092 break;
1093 case USART_RXPIN_ENABLE:
1094 USART_CTL3(usart_periph) |= USART_CTL3_RINV;
1095 break;
1096 case USART_RXPIN_DISABLE:
1097 USART_CTL3(usart_periph) &= ~(USART_CTL3_RINV);
1098 break;
1099 default:
1100 break;
1101 }
1102 }
1103
1104 /*!
1105 \brief configure the address of the USART in wake up by address match mode
1106 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1107 \param[in] addr: address of USART/UART, 0x00000000-0x0000000F
1108 \param[out] none
1109 \retval none
1110 */
usart_address_config(uint32_t usart_periph,uint8_t addr)1111 void usart_address_config(uint32_t usart_periph, uint8_t addr)
1112 {
1113 USART_CTL1(usart_periph) &= ~(USART_CTL1_ADDR);
1114 USART_CTL1(usart_periph) |= (USART_CTL1_ADDR & addr);
1115 }
1116
1117 /*!
1118 \brief send break frame
1119 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1120 \param[out] none
1121 \retval none
1122 */
usart_send_break(uint32_t usart_periph)1123 void usart_send_break(uint32_t usart_periph)
1124 {
1125 USART_CTL0(usart_periph) |= USART_CTL0_SBKCMD;
1126 }
1127
1128 /*!
1129 \brief enable collision detected interrupt
1130 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1131 \param[out] none
1132 \retval none
1133 */
usart_collision_detected_interrupt_enable(uint32_t usart_periph)1134 void usart_collision_detected_interrupt_enable(uint32_t usart_periph)
1135 {
1136 USART_GDCTL(usart_periph) |= USART_GDCTL_CDIE;
1137 }
1138
1139 /*!
1140 \brief disable collision detected interrupt
1141 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1142 \param[out] none
1143 \retval none
1144 */
usart_collision_detected_interrupt_disable(uint32_t usart_periph)1145 void usart_collision_detected_interrupt_disable(uint32_t usart_periph)
1146 {
1147 USART_GDCTL(usart_periph) &= ~(USART_GDCTL_CDIE);
1148 }
1149
1150 /*!
1151 \brief enable collision detection
1152 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1153 \param[out] none
1154 \retval none
1155 */
usart_collision_detection_enable(uint32_t usart_periph)1156 void usart_collision_detection_enable(uint32_t usart_periph)
1157 {
1158 USART_GDCTL(usart_periph) |= USART_GDCTL_CDEN;
1159 }
1160
1161 /*!
1162 \brief disable collision detection
1163 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1164 \param[out] none
1165 \retval none
1166 */
usart_collision_detection_disable(uint32_t usart_periph)1167 void usart_collision_detection_disable(uint32_t usart_periph)
1168 {
1169 USART_GDCTL(usart_periph) &= ~(USART_GDCTL_CDEN);
1170 }
1171
1172 /*!
1173 \brief get flag in STAT0/STAT1/GDCTL register
1174 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1175 \param[in] flag: USART flags, refer to usart_flag_enum
1176 only one parameter can be selected which is shown as below:
1177 \arg USART_FLAG_CTS: CTS change flag
1178 \arg USART_FLAG_LBD: LIN break detected flag
1179 \arg USART_FLAG_TBE: transmit data buffer empty
1180 \arg USART_FLAG_TC: transmission complete
1181 \arg USART_FLAG_RBNE: read data buffer not empty
1182 \arg USART_FLAG_IDLE: IDLE frame detected flag
1183 \arg USART_FLAG_ORERR: overrun error flag
1184 \arg USART_FLAG_NERR: noise error flag
1185 \arg USART_FLAG_FERR: frame error flag
1186 \arg USART_FLAG_PERR: parity error flag
1187 \arg USART_FLAG_BSY: busy flag
1188 \arg USART_FLAG_EB: end of block flag
1189 \arg USART_FLAG_RT: receiver timeout flag
1190 \arg USART_FLAG_CD: collision detected flag
1191 \param[out] none
1192 \retval FlagStatus: SET or RESET
1193 */
usart_flag_get(uint32_t usart_periph,usart_flag_enum flag)1194 FlagStatus usart_flag_get(uint32_t usart_periph, usart_flag_enum flag)
1195 {
1196 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){
1197 return SET;
1198 }else{
1199 return RESET;
1200 }
1201 }
1202
1203 /*!
1204 \brief clear flag in STAT0/STAT1/GDCTL register
1205 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1206 \param[in] flag: USART flags, refer to usart_flag_enum
1207 only one parameter can be selected which is shown as below:
1208 \arg USART_FLAG_CTS: CTS change flag
1209 \arg USART_FLAG_LBD: LIN break detected flag
1210 \arg USART_FLAG_TC: transmission complete
1211 \arg USART_FLAG_RBNE: read data buffer not empty
1212 \arg USART_FLAG_EB: end of block flag
1213 \arg USART_FLAG_RT: receiver timeout flag
1214 \arg USART_FLAG_CD: collision detected flag
1215 \param[out] none
1216 \retval none
1217 */
usart_flag_clear(uint32_t usart_periph,usart_flag_enum flag)1218 void usart_flag_clear(uint32_t usart_periph, usart_flag_enum flag)
1219 {
1220 USART_REG_VAL(usart_periph, flag) &= ~BIT(USART_BIT_POS(flag));
1221 }
1222
1223 /*!
1224 \brief enable USART interrupt
1225 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1226 \param[in] interrupt: USART interrupts, refer to usart_interrupt_enum
1227 only one parameter can be selected which is shown as below:
1228 \arg USART_INT_PERR: parity error interrupt
1229 \arg USART_INT_TBE: transmitter buffer empty interrupt
1230 \arg USART_INT_TC: transmission complete interrupt
1231 \arg USART_INT_RBNE: read data buffer not empty interrupt and overrun error interrupt
1232 \arg USART_INT_IDLE: IDLE line detected interrupt
1233 \arg USART_INT_LBD: LIN break detected interrupt
1234 \arg USART_INT_ERR: error interrupt
1235 \arg USART_INT_CTS: CTS interrupt
1236 \arg USART_INT_RT: interrupt enable bit of receive timeout event
1237 \arg USART_INT_EB: interrupt enable bit of end of block event
1238 \arg USART_INT_CD: collision detected interrupt
1239 \param[out] none
1240 \retval none
1241 */
usart_interrupt_enable(uint32_t usart_periph,usart_interrupt_enum interrupt)1242 void usart_interrupt_enable(uint32_t usart_periph, usart_interrupt_enum interrupt)
1243 {
1244 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt));
1245 }
1246
1247 /*!
1248 \brief disable USART interrupt
1249 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1250 \param[in] interrupt: USART interrupts, refer to usart_interrupt_enum
1251 only one parameter can be selected which is shown as below:
1252 \arg USART_INT_PERR: parity error interrupt
1253 \arg USART_INT_TBE: transmitter buffer empty interrupt
1254 \arg USART_INT_TC: transmission complete interrupt
1255 \arg USART_INT_RBNE: read data buffer not empty interrupt and overrun error interrupt
1256 \arg USART_INT_IDLE: IDLE line detected interrupt
1257 \arg USART_INT_LBD: LIN break detected interrupt
1258 \arg USART_INT_ERR: error interrupt
1259 \arg USART_INT_CTS: CTS interrupt
1260 \arg USART_INT_RT: interrupt enable bit of receive timeout event
1261 \arg USART_INT_EB: interrupt enable bit of end of block event
1262 \arg USART_INT_CD: collision detected interrupt
1263 \param[out] none
1264 \retval none
1265 */
usart_interrupt_disable(uint32_t usart_periph,usart_interrupt_enum interrupt)1266 void usart_interrupt_disable(uint32_t usart_periph, usart_interrupt_enum interrupt)
1267 {
1268 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt));
1269 }
1270
1271 /*!
1272 \brief get USART interrupt and flag status
1273 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1274 \param[in] int_flag: USART interrupt flags, refer to usart_interrupt_flag_enum
1275 only one parameter can be selected which is shown as below:
1276 \arg USART_INT_FLAG_PERR: parity error interrupt and flag
1277 \arg USART_INT_FLAG_TBE: transmitter buffer empty interrupt and flag
1278 \arg USART_INT_FLAG_TC: transmission complete interrupt and flag
1279 \arg USART_INT_FLAG_RBNE: read data buffer not empty interrupt and flag
1280 \arg USART_INT_FLAG_RBNE_ORERR: read data buffer not empty interrupt and overrun error flag
1281 \arg USART_INT_FLAG_IDLE: IDLE line detected interrupt and flag
1282 \arg USART_INT_FLAG_LBD: LIN break detected interrupt and flag
1283 \arg USART_INT_FLAG_CTS: CTS interrupt and flag
1284 \arg USART_INT_FLAG_ERR_ORERR: error interrupt and overrun error
1285 \arg USART_INT_FLAG_ERR_NERR: error interrupt and noise error flag
1286 \arg USART_INT_FLAG_ERR_FERR: error interrupt and frame error flag
1287 \arg USART_INT_FLAG_EB: interrupt enable bit of end of block event and flag
1288 \arg USART_INT_FLAG_RT: interrupt enable bit of receive timeout event and flag
1289 \arg USART_INT_FLAG_CD: collision detected interrupt and flag
1290 \param[out] none
1291 \retval FlagStatus: SET or RESET
1292 */
usart_interrupt_flag_get(uint32_t usart_periph,usart_interrupt_flag_enum int_flag)1293 FlagStatus usart_interrupt_flag_get(uint32_t usart_periph, usart_interrupt_flag_enum int_flag)
1294 {
1295 uint32_t intenable = 0U, flagstatus = 0U;
1296 /* get the interrupt enable bit status */
1297 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag)));
1298 /* get the corresponding flag bit status */
1299 flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag)));
1300
1301 if((0U != flagstatus) && (0U != intenable)){
1302 return SET;
1303 }else{
1304 return RESET;
1305 }
1306 }
1307
1308 /*!
1309 \brief clear USART interrupt flag in STAT0/STAT1 register
1310 \param[in] usart_periph: USARTx(x=0,1,2)/UARTx(x=3,4)
1311 \param[in] int_flag: USART interrupt flags, refer to usart_interrupt_flag_enum
1312 only one parameter can be selected which is shown as below:
1313 \arg USART_INT_FLAG_CTS: CTS interrupt and flag
1314 \arg USART_INT_FLAG_LBD: LIN break detected interrupt and flag
1315 \arg USART_INT_FLAG_TC: transmission complete interrupt and flag
1316 \arg USART_INT_FLAG_RBNE: read data buffer not empty interrupt and flag
1317 \arg USART_INT_FLAG_EB: interrupt enable bit of end of block event and flag
1318 \arg USART_INT_FLAG_RT: interrupt enable bit of receive timeout event and flag
1319 \arg USART_INT_FLAG_CD: collision detected interrupt and flag
1320 \param[out] none
1321 \retval none
1322 */
usart_interrupt_flag_clear(uint32_t usart_periph,usart_interrupt_flag_enum int_flag)1323 void usart_interrupt_flag_clear(uint32_t usart_periph, usart_interrupt_flag_enum int_flag)
1324 {
1325 USART_REG_VAL2(usart_periph, int_flag) &= ~BIT(USART_BIT_POS2(int_flag));
1326 }
1327
1328 /*!
1329 \brief data is transmitted/received with the LSB/MSB first
1330 \param[in] usart_periph: USART5
1331 \param[in] msbf: LSB/MSB
1332 only one parameter can be selected which is shown as below:
1333 \arg USART5_MSBF_LSB: LSB first
1334 \arg USART5_MSBF_MSB: MSB first
1335 \param[out] none
1336 \retval none
1337 */
usart5_data_first_config(uint32_t usart_periph,uint32_t msbf)1338 void usart5_data_first_config(uint32_t usart_periph, uint32_t msbf)
1339 {
1340 uint32_t ctl = 0U;
1341
1342 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1343 ctl = USART5_CTL1(usart_periph);
1344 ctl &= ~(USART5_CTL1_MSBF);
1345 ctl |= (USART5_CTL1_MSBF & msbf);
1346 /* configure data transmitted/received mode */
1347 USART5_CTL1(usart_periph) = ctl;
1348 }
1349
1350 /*!
1351 \brief configure USART5 inversion
1352 \param[in] usart_periph: USART5
1353 \param[in] invertpara: refer to enum USART5_INVERT_CONFIG
1354 only one parameter can be selected which is shown as below:
1355 \arg USART5_DINV_ENABLE: data bit level inversion
1356 \arg USART5_DINV_DISABLE: data bit level not inversion
1357 \arg USART5_TXPIN_ENABLE: TX pin level inversion
1358 \arg USART5_TXPIN_DISABLE: TX pin level not inversion
1359 \arg USART5_RXPIN_ENABLE: RX pin level inversion
1360 \arg USART5_RXPIN_DISABLE: RX pin level not inversion
1361 \arg USART5_SWAP_ENABLE: swap TX/RX pins
1362 \arg USART5_SWAP_DISABLE: not swap TX/RX pins
1363 \param[out] none
1364 \retval none
1365 */
usart5_invert_config(uint32_t usart_periph,usart5_invert_enum invertpara)1366 void usart5_invert_config(uint32_t usart_periph, usart5_invert_enum invertpara)
1367 {
1368 /* inverted or not the specified siginal */
1369 switch(invertpara){
1370 case USART5_DINV_ENABLE:
1371 USART5_CTL1(usart_periph) |= USART5_CTL1_DINV;
1372 break;
1373 case USART5_DINV_DISABLE:
1374 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_DINV);
1375 break;
1376 case USART5_TXPIN_ENABLE:
1377 USART5_CTL1(usart_periph) |= USART5_CTL1_TINV;
1378 break;
1379 case USART5_TXPIN_DISABLE:
1380 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_TINV);
1381 break;
1382 case USART5_RXPIN_ENABLE:
1383 USART5_CTL1(usart_periph) |= USART5_CTL1_RINV;
1384 break;
1385 case USART5_RXPIN_DISABLE:
1386 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_RINV);
1387 break;
1388 case USART5_SWAP_ENABLE:
1389 USART5_CTL1(usart_periph) |= USART5_CTL1_STRP;
1390 break;
1391 case USART5_SWAP_DISABLE:
1392 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_STRP);
1393 break;
1394 default:
1395 break;
1396 }
1397 }
1398
1399 /*!
1400 \brief enable the USART5 overrun function
1401 \param[in] usart_periph: USART5
1402 \param[out] none
1403 \retval none
1404 */
usart5_overrun_enable(uint32_t usart_periph)1405 void usart5_overrun_enable(uint32_t usart_periph)
1406 {
1407 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1408 /* enable overrun function */
1409 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_OVRD);
1410 }
1411
1412 /*!
1413 \brief disable the USART5 overrun function
1414 \param[in] usart_periph: USART5
1415 \param[out] none
1416 \retval none
1417 */
usart5_overrun_disable(uint32_t usart_periph)1418 void usart5_overrun_disable(uint32_t usart_periph)
1419 {
1420 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1421 /* disable overrun function */
1422 USART5_CTL2(usart_periph) |= USART5_CTL2_OVRD;
1423 }
1424
1425 /*!
1426 \brief enable auto baud rate detection
1427 \param[in] usart_periph: USART5
1428 \param[out] none
1429 \retval none
1430 */
usart5_autobaud_detection_enable(uint32_t usart_periph)1431 void usart5_autobaud_detection_enable(uint32_t usart_periph)
1432 {
1433 USART5_CTL1(usart_periph) |= USART5_CTL1_ABDEN;
1434 }
1435
1436 /*!
1437 \brief disable auto baud rate detection
1438 \param[in] usart_periph: USART5
1439 \param[out] none
1440 \retval none
1441 */
usart5_autobaud_detection_disable(uint32_t usart_periph)1442 void usart5_autobaud_detection_disable(uint32_t usart_periph)
1443 {
1444 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_ABDEN);
1445 }
1446
1447 /*!
1448 \brief configure auto baud rate detection mode
1449 \param[in] usart_periph: USART5
1450 \param[in] abdmod: auto baud rate detection mode
1451 only one parameter can be selected which is shown as below:
1452 \arg USART5_ABDM_FTOR: falling edge to rising edge measurement
1453 \arg USART5_ABDM_FTOF: falling edge to falling edge measurement
1454 \param[out] none
1455 \retval none
1456 */
usart5_autobaud_detection_mode_config(uint32_t usart_periph,uint32_t abdmod)1457 void usart5_autobaud_detection_mode_config(uint32_t usart_periph, uint32_t abdmod)
1458 {
1459 /* reset ABDM bits */
1460 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_ABDM);
1461 USART5_CTL1(usart_periph) |= (USART5_CTL1_ABDM & abdmod);
1462 }
1463
1464 /*!
1465 \brief address of the USART terminal
1466 \param[in] usart_periph: USART5
1467 \param[in] addr: address of USART terminal, 0x00000000-0x000000FF
1468 \param[out] none
1469 \retval none
1470 */
usart5_address_config(uint32_t usart_periph,uint8_t addr)1471 void usart5_address_config(uint32_t usart_periph, uint8_t addr)
1472 {
1473 /* disable USART5 */
1474 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1475
1476 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_ADDR);
1477 USART5_CTL1(usart_periph) |= (USART5_CTL1_ADDR & (((uint32_t)addr) << 24));
1478 }
1479
1480 /*!
1481 \brief configure address detection mode
1482 \param[in] usart_periph: USART5
1483 \param[in] addmod: address detection mode
1484 only one parameter can be selected which is shown as below:
1485 \arg USART5_ADDM_4BIT: 4 bits
1486 \arg USART5_ADDM_FULLBIT: full bits
1487 \param[out] none
1488 \retval none
1489 */
usart5_address_detection_mode_config(uint32_t usart_periph,uint32_t addmod)1490 void usart5_address_detection_mode_config(uint32_t usart_periph, uint32_t addmod)
1491 {
1492 /* disable USART */
1493 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1494
1495 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_ADDM);
1496 USART5_CTL1(usart_periph) |= (USART5_CTL1_ADDM & addmod);
1497 }
1498
1499 /*!
1500 \brief enable early NACK in smartcard mode
1501 \param[in] usart_periph: USART5
1502 \param[out] none
1503 \retval none
1504 */
usart5_smartcard_mode_early_nack_enable(uint32_t usart_periph)1505 void usart5_smartcard_mode_early_nack_enable(uint32_t usart_periph)
1506 {
1507 USART5_RFCS(usart_periph) |= USART5_RFCS_ELNACK;
1508 }
1509
1510 /*!
1511 \brief disable early NACK in smartcard mode
1512 \param[in] usart_periph: USART5
1513 \param[out] none
1514 \retval none
1515 */
usart5_smartcard_mode_early_nack_disable(uint32_t usart_periph)1516 void usart5_smartcard_mode_early_nack_disable(uint32_t usart_periph)
1517 {
1518 USART5_RFCS(usart_periph) &= ~USART5_RFCS_ELNACK;
1519 }
1520
1521 /*!
1522 \brief enable DMA on reception error
1523 \param[in] usart_periph: USART5
1524 \param[out] none
1525 \retval none
1526 */
usart5_reception_error_dma_enable(uint32_t usart_periph)1527 void usart5_reception_error_dma_enable(uint32_t usart_periph)
1528 {
1529 /* disable USART5 */
1530 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1531
1532 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_DDRE);
1533 }
1534
1535 /*!
1536 \brief disable DMA on reception error
1537 \param[in] usart_periph: USART5
1538 \param[out] none
1539 \retval none
1540 */
usart5_reception_error_dma_disable(uint32_t usart_periph)1541 void usart5_reception_error_dma_disable(uint32_t usart_periph)
1542 {
1543 /* disable USART5 */
1544 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1545
1546 USART5_CTL2(usart_periph) |= USART5_CTL2_DDRE;
1547 }
1548
1549 /*!
1550 \brief enable USART to wakeup the mcu from deep-sleep mode
1551 \param[in] usart_periph: USART5
1552 \param[out] none
1553 \retval none
1554 */
usart5_wakeup_enable(uint32_t usart_periph)1555 void usart5_wakeup_enable(uint32_t usart_periph)
1556 {
1557 USART5_CTL0(usart_periph) |= USART5_CTL0_UESM;
1558 }
1559
1560 /*!
1561 \brief disable USART to wakeup the mcu from deep-sleep mode
1562 \param[in] usart_periph: USART5
1563 \param[out] none
1564 \retval none
1565 */
usart5_wakeup_disable(uint32_t usart_periph)1566 void usart5_wakeup_disable(uint32_t usart_periph)
1567 {
1568 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UESM);
1569 }
1570
1571 /*!
1572 \brief configure the USART wakeup mode from deep-sleep mode
1573 \param[in] usart_periph: USART5
1574 \param[in] wum: wakeup mode
1575 only one parameter can be selected which is shown as below:
1576 \arg USART5_WUM_ADDR: WUF active on address match
1577 \arg USART5_WUM_STARTB: WUF active on start bit
1578 \arg USART5_WUM_RBNE: WUF active on RBNE
1579 \param[out] none
1580 \retval none
1581 */
usart5_wakeup_mode_config(uint32_t usart_periph,uint32_t wum)1582 void usart5_wakeup_mode_config(uint32_t usart_periph, uint32_t wum)
1583 {
1584 /* disable USART5 */
1585 USART5_CTL0(usart_periph) &= ~(USART5_CTL0_UEN);
1586 /* reset WUM bit */
1587 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_WUM);
1588 USART5_CTL2(usart_periph) |= (USART5_CTL2_WUM & wum);
1589 }
1590
1591 /*!
1592 \brief enable receive FIFO
1593 \param[in] usart_periph: USART5
1594 \param[out] none
1595 \retval none
1596 */
usart5_receive_fifo_enable(uint32_t usart_periph)1597 void usart5_receive_fifo_enable(uint32_t usart_periph)
1598 {
1599 USART5_RFCS(usart_periph) |= USART5_RFCS_RFEN;
1600 }
1601
1602 /*!
1603 \brief disable receive FIFO
1604 \param[in] usart_periph: USART5
1605 \param[out] none
1606 \retval none
1607 */
usart5_receive_fifo_disable(uint32_t usart_periph)1608 void usart5_receive_fifo_disable(uint32_t usart_periph)
1609 {
1610 USART5_RFCS(usart_periph) &= ~(USART5_RFCS_RFEN);
1611 }
1612
1613 /*!
1614 \brief read receive FIFO counter number
1615 \param[in] usart_periph: USART5
1616 \param[out] none
1617 \retval receive FIFO counter number
1618 */
usart5_receive_fifo_counter_number(uint32_t usart_periph)1619 uint8_t usart5_receive_fifo_counter_number(uint32_t usart_periph)
1620 {
1621 return (uint8_t)(GET_BITS(USART5_RFCS(usart_periph), 12U, 14U));
1622 }
1623
1624 /*!
1625 \brief get flag in STAT/CHC/RFCS register
1626 \param[in] usart_periph: USART5
1627 \param[in] flag: flag type
1628 only one parameter can be selected which is shown as below:
1629 \arg USART5_FLAG_PERR: parity error flag
1630 \arg USART5_FLAG_FERR: frame error flag
1631 \arg USART5_FLAG_NERR: noise error flag
1632 \arg USART5_FLAG_ORERR: overrun error
1633 \arg USART5_FLAG_IDLE: idle line detected flag
1634 \arg USART5_FLAG_RBNE: read data buffer not empty
1635 \arg USART5_FLAG_TC: transmission completed
1636 \arg USART5_FLAG_TBE: transmit data register empty
1637 \arg USART5_FLAG_LBD: LIN break detected flag
1638 \arg USART5_FLAG_RT: receiver timeout flag
1639 \arg USART5_FLAG_EB: end of block flag
1640 \arg USART5_FLAG_ABDE: auto baudrate detection error
1641 \arg USART5_FLAG_ABD: auto baudrate detection flag
1642 \arg USART5_FLAG_BSY: busy flag
1643 \arg USART5_FLAG_AM: address match flag
1644 \arg USART5_FLAG_SB: send break flag
1645 \arg USART5_FLAG_RWU: receiver wakeup from mute mode.
1646 \arg USART5_FLAG_WU: wakeup from deep-sleep mode flag
1647 \arg USART5_FLAG_TEA: transmit enable acknowledge flag
1648 \arg USART5_FLAG_REA: receive enable acknowledge flag
1649 \arg USART5_FLAG_EPERR: early parity error flag
1650 \arg USART5_FLAG_RFE: receive FIFO empty flag
1651 \arg USART5_FLAG_RFF: receive FIFO full flag
1652 \arg USART5_FLAG_RFFINT: receive FIFO full interrupt flag
1653 \param[out] none
1654 \retval FlagStatus: SET or RESET
1655 */
usart5_flag_get(uint32_t usart_periph,usart5_flag_enum flag)1656 FlagStatus usart5_flag_get(uint32_t usart_periph, usart5_flag_enum flag)
1657 {
1658 if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){
1659 return SET;
1660 }else{
1661 return RESET;
1662 }
1663 }
1664
1665 /*!
1666 \brief clear USART status
1667 \param[in] usart_periph: USART5
1668 \param[in] flag: flag type
1669 only one parameter can be selected which is shown as below:
1670 \arg USART5_FLAG_PERR: parity error flag
1671 \arg USART5_FLAG_FERR: frame error flag
1672 \arg USART5_FLAG_NERR: noise detected flag
1673 \arg USART5_FLAG_ORERR: overrun error flag
1674 \arg USART5_FLAG_IDLE: idle line detected flag
1675 \arg USART5_FLAG_TC: transmission complete flag
1676 \arg USART5_FLAG_LBD: LIN break detected flag
1677 \arg USART5_FLAG_RT: receiver timeout flag
1678 \arg USART5_FLAG_EB: end of block flag
1679 \arg USART5_FLAG_AM: address match flag
1680 \arg USART5_FLAG_WU: wakeup from deep-sleep mode flag
1681 \arg USART5_FLAG_EPERR: early parity error flag
1682 \param[out] none
1683 \retval none
1684 */
usart5_flag_clear(uint32_t usart_periph,usart5_flag_enum flag)1685 void usart5_flag_clear(uint32_t usart_periph, usart5_flag_enum flag)
1686 {
1687 USART5_INTC(usart_periph) |= BIT(USART_BIT_POS(flag));
1688 }
1689
1690 /*!
1691 \brief enable USART interrupt
1692 \param[in] usart_periph: USART5
1693 \param[in] interrupt: USART5 interrupts, refer to usart5_interrupt_enum
1694 only one parameter can be selected which is shown as below:
1695 \arg USART5_INT_IDLE: idle interrupt
1696 \arg USART5_INT_RBNE: read data buffer not empty interrupt and
1697 overrun error interrupt enable interrupt
1698 \arg USART5_INT_TC: transmission complete interrupt
1699 \arg USART5_INT_TBE: transmit data register empty interrupt
1700 \arg USART5_INT_PERR: parity error interrupt
1701 \arg USART5_INT_AM: address match interrupt
1702 \arg USART5_INT_RT: receiver timeout interrupt
1703 \arg USART5_INT_EB: end of block interrupt
1704 \arg USART5_INT_LBD: LIN break detection interrupt
1705 \arg USART5_INT_ERR: error interrupt enable in multibuffer communication
1706 \arg USART5_INT_WU: wakeup from deep-sleep mode interrupt
1707 \arg USART5_INT_RFF: receive FIFO full interrupt enable
1708 \param[out] none
1709 \retval none
1710 */
usart5_interrupt_enable(uint32_t usart_periph,usart5_interrupt_enum interrupt)1711 void usart5_interrupt_enable(uint32_t usart_periph, usart5_interrupt_enum interrupt)
1712 {
1713 USART_REG_VAL(usart_periph, interrupt) |= BIT(USART_BIT_POS(interrupt));
1714 }
1715
1716 /*!
1717 \brief disable USART interrupt
1718 \param[in] usart_periph: USART5
1719 \param[in] interrupt: USART5 interrupts, refer to usart5_interrupt_enum
1720 only one parameter can be selected which is shown as below:
1721 \arg USART5_INT_IDLE: idle interrupt
1722 \arg USART5_INT_RBNE: read data buffer not empty interrupt and
1723 overrun error interrupt
1724 \arg USART5_INT_TC: transmission complete interrupt
1725 \arg USART5_INT_TBE: transmit data register empty interrupt
1726 \arg USART5_INT_PERR: parity error interrupt
1727 \arg USART5_INT_AM: address match interrupt
1728 \arg USART5_INT_RT: receiver timeout interrupt
1729 \arg USART5_INT_EB: end of block interrupt
1730 \arg USART5_INT_LBD: LIN break detection interrupt
1731 \arg USART5_INT_ERR: error interrupt enable in multibuffer communication
1732 \arg USART5_INT_WU: wakeup from deep-sleep mode interrupt
1733 \arg USART5_INT_RFF: receive FIFO full interrupt enable
1734 \param[out] none
1735 \retval none
1736 */
usart5_interrupt_disable(uint32_t usart_periph,usart5_interrupt_enum interrupt)1737 void usart5_interrupt_disable(uint32_t usart_periph, usart5_interrupt_enum interrupt)
1738 {
1739 USART_REG_VAL(usart_periph, interrupt) &= ~BIT(USART_BIT_POS(interrupt));
1740 }
1741
1742 /*!
1743 \brief enable USART command
1744 \param[in] usart_periph: USART5
1745 \param[in] cmdtype: command type
1746 only one parameter can be selected which is shown as below:
1747 \arg USART5_CMD_ABDCMD: auto baudrate detection command
1748 \arg USART5_CMD_SBKCMD: send break command
1749 \arg USART5_CMD_MMCMD: mute mode command
1750 \arg USART5_CMD_RXFCMD: receive data flush command
1751 \arg USART5_CMD_TXFCMD: transmit data flush request
1752 \param[out] none
1753 \retval none
1754 */
usart5_command_enable(uint32_t usart_periph,uint32_t cmdtype)1755 void usart5_command_enable(uint32_t usart_periph, uint32_t cmdtype)
1756 {
1757 USART5_CMD(usart_periph) |= (cmdtype);
1758 }
1759
1760 /*!
1761 \brief get USART interrupt and flag status
1762 \param[in] usart_periph: USART5
1763 \param[in] int_flag: interrupt and flag type, refer to usart5_interrupt_flag_enum
1764 only one parameter can be selected which is shown as below:
1765 \arg USART5_INT_FLAG_EB: end of block interrupt and flag
1766 \arg USART5_INT_FLAG_RT: receiver timeout interrupt and flag
1767 \arg USART5_INT_FLAG_AM: address match interrupt and flag
1768 \arg USART5_INT_FLAG_PERR: parity error interrupt and flag
1769 \arg USART5_INT_FLAG_TBE: transmitter buffer empty interrupt and flag
1770 \arg USART5_INT_FLAG_TC: transmission complete interrupt and flag
1771 \arg USART5_INT_FLAG_RBNE: read data buffer not empty interrupt and flag
1772 \arg USART5_INT_FLAG_RBNE_ORERR: read data buffer not empty interrupt and overrun error flag
1773 \arg USART5_INT_FLAG_IDLE: IDLE line detected interrupt and flag
1774 \arg USART5_INT_FLAG_LBD: LIN break detected interrupt and flag
1775 \arg USART5_INT_FLAG_WU: wakeup from deep-sleep mode interrupt and flag
1776 \arg USART5_INT_FLAG_ERR_NERR: error interrupt and noise error flag
1777 \arg USART5_INT_FLAG_ERR_ORERR: error interrupt and overrun error
1778 \arg USART5_INT_FLAG_ERR_FERR: error interrupt and frame error flag
1779 \arg USART5_INT_FLAG_RFF: receive FIFO full interrupt and flag
1780 \param[out] none
1781 \retval FlagStatus: SET or RESET
1782 */
usart5_interrupt_flag_get(uint32_t usart_periph,usart5_interrupt_flag_enum int_flag)1783 FlagStatus usart5_interrupt_flag_get(uint32_t usart_periph, usart5_interrupt_flag_enum int_flag)
1784 {
1785 uint32_t intenable = 0U, flagstatus = 0U;
1786 /* get the interrupt enable bit status */
1787 intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag)));
1788 /* get the corresponding flag bit status */
1789 flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag)));
1790
1791 if(flagstatus && intenable){
1792 return SET;
1793 }else{
1794 return RESET;
1795 }
1796 }
1797
1798 /*!
1799 \brief clear USART interrupt flag
1800 \param[in] usart_periph: USART5
1801 \param[in] int_flag: interrupt and flag type, refer to usart5_interrupt_flag_enum
1802 only one parameter can be selected which is shown as below:
1803 \arg USART5_INT_FLAG_PERR: parity error interrupt and flag
1804 \arg USART5_INT_FLAG_ERR_FERR: error interrupt and frame error flag
1805 \arg USART5_INT_FLAG_ERR_NERR: error interrupt and noise error flag
1806 \arg USART5_INT_FLAG_RBNE_ORERR: read data buffer not empty interrupt and overrun error flag
1807 \arg USART5_INT_FLAG_ERR_ORERR: error interrupt and overrun error
1808 \arg USART5_INT_FLAG_IDLE: IDLE line detected interrupt and flag
1809 \arg USART5_INT_FLAG_TC: transmission complete interrupt and flag
1810 \arg USART5_INT_FLAG_LBD: LIN break detected interrupt and flag
1811 \arg USART5_INT_FLAG_RT: receiver timeout interrupt and flag
1812 \arg USART5_INT_FLAG_EB: end of block interrupt and flag
1813 \arg USART5_INT_FLAG_AM: address match interrupt and flag
1814 \arg USART5_INT_FLAG_WU: wakeup from deep-sleep mode interrupt and flag
1815 \arg USART5_INT_FLAG_RFF: receive FIFO full interrupt and flag
1816 \param[out] none
1817 \retval none
1818 */
usart5_interrupt_flag_clear(uint32_t usart_periph,usart5_interrupt_flag_enum int_flag)1819 void usart5_interrupt_flag_clear(uint32_t usart_periph, usart5_interrupt_flag_enum int_flag)
1820 {
1821 if(USART5_INT_FLAG_RFF == int_flag){
1822 USART5_RFCS(usart_periph) &= (uint32_t)(~USART5_RFCS_RFFINT);
1823 }else{
1824 USART5_INTC(usart_periph) |= BIT(USART_BIT_POS2(int_flag));
1825 }
1826 }
1827
