1 // Copyright 2019 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 /******************************************************************************* 16 * NOTICE 17 * The hal is not public api, don't use in application code. 18 * See readme.md in hal/include/hal/readme.md 19 ******************************************************************************/ 20 21 // The HAL layer for Timer Group. 22 // There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters. 23 24 #pragma once 25 26 #ifdef __cplusplus 27 extern "C" { 28 #endif 29 30 #include "soc/soc_caps.h" 31 #include "hal/timer_ll.h" 32 #include "hal/timer_types.h" 33 34 /** 35 * Context that should be maintained by both the driver and the HAL 36 */ 37 typedef struct { 38 timg_dev_t *dev; 39 timer_idx_t idx; 40 } timer_hal_context_t; 41 42 /** 43 * @brief Init the timer hal. This function should be called first before other hal layer function is called 44 * 45 * @param hal Context of the HAL layer 46 * @param group_num The timer group number 47 * @param timer_num The timer number 48 * 49 * @return None 50 */ 51 void timer_hal_init(timer_hal_context_t *hal, timer_group_t group_num, timer_idx_t timer_num); 52 53 /** 54 * @brief Get interrupt status register address and corresponding control bits mask 55 * 56 * @param hal Context of the HAL layer 57 * @param status_reg[out] interrupt status register address 58 * @param mask_bit[out] control bits mask 59 */ 60 void timer_hal_get_status_reg_mask_bit(timer_hal_context_t *hal, uint32_t *status_reg, uint32_t *mask_bit); 61 62 /** 63 * @brief Set timer clock prescale value 64 * 65 * @param hal Context of the HAL layer 66 * @param divider Prescale value 67 * 68 * @return None 69 */ 70 #define timer_hal_set_divider(hal, divider) timer_ll_set_divider((hal)->dev, (hal)->idx, divider) 71 72 /** 73 * @brief Get timer clock prescale value 74 * 75 * @param hal Context of the HAL layer 76 * @param divider Pointer to accept the prescale value 77 * 78 * @return None 79 */ 80 #define timer_hal_get_divider(hal, divider) timer_ll_get_divider((hal)->dev, (hal)->idx, divider) 81 82 /** 83 * @brief Load counter value into time-base counter 84 * 85 * @param hal Context of the HAL layer 86 * @param load_val Counter value 87 * 88 * @return None 89 */ 90 #define timer_hal_set_counter_value(hal, load_val) timer_ll_set_counter_value((hal)->dev, (hal)->idx, load_val) 91 92 /** 93 * @brief Get counter value from time-base counter 94 * 95 * @param hal Context of the HAL layer 96 * @param timer_val Pointer to accept the counter value 97 * 98 * @return None 99 */ 100 #define timer_hal_get_counter_value(hal, timer_val) timer_ll_get_counter_value((hal)->dev, (hal)->idx, timer_val) 101 102 /** 103 * @brief Set counter mode, include increment mode and decrement mode. 104 * 105 * @param hal Context of the HAL layer 106 * @param increase_en True to increment mode, fasle to decrement mode 107 * 108 * @return None 109 */ 110 #define timer_hal_set_counter_increase(hal, increase_en) timer_ll_set_counter_increase((hal)->dev, (hal)->idx, increase_en) 111 112 /** 113 * @brief Get counter mode, include increment mode and decrement mode. 114 * 115 * @param hal Context of the HAL layer 116 * @param counter_dir Pointer to accept the counter mode 117 * 118 * @return 119 * - true Increment mode 120 * - false Decrement mode 121 */ 122 #define timer_hal_get_counter_increase(hal) timer_ll_get_counter_increase((hal)->dev, (hal)->idx) 123 124 /** 125 * @brief Set counter status, enable or disable counter. 126 * 127 * @param hal Context of the HAL layer 128 * @param counter_en True to enable counter, false to disable counter 129 * 130 * @return None 131 */ 132 #define timer_hal_set_counter_enable(hal, counter_en) timer_ll_set_counter_enable((hal)->dev, (hal)->idx, counter_en) 133 134 /** 135 * @brief Get counter status. 136 * 137 * @param hal Context of the HAL layer 138 * 139 * @return 140 * - true Enable counter 141 * - false Disable conuter 142 */ 143 #define timer_hal_get_counter_enable(hal) timer_ll_get_counter_enable((hal)->dev, (hal)->idx) 144 145 /** 146 * @brief Set auto reload mode. 147 * 148 * @param hal Context of the HAL layer 149 * @param auto_reload_en True to enable auto reload mode, flase to disable auto reload mode 150 * 151 * @return None 152 */ 153 #define timer_hal_set_auto_reload(hal, auto_reload_en) timer_ll_set_auto_reload((hal)->dev, (hal)->idx, auto_reload_en) 154 155 /** 156 * @brief Get auto reload mode. 157 * 158 * @param hal Context of the HAL layer 159 * 160 * @return 161 * - true Enable auto reload mode 162 * - false Disable auto reload mode 163 */ 164 #define timer_hal_get_auto_reload(hal) timer_ll_get_auto_reload((hal)->dev, (hal)->idx) 165 166 /** 167 * @brief Set the counter value to trigger the alarm. 168 * 169 * @param hal Context of the HAL layer 170 * @param alarm_value Counter value to trigger the alarm 171 * 172 * @return None 173 */ 174 #define timer_hal_set_alarm_value(hal, alarm_value) timer_ll_set_alarm_value((hal)->dev, (hal)->idx, alarm_value) 175 176 /** 177 * @brief Get the counter value to trigger the alarm. 178 * 179 * @param hal Context of the HAL layer 180 * @param alarm_value Pointer to accept the counter value to trigger the alarm 181 * 182 * @return None 183 */ 184 #define timer_hal_get_alarm_value(hal, alarm_value) timer_ll_get_alarm_value((hal)->dev, (hal)->idx, alarm_value) 185 186 /** 187 * @brief Set the alarm status, enable or disable the alarm. 188 * 189 * @param hal Context of the HAL layer 190 * @param alarm_en True to enable alarm, false to disable alarm 191 * 192 * @return None 193 */ 194 #define timer_hal_set_alarm_enable(hal, alarm_en) timer_ll_set_alarm_enable((hal)->dev, (hal)->idx, alarm_en) 195 196 /** 197 * @brief Get the alarm status. 198 * 199 * @param hal Context of the HAL layer 200 * 201 * @return 202 * - true Enable alarm 203 * - false Disable alarm 204 */ 205 #define timer_hal_get_alarm_enable(hal) timer_ll_get_alarm_enable((hal)->dev, (hal)->idx) 206 207 /** 208 * @brief Set the level interrupt status, enable or disable the level interrupt. 209 * 210 * @param hal Context of the HAL layer 211 * @param level_int_en True to enable level interrupt, false to disable level interrupt 212 * 213 * @return None 214 */ 215 #define timer_hal_set_level_int_enable(hal, level_int_en) timer_ll_set_level_int_enable((hal)->dev, (hal)->idx, level_int_en) 216 217 /** 218 * @brief Get the level interrupt status. 219 * 220 * @param hal Context of the HAL layer 221 * 222 * @return 223 * - true Enable level interrupt 224 * - false Disable level interrupt 225 */ 226 #define timer_hal_get_level_int_enable(hal) timer_ll_get_level_int_enable((hal)->dev, (hal)->idx) 227 228 /** 229 * @brief Set the edge interrupt status, enable or disable the edge interrupt. 230 * 231 * @param hal Context of the HAL layer 232 * @param edge_int_en True to enable edge interrupt, false to disable edge interrupt 233 * 234 * @return None 235 */ 236 #define timer_hal_set_edge_int_enable(hal, edge_int_en) timer_ll_set_edge_int_enable((hal)->dev, (hal)->idx, edge_int_en) 237 238 /** 239 * @brief Get the edge interrupt status. 240 * 241 * @param hal Context of the HAL layer 242 * 243 * @return 244 * - true Enable edge interrupt 245 * - false Disable edge interrupt 246 */ 247 #define timer_hal_get_edge_int_enable(hal) timer_ll_get_edge_int_enable((hal)->dev, (hal)->idx) 248 249 /** 250 * @brief Enable timer interrupt. 251 * 252 * @param hal Context of the HAL layer 253 * 254 * @return None 255 */ 256 #define timer_hal_intr_enable(hal) timer_ll_intr_enable((hal)->dev, (hal)->idx) 257 258 /** 259 * @brief Disable timer interrupt. 260 * 261 * @param hal Context of the HAL layer 262 * 263 * @return None 264 */ 265 #define timer_hal_intr_disable(hal) timer_ll_intr_disable((hal)->dev, (hal)->idx) 266 267 /** 268 * @brief Clear interrupt status. 269 * 270 * @param hal Context of the HAL layer 271 * 272 * @return None 273 */ 274 #define timer_hal_clear_intr_status(hal) timer_ll_clear_intr_status((hal)->dev, (hal)->idx) 275 276 /** 277 * @brief Get interrupt status. 278 * 279 * @param hal Context of the HAL layer 280 * @param intr_status Interrupt status 281 * 282 * @return None 283 */ 284 #define timer_hal_get_intr_status(hal, intr_status) timer_ll_get_intr_status((hal)->dev, intr_status) 285 286 /** 287 * @brief Get interrupt raw status. 288 * 289 * @param group_num Timer group number, 0 for TIMERG0 or 1 for TIMERG1 290 * @param intr_raw_status Interrupt raw status 291 * 292 * @return None 293 */ 294 #define timer_hal_get_intr_raw_status(group_num, intr_raw_status) timer_ll_get_intr_raw_status(group_num, intr_raw_status) 295 296 /** 297 * @brief Get interrupt status register address. 298 * 299 * @param hal Context of the HAL layer 300 * 301 * @return Interrupt status register address 302 */ 303 #define timer_hal_get_intr_status_reg(hal) timer_ll_get_intr_status_reg((hal)->dev) 304 305 #if SOC_TIMER_GROUP_SUPPORT_XTAL 306 /** 307 * @brief Set clock source. 308 * 309 * @param hal Context of the HAL layer 310 * @param use_xtal_en True to use XTAL clock, flase to use APB clock 311 * 312 * @return None 313 */ 314 #define timer_hal_set_use_xtal(hal, use_xtal_en) timer_ll_set_use_xtal((hal)->dev, (hal)->idx, use_xtal_en) 315 316 /** 317 * @brief Get clock source. 318 * 319 * @param hal Context of the HAL layer 320 * 321 * @return 322 * - true Use XTAL clock 323 * - false Use APB clock 324 */ 325 #define timer_hal_get_use_xtal(hal) timer_ll_get_use_xtal((hal)->dev, (hal)->idx) 326 #endif 327 328 #ifdef __cplusplus 329 } 330 #endif 331
