1 /*
2 * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <string.h>
8 #include "esp_log.h"
9 #include "esp_err.h"
10 #include "esp_check.h"
11 #include "esp_intr_alloc.h"
12 #include "freertos/FreeRTOS.h"
13 #include "driver/timer.h"
14 #include "driver/periph_ctrl.h"
15 #include "hal/timer_hal.h"
16 #include "soc/timer_periph.h"
17 #include "soc/rtc.h"
18
19 static const char *TIMER_TAG = "timer_group";
20
21 #define TIMER_GROUP_NUM_ERROR "TIMER GROUP NUM ERROR"
22 #define TIMER_NUM_ERROR "HW TIMER NUM ERROR"
23 #define TIMER_PARAM_ADDR_ERROR "HW TIMER PARAM ADDR ERROR"
24 #define TIMER_NEVER_INIT_ERROR "HW TIMER NEVER INIT ERROR"
25 #define TIMER_COUNT_DIR_ERROR "HW TIMER COUNTER DIR ERROR"
26 #define TIMER_AUTORELOAD_ERROR "HW TIMER AUTORELOAD ERROR"
27 #define TIMER_SCALE_ERROR "HW TIMER SCALE ERROR"
28 #define TIMER_ALARM_ERROR "HW TIMER ALARM ERROR"
29 #define DIVIDER_RANGE_ERROR "HW TIMER divider outside of [2, 65536] range error"
30
31 #define TIMER_ENTER_CRITICAL(mux) portENTER_CRITICAL_SAFE(mux);
32 #define TIMER_EXIT_CRITICAL(mux) portEXIT_CRITICAL_SAFE(mux);
33
34 typedef struct {
35 timer_isr_t fn; /*!< isr function */
36 void *args; /*!< isr function args */
37 timer_isr_handle_t timer_isr_handle; /*!< interrupt handle */
38 timer_group_t isr_timer_group; /*!< timer group of interrupt triggered */
39 } timer_isr_func_t;
40
41 typedef struct {
42 timer_hal_context_t hal;
43 timer_isr_func_t timer_isr_fun;
44 } timer_obj_t;
45
46 static timer_obj_t *p_timer_obj[TIMER_GROUP_MAX][TIMER_MAX] = {0};
47 static portMUX_TYPE timer_spinlock[TIMER_GROUP_MAX] = {portMUX_INITIALIZER_UNLOCKED, portMUX_INITIALIZER_UNLOCKED};
48
timer_get_counter_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t * timer_val)49 esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *timer_val)
50 {
51 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
52 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
53 ESP_RETURN_ON_FALSE(timer_val != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
54 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
55 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
56 timer_hal_get_counter_value(&(p_timer_obj[group_num][timer_num]->hal), timer_val);
57 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
58 return ESP_OK;
59 }
60
timer_get_counter_time_sec(timer_group_t group_num,timer_idx_t timer_num,double * time)61 esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double *time)
62 {
63 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
64 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
65 ESP_RETURN_ON_FALSE(time != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
66 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
67 uint64_t timer_val;
68 esp_err_t err = timer_get_counter_value(group_num, timer_num, &timer_val);
69 if (err == ESP_OK) {
70 uint32_t div;
71 timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div);
72 *time = (double)timer_val * div / rtc_clk_apb_freq_get();
73 #if SOC_TIMER_GROUP_SUPPORT_XTAL
74 if (timer_hal_get_use_xtal(&(p_timer_obj[group_num][timer_num]->hal))) {
75 *time = (double)timer_val * div / ((int)rtc_clk_xtal_freq_get() * 1000000);
76 }
77 #endif
78 }
79 return err;
80 }
81
timer_set_counter_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t load_val)82 esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val)
83 {
84 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
85 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
86 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
87 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
88 timer_hal_set_counter_value(&(p_timer_obj[group_num][timer_num]->hal), load_val);
89 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
90 return ESP_OK;
91 }
92
timer_start(timer_group_t group_num,timer_idx_t timer_num)93 esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num)
94 {
95 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
96 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
97 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
98 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
99 timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_START);
100 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
101 return ESP_OK;
102 }
103
timer_pause(timer_group_t group_num,timer_idx_t timer_num)104 esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num)
105 {
106 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
107 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
108 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
109 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
110 timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_PAUSE);
111 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
112 return ESP_OK;
113 }
114
timer_set_counter_mode(timer_group_t group_num,timer_idx_t timer_num,timer_count_dir_t counter_dir)115 esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir)
116 {
117 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
118 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
119 ESP_RETURN_ON_FALSE(counter_dir < TIMER_COUNT_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_COUNT_DIR_ERROR);
120 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
121 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
122 timer_hal_set_counter_increase(&(p_timer_obj[group_num][timer_num]->hal), counter_dir);
123 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
124 return ESP_OK;
125 }
126
timer_set_auto_reload(timer_group_t group_num,timer_idx_t timer_num,timer_autoreload_t reload)127 esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload)
128 {
129 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
130 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
131 ESP_RETURN_ON_FALSE(reload < TIMER_AUTORELOAD_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_AUTORELOAD_ERROR);
132 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
133 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
134 timer_hal_set_auto_reload(&(p_timer_obj[group_num][timer_num]->hal), reload);
135 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
136 return ESP_OK;
137 }
138
timer_set_divider(timer_group_t group_num,timer_idx_t timer_num,uint32_t divider)139 esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint32_t divider)
140 {
141 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
142 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
143 ESP_RETURN_ON_FALSE(divider > 1 && divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
144 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
145 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
146 timer_hal_set_divider(&(p_timer_obj[group_num][timer_num]->hal), divider);
147 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
148 return ESP_OK;
149 }
150
timer_set_alarm_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t alarm_value)151 esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value)
152 {
153 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
154 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
155 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
156 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
157 timer_hal_set_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_value);
158 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
159 return ESP_OK;
160 }
161
timer_get_alarm_value(timer_group_t group_num,timer_idx_t timer_num,uint64_t * alarm_value)162 esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *alarm_value)
163 {
164 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
165 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
166 ESP_RETURN_ON_FALSE(alarm_value != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
167 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
168 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
169 timer_hal_get_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_value);
170 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
171 return ESP_OK;
172 }
173
timer_set_alarm(timer_group_t group_num,timer_idx_t timer_num,timer_alarm_t alarm_en)174 esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en)
175 {
176 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
177 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
178 ESP_RETURN_ON_FALSE(alarm_en < TIMER_ALARM_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_ALARM_ERROR);
179 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
180 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
181 timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), alarm_en);
182 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
183 return ESP_OK;
184 }
185
timer_isr_default(void * arg)186 static void IRAM_ATTR timer_isr_default(void *arg)
187 {
188 bool is_awoken = false;
189
190 timer_obj_t *timer_obj = (timer_obj_t *)arg;
191 if (timer_obj == NULL) {
192 return;
193 }
194 if (timer_obj->timer_isr_fun.fn == NULL) {
195 return;
196 }
197
198 TIMER_ENTER_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
199 {
200 uint32_t intr_status = 0;
201 timer_hal_get_intr_status(&(timer_obj->hal), &intr_status);
202 if (intr_status & BIT(timer_obj->hal.idx)) {
203 // Clear intrrupt status
204 timer_hal_clear_intr_status(&(timer_obj->hal));
205 uint64_t old_alarm_value = 0;
206 timer_hal_get_alarm_value(&(timer_obj->hal), &old_alarm_value);
207 // call user registered callback
208 is_awoken = timer_obj->timer_isr_fun.fn(timer_obj->timer_isr_fun.args);
209 // reenable alarm if required
210 uint64_t new_alarm_value = 0;
211 timer_hal_get_alarm_value(&(timer_obj->hal), &new_alarm_value);
212 bool reenable_alarm = (new_alarm_value != old_alarm_value) || timer_hal_get_auto_reload(&timer_obj->hal);
213 timer_hal_set_alarm_enable(&(timer_obj->hal), reenable_alarm);
214 }
215 }
216 TIMER_EXIT_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
217
218 if (is_awoken) {
219 portYIELD_FROM_ISR();
220 }
221 }
222
timer_isr_callback_add(timer_group_t group_num,timer_idx_t timer_num,timer_isr_t isr_handler,void * args,int intr_alloc_flags)223 esp_err_t timer_isr_callback_add(timer_group_t group_num, timer_idx_t timer_num, timer_isr_t isr_handler, void *args, int intr_alloc_flags)
224 {
225 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
226 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
227 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
228
229 timer_disable_intr(group_num, timer_num);
230 p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = isr_handler;
231 p_timer_obj[group_num][timer_num]->timer_isr_fun.args = args;
232 p_timer_obj[group_num][timer_num]->timer_isr_fun.isr_timer_group = group_num;
233 timer_isr_register(group_num, timer_num, timer_isr_default, (void *)p_timer_obj[group_num][timer_num],
234 intr_alloc_flags, &(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle));
235 timer_enable_intr(group_num, timer_num);
236
237 return ESP_OK;
238 }
239
timer_isr_callback_remove(timer_group_t group_num,timer_idx_t timer_num)240 esp_err_t timer_isr_callback_remove(timer_group_t group_num, timer_idx_t timer_num)
241 {
242 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
243 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
244 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
245
246 timer_disable_intr(group_num, timer_num);
247 p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = NULL;
248 p_timer_obj[group_num][timer_num]->timer_isr_fun.args = NULL;
249 esp_intr_free(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle);
250
251 return ESP_OK;
252 }
253
timer_isr_register(timer_group_t group_num,timer_idx_t timer_num,void (* fn)(void *),void * arg,int intr_alloc_flags,timer_isr_handle_t * handle)254 esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num,
255 void (*fn)(void *), void *arg, int intr_alloc_flags, timer_isr_handle_t *handle)
256 {
257 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
258 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
259 ESP_RETURN_ON_FALSE(fn != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
260 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
261
262 uint32_t status_reg = 0;
263 uint32_t mask = 0;
264 timer_hal_get_status_reg_mask_bit(&(p_timer_obj[group_num][timer_num]->hal), &status_reg, &mask);
265 return esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_num].t0_irq_id + timer_num, intr_alloc_flags, status_reg, mask, fn, arg, handle);
266 }
267
timer_init(timer_group_t group_num,timer_idx_t timer_num,const timer_config_t * config)268 esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer_config_t *config)
269 {
270 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
271 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
272 ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
273 ESP_RETURN_ON_FALSE(config->divider > 1 && config->divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
274
275 periph_module_enable(timer_group_periph_signals.groups[group_num].module);
276
277 if (p_timer_obj[group_num][timer_num] == NULL) {
278 p_timer_obj[group_num][timer_num] = (timer_obj_t *) heap_caps_calloc(1, sizeof(timer_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
279 if (p_timer_obj[group_num][timer_num] == NULL) {
280 ESP_LOGE(TIMER_TAG, "TIMER driver malloc error");
281 return ESP_FAIL;
282 }
283 }
284
285 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
286 timer_hal_init(&(p_timer_obj[group_num][timer_num]->hal), group_num, timer_num);
287 timer_hal_reset_periph(&(p_timer_obj[group_num][timer_num]->hal));
288 timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
289 timer_hal_set_auto_reload(&(p_timer_obj[group_num][timer_num]->hal), config->auto_reload);
290 timer_hal_set_divider(&(p_timer_obj[group_num][timer_num]->hal), config->divider);
291 timer_hal_set_counter_increase(&(p_timer_obj[group_num][timer_num]->hal), config->counter_dir);
292 timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), config->alarm_en);
293 timer_hal_set_level_int_enable(&(p_timer_obj[group_num][timer_num]->hal), config->intr_type == TIMER_INTR_LEVEL);
294 if (config->intr_type != TIMER_INTR_LEVEL) {
295 ESP_LOGW(TIMER_TAG, "only support Level Interrupt, switch to Level Interrupt instead");
296 }
297 timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), config->counter_en);
298 #if SOC_TIMER_GROUP_SUPPORT_XTAL
299 timer_hal_set_use_xtal(&(p_timer_obj[group_num][timer_num]->hal), config->clk_src);
300 #endif
301 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
302
303 return ESP_OK;
304 }
305
timer_deinit(timer_group_t group_num,timer_idx_t timer_num)306 esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num)
307 {
308 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
309 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
310 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
311
312 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
313 timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), TIMER_PAUSE);
314 timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
315 timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
316 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
317
318 heap_caps_free(p_timer_obj[group_num][timer_num]);
319 p_timer_obj[group_num][timer_num] = NULL;
320
321 return ESP_OK;
322 }
323
timer_get_config(timer_group_t group_num,timer_idx_t timer_num,timer_config_t * config)324 esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config)
325 {
326 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
327 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
328 ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
329 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
330
331 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
332 config->alarm_en = timer_hal_get_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal));
333 config->auto_reload = timer_hal_get_auto_reload(&(p_timer_obj[group_num][timer_num]->hal));
334 config->counter_dir = timer_hal_get_counter_increase(&(p_timer_obj[group_num][timer_num]->hal));
335 config->counter_en = timer_hal_get_counter_enable(&(p_timer_obj[group_num][timer_num]->hal));
336
337 uint32_t div;
338 timer_hal_get_divider(&(p_timer_obj[group_num][timer_num]->hal), &div);
339 config->divider = div;
340
341 if (timer_hal_get_level_int_enable(&(p_timer_obj[group_num][timer_num]->hal))) {
342 config->intr_type = TIMER_INTR_LEVEL;
343 } else {
344 config->intr_type = TIMER_INTR_MAX;
345 }
346 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
347 return ESP_OK;
348 }
349
timer_group_intr_enable(timer_group_t group_num,timer_intr_t en_mask)350 esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t en_mask)
351 {
352 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
353 ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
354 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
355 for (int i = 0; i < TIMER_MAX; i++) {
356 if (en_mask & BIT(i)) {
357 timer_hal_intr_enable(&(p_timer_obj[group_num][i]->hal));
358 }
359 }
360 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
361 return ESP_OK;
362 }
363
timer_group_intr_disable(timer_group_t group_num,timer_intr_t disable_mask)364 esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t disable_mask)
365 {
366 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
367 ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
368 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
369 for (int i = 0; i < TIMER_MAX; i++) {
370 if (disable_mask & BIT(i)) {
371 timer_hal_intr_disable(&(p_timer_obj[group_num][i]->hal));
372 }
373 }
374 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
375 return ESP_OK;
376 }
377
timer_enable_intr(timer_group_t group_num,timer_idx_t timer_num)378 esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num)
379 {
380 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
381 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
382 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
383 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
384 timer_hal_intr_enable(&(p_timer_obj[group_num][timer_num]->hal));
385 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
386 return ESP_OK;
387 }
388
timer_disable_intr(timer_group_t group_num,timer_idx_t timer_num)389 esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num)
390 {
391 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
392 ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
393 ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
394 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
395 timer_hal_intr_disable(&(p_timer_obj[group_num][timer_num]->hal));
396 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
397 return ESP_OK;
398 }
399
400 /* This function is deprecated */
timer_group_intr_get_in_isr(timer_group_t group_num)401 timer_intr_t IRAM_ATTR timer_group_intr_get_in_isr(timer_group_t group_num)
402 {
403 uint32_t intr_raw_status = 0;
404 timer_hal_get_intr_raw_status(group_num, &intr_raw_status);
405 return intr_raw_status;
406 }
407
timer_group_get_intr_status_in_isr(timer_group_t group_num)408 uint32_t IRAM_ATTR timer_group_get_intr_status_in_isr(timer_group_t group_num)
409 {
410 uint32_t intr_status = 0;
411 if (p_timer_obj[group_num][TIMER_0] != NULL) {
412 timer_hal_get_intr_status(&(p_timer_obj[group_num][TIMER_0]->hal), &intr_status);
413 }
414 #if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
415 else if (p_timer_obj[group_num][TIMER_1] != NULL) {
416 timer_hal_get_intr_status(&(p_timer_obj[group_num][TIMER_1]->hal), &intr_status);
417 }
418 #endif
419 return intr_status;
420 }
421
422 /* This function is deprecated */
timer_group_intr_clr_in_isr(timer_group_t group_num,timer_idx_t timer_num)423 void IRAM_ATTR timer_group_intr_clr_in_isr(timer_group_t group_num, timer_idx_t timer_num)
424 {
425 timer_group_clr_intr_status_in_isr(group_num, timer_num);
426 }
427
timer_group_clr_intr_status_in_isr(timer_group_t group_num,timer_idx_t timer_num)428 void IRAM_ATTR timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer_idx_t timer_num)
429 {
430 timer_hal_clear_intr_status(&(p_timer_obj[group_num][timer_num]->hal));
431 }
432
timer_group_enable_alarm_in_isr(timer_group_t group_num,timer_idx_t timer_num)433 void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num)
434 {
435 timer_hal_set_alarm_enable(&(p_timer_obj[group_num][timer_num]->hal), true);
436 }
437
timer_group_get_counter_value_in_isr(timer_group_t group_num,timer_idx_t timer_num)438 uint64_t IRAM_ATTR timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num)
439 {
440 uint64_t val;
441 timer_hal_get_counter_value(&(p_timer_obj[group_num][timer_num]->hal), &val);
442 return val;
443 }
444
timer_group_set_alarm_value_in_isr(timer_group_t group_num,timer_idx_t timer_num,uint64_t alarm_val)445 void IRAM_ATTR timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_val)
446 {
447 timer_hal_set_alarm_value(&(p_timer_obj[group_num][timer_num]->hal), alarm_val);
448 }
449
timer_group_set_counter_enable_in_isr(timer_group_t group_num,timer_idx_t timer_num,timer_start_t counter_en)450 void IRAM_ATTR timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en)
451 {
452 timer_hal_set_counter_enable(&(p_timer_obj[group_num][timer_num]->hal), counter_en);
453 }
454
455 /* This function is deprecated */
timer_group_clr_intr_sta_in_isr(timer_group_t group_num,timer_intr_t intr_mask)456 void IRAM_ATTR timer_group_clr_intr_sta_in_isr(timer_group_t group_num, timer_intr_t intr_mask)
457 {
458 for (uint32_t timer_idx = 0; timer_idx < TIMER_MAX; timer_idx++) {
459 if (intr_mask & BIT(timer_idx)) {
460 timer_group_clr_intr_status_in_isr(group_num, timer_idx);
461 }
462 }
463 }
464
timer_group_get_auto_reload_in_isr(timer_group_t group_num,timer_idx_t timer_num)465 bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num)
466 {
467 return timer_hal_get_auto_reload(&(p_timer_obj[group_num][timer_num]->hal));
468 }
469
timer_spinlock_take(timer_group_t group_num)470 esp_err_t IRAM_ATTR timer_spinlock_take(timer_group_t group_num)
471 {
472 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
473 TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
474 return ESP_OK;
475 }
476
timer_spinlock_give(timer_group_t group_num)477 esp_err_t IRAM_ATTR timer_spinlock_give(timer_group_t group_num)
478 {
479 ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
480 TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
481 return ESP_OK;
482 }
483