1 /*
2 * SPDX-License-Identifier: Apache-2.0
3 * Copyright (c) 2019 Intel Corp.
4 */
5
6 #include <zephyr.h>
7 #include <device.h>
8 #include <drivers/counter.h>
9
10 #define NR_SAMPLES 10 /* sample timer 10 times */
11
sync(const struct device * cmos)12 static uint32_t sync(const struct device *cmos)
13 {
14 uint32_t this, last;
15 int err;
16
17 err = counter_get_value(cmos, &this);
18 if (err) {
19 printk("\tCan't read CMOS clock device.\n");
20 return 0;
21 }
22
23 do {
24 last = this;
25 err = counter_get_value(cmos, &this);
26 if (err) {
27 printk("\tCan't read CMOS clock device.\n");
28 return 0;
29 }
30 } while (last == this);
31
32 return sys_clock_cycle_get_32();
33 }
34
timer(void)35 void timer(void)
36 {
37 const struct device *cmos;
38
39 #if defined(CONFIG_APIC_TIMER)
40 printk("TIMER: new local APIC");
41 #elif defined(CONFIG_HPET_TIMER)
42 printk("TIMER: HPET");
43 #else
44 printk("TIMER: unknown");
45 #endif
46
47 printk(", configured frequency = %dHz\n",
48 sys_clock_hw_cycles_per_sec());
49
50 cmos = device_get_binding("CMOS");
51 if (cmos == NULL) {
52 printk("\tCan't get reference CMOS clock device.\n");
53 } else {
54 uint64_t sum = 0;
55
56 printk("\tUsing CMOS RTC as reference clock:\n");
57
58 for (int i = 0; i < NR_SAMPLES; ++i) {
59 uint32_t start, end;
60
61 start = sync(cmos);
62 end = sync(cmos);
63 sum += end - start;
64
65 printk("\tstart = %u, end = %u, %u cycles\n",
66 start, end, end - start);
67 }
68
69 printk("\taverage = %uHz\n", (unsigned) (sum / NR_SAMPLES));
70 }
71
72 printk("\n");
73 }
74