1 /*
2  * Copyright (c) 2018-2021, Arm Limited. All rights reserved.
3  * Copyright (c) 2024 Cypress Semiconductor Corporation (an Infineon
4  * company) or an affiliate of Cypress Semiconductor Corporation. All rights
5  * reserved.
6  *
7  * SPDX-License-Identifier: BSD-3-Clause
8  *
9  */
10 #include <inttypes.h>
11 #include "config_spm.h"
12 #include "fih.h"
13 #include "utilities.h"
14 #include "tfm_hal_platform.h"
15 
tfm_core_panic(void)16 void tfm_core_panic(void)
17 {
18     (void)fih_delay();
19 
20 #ifdef CONFIG_TFM_HALT_ON_CORE_PANIC
21 
22     /*
23      * Halt instead of reboot to retain the backtrace that triggered
24      * the fault and thereby make it easier to debug.
25      */
26     tfm_hal_system_halt();
27 
28 #ifdef TFM_FIH_PROFILE_ON
29     (void)fih_delay();
30 
31     tfm_hal_system_halt();
32 #endif
33 
34 #else /* CONFIG_TFM_HALT_ON_CORE_PANIC */
35     /*
36      * FixMe: In the first stage, the SPM will restart the entire system when a
37      * programmer error is detected in either the SPE or NSPE.
38      * In the next stage, the specified error codes are also sent to any NSPE
39      * management firmware. The NSPE management firmware can then decide to pass
40      * those error codes back to the calling task or to use its own
41      * functionality for terminating an execution context.
42      */
43     tfm_hal_system_reset();
44 
45 #ifdef TFM_FIH_PROFILE_ON
46     (void)fih_delay();
47 
48     tfm_hal_system_reset();
49 #endif
50 
51 #endif /* CONFIG_TFM_HALT_ON_CORE_PANIC */
52 }
53