1 /* ---------------------------------------------------------------------- 2 * Project: CMSIS DSP Library 3 * Title: FPGA.cpp 4 * Description: FPGA 5 * 6 * IO implementation for constrained platforms where 7 * inputs are contained in a header files and output is 8 * only stdout. 9 * 10 * $Date: 20. June 2019 11 * $Revision: V1.0.0 12 * 13 * Target Processor: Cortex-M cores 14 * -------------------------------------------------------------------- */ 15 /* 16 * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 17 * 18 * SPDX-License-Identifier: Apache-2.0 19 * 20 * Licensed under the Apache License, Version 2.0 (the License); you may 21 * not use this file except in compliance with the License. 22 * You may obtain a copy of the License at 23 * 24 * www.apache.org/licenses/LICENSE-2.0 25 * 26 * Unless required by applicable law or agreed to in writing, software 27 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 28 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 29 * See the License for the specific language governing permissions and 30 * limitations under the License. 31 */ 32 #include "Test.h" 33 34 #include <string> 35 #include <cstddef> 36 #include "FPGA.h" 37 #include <cstdio> 38 39 #include "Generators.h" 40 #include "arm_math_types.h" 41 #include "arm_math_types_f16.h" 42 43 using namespace std; 44 45 namespace Client 46 { 47 struct offsetOrGen 48 { 49 int kind; 50 unsigned long offset; 51 Testing::param_t *data; 52 Testing::nbSamples_t nbInputSamples; 53 Testing::nbSamples_t nbOutputSamples; 54 int dimensions; 55 }; 56 FPGA(const char * testDesc,const char * patterns)57 FPGA::FPGA(const char *testDesc,const char *patterns) 58 { 59 this->m_testDesc=testDesc; 60 this->m_patterns=patterns; 61 62 this->currentDesc=testDesc; 63 this->path=new std::vector<std::string>(); 64 65 this->patternOffsets=new std::vector<unsigned long>(); 66 this->patternSizes=new std::vector<unsigned long>(); 67 68 this->parameterOffsets=new std::vector<struct offsetOrGen>(); 69 this->parameterSizes=new std::vector<unsigned long>(); 70 71 this->outputNames=new std::vector<std::string>(); 72 73 } 74 DeleteParams()75 void FPGA::DeleteParams() 76 { 77 for (std::vector<struct offsetOrGen>::iterator it = this->parameterOffsets->begin() ; it != this->parameterOffsets->end(); ++it) 78 { 79 if (it->kind==1) 80 { 81 if (it->data) 82 { 83 free(it->data); 84 it->data = NULL; 85 } 86 } 87 } 88 } 89 ~FPGA()90 FPGA::~FPGA() 91 { 92 delete(this->path); 93 94 delete(this->patternOffsets); 95 delete(this->patternSizes); 96 this->DeleteParams(); 97 delete(this->parameterOffsets); 98 delete(this->parameterSizes); 99 100 delete(this->outputNames); 101 } 102 103 104 /** Read word 32 from C array 105 106 */ read32(unsigned long * r)107 void FPGA::read32(unsigned long *r) 108 { 109 unsigned char a,b,c,d; 110 unsigned long v; 111 a = *this->currentDesc++; 112 b = *this->currentDesc++; 113 c = *this->currentDesc++; 114 d = *this->currentDesc++; 115 //printf("%d %d %d %d\n",a,b,c,d); 116 117 v = a | (b << 8) | (c << 16) | (d << 24); 118 *r = v; 119 } 120 121 /** Read null terminated C string C array 122 123 */ readStr(char * str)124 void FPGA::readStr(char *str) 125 { 126 char *p = str; 127 while(*this->currentDesc != 0) 128 { 129 *p++ = *this->currentDesc++; 130 } 131 *p++ = 0; 132 this->currentDesc++; 133 } 134 readChar(char * c)135 void FPGA::readChar(char *c) 136 { 137 *c = *this->currentDesc; 138 this->currentDesc++; 139 } 140 141 /** Get output path from output ID 142 143 */ getOutputPath(Testing::outputID_t id)144 std::string FPGA::getOutputPath(Testing::outputID_t id) 145 { 146 char fmt[256]; 147 148 std::string tmp; 149 tmp += this->testDir; 150 sprintf(fmt,"/%s_%ld.txt",(*this->outputNames)[id].c_str(),this->currentId); 151 tmp += std::string(fmt); 152 //printf("%s\n",tmp.c_str()); 153 154 return(tmp); 155 } 156 157 /** Read the number of parameters for all the tests in a suite 158 159 Used for benchmarking. Same functions executed with 160 different initializations controlled by the parameters. 161 162 */ ReadNbParameters()163 Testing::nbParameters_t FPGA::ReadNbParameters() 164 { 165 unsigned long nb; 166 this->read32(&nb); 167 168 return(nb); 169 } 170 ReadTestIdentification()171 void FPGA::ReadTestIdentification() 172 { 173 char tmp[255]; 174 unsigned long kind; 175 unsigned long theId; 176 char hasPath; 177 char hasParamID; 178 Testing::PatternID_t paramID; 179 //printf("Read ident\n"); 180 181 this->read32(&kind); 182 this->read32(&theId); 183 184 this->readChar(&hasParamID); 185 this->m_hasParam=false; 186 if (hasParamID == 'y') 187 { 188 this->m_hasParam=true; 189 this->read32(¶mID); 190 this->currentParam=paramID; 191 } 192 193 this->readChar(&hasPath); 194 if (hasPath == 'y') 195 { 196 this->readStr(tmp); 197 //printf("-->%s\n",tmp); 198 currentPath.assign(tmp); 199 } 200 201 this->currentKind=kind; 202 this->currentId=theId; 203 switch(kind) 204 { 205 case 1: 206 printf("S: t %s\n",""); 207 break; 208 case 2: 209 printf("S: s %ld\n",this->currentId); 210 break; 211 case 3: 212 printf("S: g %ld\n",this->currentId); 213 break; 214 default: 215 printf("S: u%s\n",""); 216 } 217 218 219 //printf("End read ident\n\n"); 220 } 221 recomputeTestDir()222 void FPGA::recomputeTestDir() 223 { 224 this->testDir = "."; 225 int start = 1; 226 std::vector<std::string>::const_iterator iter; 227 for (iter = this->path->begin(); iter != this->path->end(); ++iter) 228 { 229 if (start) 230 { 231 this->testDir = *iter; 232 start =0; 233 } 234 else 235 { 236 if (!(*iter).empty()) 237 { 238 this->testDir += "/" + *iter; 239 } 240 } 241 } 242 } 243 ReadIdentification()244 void FPGA::ReadIdentification() 245 { 246 this->ReadTestIdentification(); 247 this->path->push_back(currentPath); 248 this->recomputeTestDir(); 249 } 250 251 /** There is only stdout available for "FPGA". 252 So status output and data output are interleaved. 253 254 Status is starting with "S: " 255 256 */ DispStatus(Testing::TestStatus status,Testing::errorID_t error,unsigned long lineNb,Testing::cycles_t cycles)257 void FPGA::DispStatus(Testing::TestStatus status 258 ,Testing::errorID_t error 259 ,unsigned long lineNb 260 ,Testing::cycles_t cycles) 261 { 262 if (status == Testing::kTestFailed) 263 { 264 printf("S: %ld %ld %ld 0 N\n",this->currentId,error,lineNb); 265 } 266 else 267 { 268 #ifdef EXTBENCH 269 printf("S: %ld 0 0 t Y\n",this->currentId); 270 #else 271 printf("S: %ld 0 0 %u Y\n",this->currentId, cycles); 272 #endif 273 } 274 } 275 DispErrorDetails(const char * details)276 void FPGA::DispErrorDetails(const char* details) 277 { 278 printf("E: %s\n",details); 279 } 280 EndGroup()281 void FPGA::EndGroup() 282 { 283 printf("S: p%s\n",""); 284 this->path->pop_back(); 285 } 286 287 288 /** Read pattern list 289 290 Different from semihosting. 291 We read offset and sizes for the patterns 292 rather than file names. 293 294 */ ReadPatternList()295 void FPGA::ReadPatternList() 296 { 297 298 unsigned long offset,nb; 299 unsigned long nbPatterns; 300 this->read32(&nbPatterns); 301 this->patternOffsets->clear(); 302 this->patternSizes->clear(); 303 std::string tmpstr; 304 305 for(unsigned long i=0;i<nbPatterns;i++) 306 { 307 this->read32(&offset); 308 this->read32(&nb); 309 this->patternOffsets->push_back(offset); 310 this->patternSizes->push_back(nb); 311 } 312 313 } 314 315 /** Read parameters list 316 317 Different from semihosting. 318 We read offset and sizes for the parameters 319 rather than file names. 320 321 */ ReadParameterList(Testing::nbParameters_t nbParams)322 void FPGA::ReadParameterList(Testing::nbParameters_t nbParams) 323 { 324 325 unsigned long offset,nb; 326 unsigned long nbValues; 327 char paramKind; 328 329 this->read32(&nbValues); 330 331 this->DeleteParams(); 332 this->parameterOffsets->clear(); 333 this->parameterSizes->clear(); 334 std::string tmpstr; 335 336 for(unsigned long i=0;i<nbValues;i++) 337 { 338 this->readChar(¶mKind); 339 struct offsetOrGen gen; 340 if (paramKind == 'p') 341 { 342 gen.kind=0; 343 this->read32(&offset); 344 this->read32(&nb); 345 gen.offset=offset; 346 347 gen.kind=0; 348 gen.nbInputSamples=nb; 349 gen.dimensions = nbParams; 350 } 351 else 352 { 353 unsigned long kind,nbInputSamples,nbOutputSamples,dimensions,sample; 354 Testing::param_t *p,*current; 355 356 // Generator kind 357 this->read32(&kind); 358 359 this->read32(&nbInputSamples); 360 this->read32(&nbOutputSamples); 361 this->read32(&dimensions); 362 363 p=(Testing::param_t*)malloc(sizeof(Testing::param_t)*(nbInputSamples)); 364 current=p; 365 for(unsigned long i=0;i < nbInputSamples; i ++) 366 { 367 368 this->read32(&sample); 369 *current++ = (Testing::param_t)sample; 370 } 371 372 373 gen.kind=1; 374 gen.data=p; 375 gen.nbInputSamples = nbInputSamples; 376 gen.nbOutputSamples = nbOutputSamples; 377 gen.dimensions = dimensions; 378 379 } 380 this->parameterOffsets->push_back(gen); 381 this->parameterSizes->push_back(nb); 382 } 383 384 } 385 ReadOutputList()386 void FPGA::ReadOutputList() 387 { 388 char tmp[256]; 389 unsigned long nbOutputs; 390 this->read32(&nbOutputs); 391 this->outputNames->clear(); 392 std::string tmpstr; 393 394 for(unsigned long i=0;i<nbOutputs;i++) 395 { 396 this->readStr(tmp); 397 tmpstr.assign(tmp); 398 this->outputNames->push_back(tmpstr); 399 } 400 } 401 getPatternOffset(Testing::PatternID_t id)402 unsigned long FPGA::getPatternOffset(Testing::PatternID_t id) 403 { 404 return((*this->patternOffsets)[id]); 405 } 406 GetPatternSize(Testing::PatternID_t id)407 Testing::nbSamples_t FPGA::GetPatternSize(Testing::PatternID_t id) 408 { 409 return((Testing::nbSamples_t)((*this->patternSizes)[id])); 410 } 411 getParameterOffset(Testing::PatternID_t id)412 unsigned long FPGA::getParameterOffset(Testing::PatternID_t id) 413 { 414 return((*this->parameterOffsets)[id].offset); 415 } 416 getParameterDesc(Testing::PatternID_t id)417 struct offsetOrGen FPGA::getParameterDesc(Testing::PatternID_t id) 418 { 419 420 return((*this->parameterOffsets)[id]); 421 422 } 423 424 DumpParams(std::vector<Testing::param_t> & params)425 void FPGA::DumpParams(std::vector<Testing::param_t>& params) 426 { 427 bool begin=true; 428 printf("b "); 429 for(std::vector<Testing::param_t>::iterator it = params.begin(); it != params.end(); ++it) 430 { 431 if (!begin) 432 { 433 printf(","); 434 } 435 printf("%d",*it); 436 begin=false; 437 } 438 printf("\n"); 439 } 440 ImportParams(Testing::PatternID_t id,Testing::nbParameterEntries_t & nbEntries,Testing::ParameterKind & paramKind)441 Testing::param_t* FPGA::ImportParams(Testing::PatternID_t id,Testing::nbParameterEntries_t &nbEntries,Testing::ParameterKind ¶mKind) 442 { 443 nbEntries=0; 444 unsigned long offset; 445 446 447 Testing::nbSamples_t len; 448 struct offsetOrGen gen = this->getParameterDesc(id); 449 450 if (gen.kind == 0) 451 { 452 offset=gen.offset; 453 paramKind=Testing::kStaticBuffer; 454 455 nbEntries = gen.nbInputSamples / gen.dimensions; 456 457 const char *patternStart = this->m_patterns + offset; 458 459 return((Testing::param_t*)patternStart); 460 } 461 else 462 { 463 Testing::param_t* result; 464 // Output samples is number of parameter line 465 len=gen.nbOutputSamples * gen.dimensions; 466 paramKind=Testing::kDynamicBuffer; 467 468 result=(Testing::param_t*)malloc(len*sizeof(Testing::param_t)); 469 470 switch(gen.dimensions) 471 { 472 case 1: 473 generate1(result,gen.data,nbEntries); 474 break; 475 case 2: 476 generate2(result,gen.data,nbEntries); 477 break; 478 case 3: 479 generate3(result,gen.data,nbEntries); 480 break; 481 case 4: 482 generate4(result,gen.data,nbEntries); 483 break; 484 default: 485 generate1(result,gen.data,nbEntries); 486 break; 487 } 488 489 return(result); 490 } 491 } 492 hasParam()493 bool FPGA::hasParam() 494 { 495 return(this->m_hasParam); 496 } 497 getParamID()498 Testing::PatternID_t FPGA::getParamID() 499 { 500 return(this->currentParam); 501 } 502 503 504 ImportPattern_f64(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)505 void FPGA::ImportPattern_f64(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 506 { 507 unsigned long offset,i; 508 509 offset=this->getPatternOffset(id); 510 511 const char *patternStart = this->m_patterns + offset; 512 const float64_t *src = (const float64_t*)patternStart; 513 float64_t *dst = (float64_t*)p; 514 515 if (dst) 516 { 517 for(i=0; i < nb; i++) 518 { 519 *dst++ = *src++; 520 } 521 } 522 } 523 ImportPattern_f32(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)524 void FPGA::ImportPattern_f32(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 525 { 526 unsigned long offset,i; 527 528 offset=this->getPatternOffset(id); 529 530 const char *patternStart = this->m_patterns + offset; 531 const float32_t *src = (const float32_t*)patternStart; 532 float32_t *dst = (float32_t*)p; 533 534 if (dst) 535 { 536 for(i=0; i < nb; i++) 537 { 538 *dst++ = *src++; 539 } 540 } 541 542 } 543 544 #if !defined( __CC_ARM ) && defined(ARM_FLOAT16_SUPPORTED) ImportPattern_f16(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)545 void FPGA::ImportPattern_f16(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 546 { 547 unsigned long offset,i; 548 549 offset=this->getPatternOffset(id); 550 551 const char *patternStart = this->m_patterns + offset; 552 const float16_t *src = (const float16_t*)patternStart; 553 float16_t *dst = (float16_t*)p; 554 555 if (dst) 556 { 557 for(i=0; i < nb; i++) 558 { 559 *dst++ = *src++; 560 } 561 } 562 563 } 564 #endif 565 ImportPattern_q63(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)566 void FPGA::ImportPattern_q63(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 567 { 568 unsigned long offset,i; 569 570 offset=this->getPatternOffset(id); 571 572 const char *patternStart = this->m_patterns + offset; 573 const q63_t *src = (const q63_t*)patternStart; 574 q63_t *dst = (q63_t*)p; 575 576 if (dst) 577 { 578 for(i=0; i < nb; i++) 579 { 580 *dst++ = *src++; 581 } 582 } 583 } 584 ImportPattern_q31(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)585 void FPGA::ImportPattern_q31(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 586 { 587 unsigned long offset,i; 588 589 offset=this->getPatternOffset(id); 590 591 const char *patternStart = this->m_patterns + offset; 592 const q31_t *src = (const q31_t*)patternStart; 593 q31_t *dst = (q31_t*)p; 594 595 if (dst) 596 { 597 for(i=0; i < nb; i++) 598 { 599 *dst++ = *src++; 600 } 601 } 602 } 603 ImportPattern_q15(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)604 void FPGA::ImportPattern_q15(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 605 { 606 unsigned long offset,i; 607 608 offset=this->getPatternOffset(id); 609 610 const char *patternStart = this->m_patterns + offset; 611 const q15_t *src = (const q15_t*)patternStart; 612 q15_t *dst = (q15_t*)p; 613 614 if (dst) 615 { 616 for(i=0; i < nb; i++) 617 { 618 *dst++ = *src++; 619 } 620 } 621 } 622 ImportPattern_q7(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)623 void FPGA::ImportPattern_q7(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 624 { 625 unsigned long offset,i; 626 627 offset=this->getPatternOffset(id); 628 629 const char *patternStart = this->m_patterns + offset; 630 const q7_t *src = (const q7_t*)patternStart; 631 q7_t *dst = (q7_t*)p; 632 633 if (dst) 634 { 635 for(i=0; i < nb; i++) 636 { 637 *dst++ = *src++; 638 } 639 } 640 } 641 ImportPattern_u64(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)642 void FPGA::ImportPattern_u64(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 643 { 644 unsigned long offset,i; 645 646 offset=this->getPatternOffset(id); 647 648 const char *patternStart = this->m_patterns + offset; 649 const uint64_t *src = (const uint64_t*)patternStart; 650 uint64_t *dst = (uint64_t*)p; 651 652 if (dst) 653 { 654 for(i=0; i < nb; i++) 655 { 656 *dst++ = *src++; 657 } 658 } 659 } 660 661 ImportPattern_u32(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)662 void FPGA::ImportPattern_u32(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 663 { 664 unsigned long offset,i; 665 666 offset=this->getPatternOffset(id); 667 668 const char *patternStart = this->m_patterns + offset; 669 const uint32_t *src = (const uint32_t*)patternStart; 670 uint32_t *dst = (uint32_t*)p; 671 672 if (dst) 673 { 674 for(i=0; i < nb; i++) 675 { 676 *dst++ = *src++; 677 } 678 } 679 } 680 ImportPattern_u16(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)681 void FPGA::ImportPattern_u16(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 682 { 683 unsigned long offset,i; 684 685 offset=this->getPatternOffset(id); 686 687 const char *patternStart = this->m_patterns + offset; 688 const uint16_t *src = (const uint16_t*)patternStart; 689 uint16_t *dst = (uint16_t*)p; 690 691 if (dst) 692 { 693 for(i=0; i < nb; i++) 694 { 695 *dst++ = *src++; 696 } 697 } 698 } 699 ImportPattern_u8(Testing::PatternID_t id,char * p,Testing::nbSamples_t nb)700 void FPGA::ImportPattern_u8(Testing::PatternID_t id,char* p,Testing::nbSamples_t nb) 701 { 702 unsigned long offset,i; 703 704 offset=this->getPatternOffset(id); 705 706 const char *patternStart = this->m_patterns + offset; 707 const uint8_t *src = (const uint8_t*)patternStart; 708 uint8_t *dst = (uint8_t*)p; 709 710 if (dst) 711 { 712 for(i=0; i < nb; i++) 713 { 714 *dst++ = *src++; 715 } 716 } 717 } 718 719 /** Dump patterns. 720 721 There is only stdout available for "FPGA". 722 So status output and data output are interleaved. 723 724 Data is starting with "D: " 725 726 */ DumpPattern_f64(Testing::outputID_t id,Testing::nbSamples_t nb,float64_t * data)727 void FPGA::DumpPattern_f64(Testing::outputID_t id,Testing::nbSamples_t nb, float64_t* data) 728 { 729 std::string fileName = this->getOutputPath(id); 730 if (data) 731 { 732 printf("D: %s\n",fileName.c_str()); 733 Testing::nbSamples_t i=0; 734 uint64_t t; 735 float64_t v; 736 for(i=0; i < nb; i++) 737 { 738 v = data[i]; 739 t = TOINT64(v); 740 #if __sizeof_long == 8 741 printf("D: 0x%016lx\n",t); 742 #else 743 printf("D: 0x%016llx\n",t); 744 #endif 745 } 746 printf("D: END\n"); 747 } 748 749 } DumpPattern_f32(Testing::outputID_t id,Testing::nbSamples_t nb,float32_t * data)750 void FPGA::DumpPattern_f32(Testing::outputID_t id,Testing::nbSamples_t nb, float32_t* data) 751 { 752 std::string fileName = this->getOutputPath(id); 753 if (data) 754 { 755 printf("D: %s\n",fileName.c_str()); 756 Testing::nbSamples_t i=0; 757 uint32_t t; 758 float32_t v; 759 for(i=0; i < nb; i++) 760 { 761 v = data[i]; 762 t = TOINT32(v); 763 printf("D: 0x%08x\n",t); 764 } 765 printf("D: END\n"); 766 } 767 } 768 769 #if !defined( __CC_ARM ) && defined(ARM_FLOAT16_SUPPORTED) DumpPattern_f16(Testing::outputID_t id,Testing::nbSamples_t nb,float16_t * data)770 void FPGA::DumpPattern_f16(Testing::outputID_t id,Testing::nbSamples_t nb, float16_t* data) 771 { 772 std::string fileName = this->getOutputPath(id); 773 if (data) 774 { 775 printf("D: %s\n",fileName.c_str()); 776 Testing::nbSamples_t i=0; 777 uint16_t t; 778 float16_t v; 779 for(i=0; i < nb; i++) 780 { 781 v = data[i]; 782 t = TOINT16(v); 783 printf("D: 0x0000%04x\n",t); 784 } 785 printf("D: END\n"); 786 } 787 } 788 #endif 789 DumpPattern_q63(Testing::outputID_t id,Testing::nbSamples_t nb,q63_t * data)790 void FPGA::DumpPattern_q63(Testing::outputID_t id,Testing::nbSamples_t nb, q63_t* data) 791 { 792 std::string fileName = this->getOutputPath(id); 793 if (data) 794 { 795 printf("D: %s\n",fileName.c_str()); 796 Testing::nbSamples_t i=0; 797 uint64_t t; 798 q63_t v; 799 for(i=0; i < nb; i++) 800 { 801 v = data[i]; 802 t = (uint64_t)v; 803 #if __sizeof_long == 8 804 printf("D: 0x%016lx\n",t); 805 #else 806 printf("D: 0x%016llx\n",t); 807 #endif 808 } 809 printf("D: END\n"); 810 } 811 } 812 DumpPattern_q31(Testing::outputID_t id,Testing::nbSamples_t nb,q31_t * data)813 void FPGA::DumpPattern_q31(Testing::outputID_t id,Testing::nbSamples_t nb, q31_t* data) 814 { 815 std::string fileName = this->getOutputPath(id); 816 if (data) 817 { 818 printf("D: %s\n",fileName.c_str()); 819 Testing::nbSamples_t i=0; 820 uint32_t t; 821 q31_t v; 822 for(i=0; i < nb; i++) 823 { 824 v = data[i]; 825 t = (uint32_t)v; 826 printf("D: 0x%08x\n",t); 827 } 828 printf("D: END\n"); 829 } 830 } 831 DumpPattern_q15(Testing::outputID_t id,Testing::nbSamples_t nb,q15_t * data)832 void FPGA::DumpPattern_q15(Testing::outputID_t id,Testing::nbSamples_t nb, q15_t* data) 833 { 834 std::string fileName = this->getOutputPath(id); 835 if (data) 836 { 837 printf("D: %s\n",fileName.c_str()); 838 Testing::nbSamples_t i=0; 839 uint32_t t; 840 q15_t v; 841 for(i=0; i < nb; i++) 842 { 843 v = data[i]; 844 t = (uint32_t)v; 845 printf("D: 0x%08x\n",t); 846 } 847 printf("D: END\n"); 848 } 849 } 850 DumpPattern_q7(Testing::outputID_t id,Testing::nbSamples_t nb,q7_t * data)851 void FPGA::DumpPattern_q7(Testing::outputID_t id,Testing::nbSamples_t nb, q7_t* data) 852 { 853 std::string fileName = this->getOutputPath(id); 854 if (data) 855 { 856 printf("D: %s\n",fileName.c_str()); 857 Testing::nbSamples_t i=0; 858 uint32_t t; 859 q7_t v; 860 for(i=0; i < nb; i++) 861 { 862 v = data[i]; 863 t = (uint32_t)v; 864 printf("D: 0x%08x\n",t); 865 } 866 printf("D: END\n"); 867 } 868 } 869 DumpPattern_u64(Testing::outputID_t id,Testing::nbSamples_t nb,uint64_t * data)870 void FPGA::DumpPattern_u64(Testing::outputID_t id,Testing::nbSamples_t nb, uint64_t* data) 871 { 872 std::string fileName = this->getOutputPath(id); 873 if (data) 874 { 875 printf("D: %s\n",fileName.c_str()); 876 Testing::nbSamples_t i=0; 877 uint64_t t; 878 uint64_t v; 879 for(i=0; i < nb; i++) 880 { 881 v = data[i]; 882 t = (uint64_t)v; 883 #if __sizeof_long == 8 884 printf("D: 0x%016lx\n",t); 885 #else 886 printf("D: 0x%016llx\n",t); 887 #endif 888 } 889 printf("D: END\n"); 890 } 891 } 892 893 DumpPattern_u32(Testing::outputID_t id,Testing::nbSamples_t nb,uint32_t * data)894 void FPGA::DumpPattern_u32(Testing::outputID_t id,Testing::nbSamples_t nb, uint32_t* data) 895 { 896 std::string fileName = this->getOutputPath(id); 897 if (data) 898 { 899 printf("D: %s\n",fileName.c_str()); 900 Testing::nbSamples_t i=0; 901 uint32_t t; 902 uint32_t v; 903 for(i=0; i < nb; i++) 904 { 905 v = data[i]; 906 t = (uint32_t)v; 907 printf("D: 0x%08x\n",t); 908 } 909 printf("D: END\n"); 910 } 911 } 912 DumpPattern_u16(Testing::outputID_t id,Testing::nbSamples_t nb,uint16_t * data)913 void FPGA::DumpPattern_u16(Testing::outputID_t id,Testing::nbSamples_t nb, uint16_t* data) 914 { 915 std::string fileName = this->getOutputPath(id); 916 if (data) 917 { 918 printf("D: %s\n",fileName.c_str()); 919 Testing::nbSamples_t i=0; 920 uint32_t t; 921 uint16_t v; 922 for(i=0; i < nb; i++) 923 { 924 v = data[i]; 925 t = (uint32_t)v; 926 printf("D: 0x%08x\n",t); 927 } 928 printf("D: END\n"); 929 } 930 } 931 DumpPattern_u8(Testing::outputID_t id,Testing::nbSamples_t nb,uint8_t * data)932 void FPGA::DumpPattern_u8(Testing::outputID_t id,Testing::nbSamples_t nb, uint8_t* data) 933 { 934 std::string fileName = this->getOutputPath(id); 935 if (data) 936 { 937 printf("D: %s\n",fileName.c_str()); 938 Testing::nbSamples_t i=0; 939 uint32_t t; 940 uint8_t v; 941 for(i=0; i < nb; i++) 942 { 943 v = data[i]; 944 t = (uint32_t)v; 945 printf("D: 0x%08x\n",t); 946 } 947 printf("D: END\n"); 948 } 949 } 950 CurrentTestID()951 Testing::testID_t FPGA::CurrentTestID() 952 { 953 return(this->currentId); 954 } 955 956 } 957 958