1/*
2 * Copyright (c) 2017 Piotr Mienkowski
3 * Copyright (c) 2017 Justin Watson
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8#include <arm/armv7-m.dtsi>
9#include <zephyr/dt-bindings/adc/adc.h>
10#include <zephyr/dt-bindings/i2c/i2c.h>
11#include <zephyr/dt-bindings/gpio/gpio.h>
12#include <zephyr/dt-bindings/pwm/pwm.h>
13#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
14#include <zephyr/dt-bindings/dma/atmel_samx7x_dma.h>
15
16/ {
17	aliases {
18		watchdog0 = &wdt;
19	};
20
21	chosen {
22		zephyr,flash-controller = &eefc;
23		zephyr,entropy = &trng;
24	};
25
26	cpus {
27		#address-cells = <1>;
28		#size-cells = <0>;
29
30		cpu0: cpu@0 {
31			device_type = "cpu";
32			compatible = "arm,cortex-m7";
33			reg = <0>;
34			#address-cells = <1>;
35			#size-cells = <1>;
36
37			mpu: mpu@e000ed90 {
38				compatible = "arm,armv7m-mpu";
39				reg = <0xe000ed90 0x40>;
40			};
41		};
42	};
43
44	sram0: memory@20400000 {
45		compatible = "mmio-sram";
46	};
47
48	soc {
49		ssc: ssc@40004000 {
50			compatible = "atmel,sam-ssc";
51			reg = <0x40004000 0x4000>;
52			interrupts = <22 0>;
53			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
54			status = "disabled";
55		};
56
57		spi0: spi@40008000 {
58			compatible = "atmel,sam-spi";
59			#address-cells = <1>;
60			#size-cells = <0>;
61			reg = <0x40008000 0x4000>;
62			interrupts = <21 0>;
63			clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
64			status = "disabled";
65		};
66
67		tc0: tc@4000c000 {
68			compatible = "atmel,sam-tc";
69			reg = <0x4000c000 0x100>;
70			interrupts = <23 0
71				      24 0
72				      25 0>;
73			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>,
74				 <&pmc PMC_TYPE_PERIPHERAL 24>,
75				 <&pmc PMC_TYPE_PERIPHERAL 25>;
76			status = "disabled";
77
78			qdec {
79				compatible = "atmel,sam-tc-qdec";
80				status = "disabled";
81			};
82		};
83
84		tc1: tc@40010000 {
85			compatible = "atmel,sam-tc";
86			reg = <0x40010000 0x100>;
87			interrupts = <26 0
88				      27 0
89				      28 0>;
90			clocks = <&pmc PMC_TYPE_PERIPHERAL 26>,
91				 <&pmc PMC_TYPE_PERIPHERAL 27>,
92				 <&pmc PMC_TYPE_PERIPHERAL 28>;
93			status = "disabled";
94
95			qdec {
96				compatible = "atmel,sam-tc-qdec";
97				status = "disabled";
98			};
99		};
100
101		tc2: tc@40014000 {
102			compatible = "atmel,sam-tc";
103			reg = <0x40014000 0x100>;
104			interrupts = <47 0
105				      48 0
106				      49 0>;
107			clocks = <&pmc PMC_TYPE_PERIPHERAL 47>,
108				 <&pmc PMC_TYPE_PERIPHERAL 48>,
109				 <&pmc PMC_TYPE_PERIPHERAL 49>;
110			status = "disabled";
111
112			qdec {
113				compatible = "atmel,sam-tc-qdec";
114				status = "disabled";
115			};
116		};
117
118		twihs0: i2c@40018000 {
119			compatible = "atmel,sam-i2c-twihs";
120			clock-frequency = <I2C_BITRATE_STANDARD>;
121			#address-cells = <1>;
122			#size-cells = <0>;
123			reg = <0x40018000 0x12B>;
124			interrupts = <19 0>;
125			clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
126			status = "disabled";
127		};
128
129		twihs1: i2c@4001c000 {
130			compatible = "atmel,sam-i2c-twihs";
131			clock-frequency = <I2C_BITRATE_STANDARD>;
132			#address-cells = <1>;
133			#size-cells = <0>;
134			reg = <0x4001c000 0x12B>;
135			interrupts = <20 0>;
136			clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
137			status = "disabled";
138		};
139
140		pwm0: pwm0@40020000 {
141			compatible = "atmel,sam-pwm";
142			reg = <0x40020000 0x4000>;
143			interrupts = <31 0>;
144			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
145			status = "disabled";
146			prescaler = <10>;
147			divider = <1>;
148			#pwm-cells = <3>;
149		};
150
151		usart0: usart@40024000 {
152			compatible = "atmel,sam-usart";
153			reg = <0x40024000 0x100>;
154			interrupts = <13 0>;
155			clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
156			status = "disabled";
157		};
158
159		usart1: usart@40028000 {
160			compatible = "atmel,sam-usart";
161			reg = <0x40028000 0x100>;
162			interrupts = <14 0>;
163			clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
164			status = "disabled";
165		};
166
167		usart2: usart@4002c000 {
168			compatible = "atmel,sam-usart";
169			reg = <0x4002c000 0x100>;
170			interrupts = <15 0>;
171			clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
172			status = "disabled";
173		};
174
175		can0: can@40030000 {
176			compatible = "atmel,sam-can";
177			reg = <0x40030000 0x100>, <0x40088110 0x04>;
178			reg-names = "m_can", "dma_base";
179			interrupts = <35 0>, <36 0>;
180			interrupt-names = "int0", "int1";
181			clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
182			divider = <6>;
183			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
184			status = "disabled";
185		};
186
187		can1: can@40034000 {
188			compatible = "atmel,sam-can";
189			reg = <0x40034000 0x100>, <0x40088114 0x4>;
190			reg-names = "m_can", "dma_base";
191			interrupts = <37 0>, <38 0>;
192			interrupt-names = "int0", "int1";
193			clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
194			divider = <6>;
195			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
196			status = "disabled";
197		};
198
199		usbhs: usbd@40038000 {
200			compatible = "atmel,sam-usbhs";
201			reg = <0x40038000 0x4000>;
202			interrupts = <34 0>;
203			interrupt-names = "usbhs";
204			maximum-speed = "high-speed";
205			num-bidir-endpoints = <10>;
206			clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
207			status = "disabled";
208		};
209
210		afec0: adc@4003c000 {
211			compatible = "atmel,sam-afec";
212			reg = <0x4003c000 0x100>;
213			interrupts = <29 0>;
214			clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
215			status = "disabled";
216			#io-channel-cells = <1>;
217		};
218
219		dacc: dacc@40040000 {
220			compatible = "atmel,sam-dac";
221			reg = <0x40040000 0x100>;
222			interrupts = <30 0>;
223			clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
224			status = "disabled";
225			#io-channel-cells = <1>;
226		};
227
228		gmac: ethernet@40050000 {
229			compatible = "atmel,sam-gmac";
230			reg = <0x40050000 0x4000>;
231			clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
232			interrupts = <39 0>, <66 0>, <67 0>;
233			interrupt-names = "gmac", "q1", "q2";
234			num-queues = <3>;
235			local-mac-address = [00 00 00 00 00 00];
236			status = "disabled";
237		};
238
239		mdio: mdio@40050000 {
240			compatible = "atmel,sam-mdio";
241			reg = <0x40050000 0x4000>;
242			clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
243			status = "disabled";
244			#address-cells = <1>;
245			#size-cells = <0>;
246		};
247
248		tc3: tc@40054000 {
249			compatible = "atmel,sam-tc";
250			reg = <0x40054000 0x100>;
251			interrupts = <50 0
252				      51 0
253				      52 0>;
254			clocks = <&pmc PMC_TYPE_PERIPHERAL 50>,
255				 <&pmc PMC_TYPE_PERIPHERAL 51>,
256				 <&pmc PMC_TYPE_PERIPHERAL 52>;
257			status = "disabled";
258
259			qdec {
260				compatible = "atmel,sam-tc-qdec";
261				status = "disabled";
262			};
263		};
264
265		spi1: spi@40058000 {
266			compatible = "atmel,sam-spi";
267			#address-cells = <1>;
268			#size-cells = <0>;
269			reg = <0x40058000 0x4000>;
270			interrupts = <42 0>;
271			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
272			status = "disabled";
273		};
274
275		pwm1: pwm1@4005c000 {
276			compatible = "atmel,sam-pwm";
277			reg = <0x4005c000 0x4000>;
278			interrupts = <60 0>;
279			clocks = <&pmc PMC_TYPE_PERIPHERAL 60>;
280			status = "disabled";
281			prescaler = <10>;
282			divider = <1>;
283			#pwm-cells = <3>;
284		};
285
286		twihs2: i2c@40060000 {
287			compatible = "atmel,sam-i2c-twihs";
288			clock-frequency = <I2C_BITRATE_STANDARD>;
289			#address-cells = <1>;
290			#size-cells = <0>;
291			reg = <0x40060000 0x12B>;
292			interrupts = <41 0>;
293			clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
294			status = "disabled";
295		};
296
297		afec1: adc@40064000 {
298			compatible = "atmel,sam-afec";
299			reg = <0x40064000 0x100>;
300			interrupts = <40 0>;
301			clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
302			status = "disabled";
303			#io-channel-cells = <1>;
304		};
305
306		trng: random@40070000 {
307			compatible = "atmel,sam-trng";
308			reg = <0x40070000 0x4000>;
309			interrupts = <57 0>;
310			clocks = <&pmc PMC_TYPE_PERIPHERAL 57>;
311			status = "okay";
312		};
313
314		xdmac: dma0: dma-controller@40078000 {
315			compatible = "atmel,sam-xdmac";
316			reg = <0x40078000 0x400>;
317			interrupts = <58 0>;
318			clocks = <&pmc PMC_TYPE_PERIPHERAL 58>;
319			#dma-cells = <2>;
320			status = "disabled";
321		};
322
323		pmc: pmc@400e0600 {
324			compatible = "atmel,sam-pmc";
325			reg = <0x400e0600 0x200>;
326			interrupts = <5 0>;
327			#clock-cells = <2>;
328			status = "okay";
329		};
330
331		uart0: uart@400e0800 {
332			compatible = "atmel,sam-uart";
333			reg = <0x400e0800 0x100>;
334			interrupts = <7 1>;
335			clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
336			status = "disabled";
337		};
338
339		uart1: uart@400e0a00 {
340			compatible = "atmel,sam-uart";
341			reg = <0x400e0a00 0x100>;
342			interrupts = <8 1>;
343			clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
344			status = "disabled";
345		};
346
347		eefc: flash-controller@400e0c00 {
348			compatible = "atmel,sam-flash-controller";
349			reg = <0x400e0c00 0x200>;
350			interrupts = <6 0>;
351			clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
352
353			#address-cells = <1>;
354			#size-cells = <1>;
355			#erase-block-cells = <2>;
356
357			flash0: flash@400000 {
358				compatible = "atmel,sam-flash", "soc-nv-flash";
359				write-block-size = <16>;
360				erase-block-size = <8192>;
361			};
362		};
363
364		pinctrl: pinctrl@400e0e00 {
365			compatible = "atmel,sam-pinctrl";
366			#address-cells = <1>;
367			#size-cells = <1>;
368			ranges = <0x400e0e00 0x400e0e00 0xa00>;
369
370			pioa: gpio@400e0e00 {
371				compatible = "atmel,sam-gpio";
372				reg = <0x400e0e00 0x190>;
373				interrupts = <10 1>;
374				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
375				gpio-controller;
376				#gpio-cells = <2>;
377				#atmel,pin-cells = <2>;
378			};
379
380			piob: gpio@400e1000 {
381				compatible = "atmel,sam-gpio";
382				reg = <0x400e1000 0x190>;
383				interrupts = <11 1>;
384				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
385				gpio-controller;
386				#gpio-cells = <2>;
387				#atmel,pin-cells = <2>;
388			};
389
390			pioc: gpio@400e1200 {
391				compatible = "atmel,sam-gpio";
392				reg = <0x400e1200 0x190>;
393				interrupts = <12 1>;
394				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
395				gpio-controller;
396				#gpio-cells = <2>;
397				#atmel,pin-cells = <2>;
398			};
399
400			piod: gpio@400e1400 {
401				compatible = "atmel,sam-gpio";
402				reg = <0x400e1400 0x190>;
403				interrupts = <16 1>;
404				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
405				gpio-controller;
406				#gpio-cells = <2>;
407				#atmel,pin-cells = <2>;
408			};
409
410			pioe: gpio@400e1600 {
411				compatible = "atmel,sam-gpio";
412				reg = <0x400e1600 0x190>;
413				interrupts = <17 1>;
414				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
415				gpio-controller;
416				#gpio-cells = <2>;
417				#atmel,pin-cells = <2>;
418			};
419		};
420
421		rstc: rstc@400e1800 {
422			compatible = "atmel,sam-rstc";
423			reg = <0x400e1800 0x10>;
424			clocks = <&pmc PMC_TYPE_PERIPHERAL 1>;
425			user-nrst;
426		};
427
428		supc: supc@400e1810 {
429			compatible = "atmel,sam-supc";
430			reg = <0x400e1810 0x20>;
431			#wakeup-source-id-cells = <1>;
432			status = "okay";
433		};
434
435		wdt: watchog@400e1850 {
436			compatible = "atmel,sam-watchdog";
437			reg = <0x400e1850 0xc>;
438			interrupts = <4 0>;
439			clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
440			status = "disabled";
441		};
442
443		rtc: rtc@400e1860 {
444			compatible = "atmel,sam-rtc";
445			reg = <0x400e1860 0x100>;
446			interrupts = <2 0>;
447			clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
448			alarms-count = <1>;
449			status = "disabled";
450		};
451
452		uart2: uart@400e1a00 {
453			compatible = "atmel,sam-uart";
454			reg = <0x400e1a00 0x100>;
455			interrupts = <44 1>;
456			clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
457			status = "disabled";
458		};
459
460		uart3: uart@400e1c00 {
461			compatible = "atmel,sam-uart";
462			reg = <0x400e1c00 0x100>;
463			interrupts = <45 1>;
464			clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
465			status = "disabled";
466		};
467
468		uart4: uart@400e1e00 {
469			compatible = "atmel,sam-uart";
470			reg = <0x400e1e00 0x100>;
471			interrupts = <46 1>;
472			clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
473			status = "disabled";
474		};
475	};
476};
477
478&nvic {
479	arm,num-irq-priority-bits = <3>;
480};
481