1 // Copyright 2020 Espressif Systems (Shanghai) PTE LTD 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 #pragma once 16 17 #include "soc/soc_caps.h" 18 #include "hal/gpio_types.h" 19 #include "hal/rtc_cntl_ll.h" 20 #if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 21 #include "hal/rtc_io_ll.h" 22 #endif 23 24 typedef struct rtc_cntl_sleep_retent { 25 #if SOC_PM_SUPPORT_CPU_PD 26 void *cpu_pd_mem; /* Internal ram address for cpu retention */ 27 #endif // SOC_PM_SUPPORT_CPU_PD 28 #if SOC_PM_SUPPORT_TAGMEM_PD 29 struct { 30 void *link_addr; /* Internal ram address for tagmem retention */ 31 struct { 32 uint32_t start_point: 8, /* the row of start for i-cache tag memory */ 33 vld_size: 8, /* valid size of i-cache tag memory, unit: 4 i-cache tagmem blocks */ 34 size: 8, /* i-cache tag memory size, unit: 4 i-cache tagmem blocks */ 35 enable: 1; /* enable or disable i-cache tagmem retention */ 36 } icache; 37 struct { 38 uint32_t start_point: 9, /* the row of start for d-cache tag memory */ 39 vld_size: 9, /* valid size of d-cache tag memory, unit: 4 d-cache tagmem blocks */ 40 size: 9, /* d-cache tag memory size, unit: 4 d-cache tagmem blocks */ 41 enable: 1; /* enable or disable d-cache tagmem retention */ 42 } dcache; 43 } tagmem; 44 #endif // SOC_PM_SUPPORT_TAGMEM_PD 45 } rtc_cntl_sleep_retent_t; 46 47 #define RTC_HAL_DMA_LINK_NODE_SIZE (16) 48 49 #if SOC_PM_SUPPORT_EXT_WAKEUP 50 51 #define rtc_hal_ext1_get_wakeup_pins() rtc_cntl_ll_ext1_get_wakeup_pins() 52 53 #define rtc_hal_ext1_set_wakeup_pins(mask, mode) rtc_cntl_ll_ext1_set_wakeup_pins(mask, mode) 54 55 #define rtc_hal_ext1_clear_wakeup_pins() rtc_cntl_ll_ext1_clear_wakeup_pins() 56 57 #endif 58 59 #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP 60 61 #define rtc_hal_gpio_get_wakeup_pins() rtc_cntl_ll_gpio_get_wakeup_pins() 62 63 #define rtc_hal_gpio_clear_wakeup_pins() rtc_cntl_ll_gpio_clear_wakeup_pins() 64 65 #define rtc_hal_gpio_set_wakeup_pins() rtc_cntl_ll_gpio_set_wakeup_pins() 66 67 #endif 68 69 #define rtc_hal_set_wakeup_timer(ticks) rtc_cntl_ll_set_wakeup_timer(ticks) 70 71 void * rtc_cntl_hal_dma_link_init(void *elem, void *buff, int size, void *next); 72 73 #if SOC_PM_SUPPORT_CPU_PD 74 75 void rtc_cntl_hal_enable_cpu_retention(void *addr); 76 77 void rtc_cntl_hal_disable_cpu_retention(void *addr); 78 79 #endif 80 81 #if SOC_PM_SUPPORT_TAGMEM_PD 82 83 void rtc_cntl_hal_enable_tagmem_retention(void *addr); 84 85 void rtc_cntl_hal_disable_tagmem_retention(void *addr); 86 87 #endif 88 89 /* 90 * Enable wakeup from ULP coprocessor. 91 */ 92 #define rtc_hal_ulp_wakeup_enable() rtc_cntl_ll_ulp_wakeup_enable() 93
