1 /* 2 * Copyright (c) 2023 Intel Corporation 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #include <zephyr/toolchain.h> 8 #include <zephyr/arch/xtensa/arch.h> 9 #include <zephyr/arch/xtensa/cache.h> 10 #include <zephyr/kernel/mm.h> 11 #include <zephyr/cache.h> 12 sys_mm_is_phys_addr_in_range(uintptr_t phys)13__weak bool sys_mm_is_phys_addr_in_range(uintptr_t phys) 14 { 15 bool valid; 16 uintptr_t cached = (uintptr_t)sys_cache_cached_ptr_get((void *)phys); 17 18 valid = ((phys >= CONFIG_SRAM_BASE_ADDRESS) && 19 (phys < (CONFIG_SRAM_BASE_ADDRESS + (CONFIG_SRAM_SIZE * 1024UL)))); 20 21 valid |= ((cached >= CONFIG_SRAM_BASE_ADDRESS) && 22 (cached < (CONFIG_SRAM_BASE_ADDRESS + (CONFIG_SRAM_SIZE * 1024UL)))); 23 24 return valid; 25 } 26 sys_mm_is_virt_addr_in_range(void * virt)27__weak bool sys_mm_is_virt_addr_in_range(void *virt) 28 { 29 bool valid; 30 uintptr_t addr = (uintptr_t)virt; 31 32 uintptr_t cached = (uintptr_t)sys_cache_cached_ptr_get(virt); 33 34 valid = ((addr >= CONFIG_KERNEL_VM_BASE) && 35 (addr < (CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_SIZE))); 36 37 valid |= ((cached >= CONFIG_KERNEL_VM_BASE) && 38 (cached < (CONFIG_KERNEL_VM_BASE + CONFIG_KERNEL_VM_SIZE))); 39 40 return valid; 41 } 42