1/*
2 * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6#include <mem.h>
7#include <freq.h>
8#include <zephyr/dt-bindings/gpio/gpio.h>
9#include <zephyr/dt-bindings/i2c/i2c.h>
10#include <zephyr/dt-bindings/interrupt-controller/esp-esp32c6-intmux.h>
11#include <zephyr/dt-bindings/clock/esp32c6_clock.h>
12#include <dt-bindings/pinctrl/esp32c6-pinctrl.h>
13
14/ {
15	#address-cells = <1>;
16	#size-cells = <1>;
17
18	chosen {
19		zephyr,entropy = &trng0;
20		zephyr,flash-controller = &flash;
21	};
22
23	cpus {
24		#address-cells = <1>;
25		#size-cells = <0>;
26
27		cpu0: cpu@0 {
28			device_type = "cpu";
29			compatible = "espressif,riscv";
30			riscv,isa = "rv32imac_zicsr";
31			reg = <0>;
32			cpu-power-states = <&light_sleep &deep_sleep>;
33			clock-source = <ESP32_CPU_CLK_SRC_PLL>;
34			clock-frequency = <DT_FREQ_M(160)>;
35			xtal-freq = <DT_FREQ_M(40)>;
36		};
37
38		power-states {
39			light_sleep: light_sleep {
40				compatible = "zephyr,power-state";
41				power-state-name = "standby";
42				min-residency-us = <200>;
43				exit-latency-us = <60>;
44			};
45
46			deep_sleep: deep_sleep {
47				compatible = "zephyr,power-state";
48				power-state-name = "soft-off";
49				min-residency-us = <2000>;
50				exit-latency-us = <212>;
51			};
52		};
53	};
54
55	pinctrl: pin-controller {
56		compatible = "espressif,esp32-pinctrl";
57		status = "okay";
58	};
59
60	wifi: wifi {
61		compatible = "espressif,esp32-wifi";
62		status = "disabled";
63	};
64
65	soc {
66		#address-cells = <1>;
67		#size-cells = <1>;
68		compatible = "simple-bus";
69		ranges;
70
71		sramhp: memory@40800000 {
72			compatible = "zephyr,memory-region", "mmio-sram";
73			reg = <0x40800000 DT_SIZE_K(512)>;
74			zephyr,memory-region = "SRAMHP";
75		};
76
77		sramlp: memory@50000000 {
78			compatible = "zephyr,memory-region", "mmio-sram";
79			reg = <0x50000000 DT_SIZE_K(16)>;
80			zephyr,memory-region = "SRAMLP ";
81		};
82
83		intc: interrupt-controller@60010000 {
84			compatible = "espressif,esp32-intc";
85			#address-cells = <0>;
86			#interrupt-cells = <3>;
87			interrupt-controller;
88			reg = <0x60010000 DT_SIZE_K(4)>;
89			status = "okay";
90		};
91
92		systimer0: systimer@6000a000 {
93			compatible = "espressif,esp32-systimer";
94			reg = <0x6000A000 DT_SIZE_K(4)>;
95			interrupts = <SYSTIMER_TARGET0_EDGE_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
96			interrupt-parent = <&intc>;
97			status = "okay";
98		};
99
100		timer0: counter@60008000 {
101			compatible = "espressif,esp32-timer";
102			reg = <0x60008000 DT_SIZE_K(4)>;
103			clocks = <&rtc ESP32_TIMG0_MODULE>;
104			group = <0>;
105			index = <0>;
106			interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
107			interrupt-parent = <&intc>;
108			status = "disabled";
109		};
110
111		timer1: counter@60009000 {
112			compatible = "espressif,esp32-timer";
113			reg = <0x60009000 DT_SIZE_K(4)>;
114			clocks = <&rtc ESP32_TIMG1_MODULE>;
115			group = <1>;
116			index = <0>;
117			interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
118			interrupt-parent = <&intc>;
119			status = "disabled";
120		};
121
122		rtc: rtc@600b0000 {
123			compatible = "espressif,esp32-rtc";
124			reg = <0x600B0000 DT_SIZE_K(1)>;
125			fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>;
126			slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>;
127			#clock-cells = <1>;
128			status = "okay";
129		};
130
131		rtc_timer: rtc_timer@600b0c00 {
132			compatible = "espressif,esp32-rtc-timer";
133			reg = <0x600B0C00 DT_SIZE_K(1)>;
134			clocks = <&rtc ESP32_MODULE_MAX>;
135			interrupts = <LP_RTC_TIMER_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
136			interrupt-parent = <&intc>;
137			status = "disabled";
138		};
139
140		trng0: trng@600b2808 {
141			compatible = "espressif,esp32-trng";
142			reg = <0x600B2808 0x4>;
143			clocks = <&rtc ESP32_RNG_MODULE>;
144			status = "disabled";
145		};
146
147		spi2: spi@60081000 {
148			compatible = "espressif,esp32-spi";
149			reg = <0x60081000 DT_SIZE_K(4)>;
150			interrupts = <GSPI2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
151			interrupt-parent = <&intc>;
152			clocks = <&rtc ESP32_SPI2_MODULE>;
153			dma-clk = <ESP32_GDMA_MODULE>;
154			dma-host = <0>;
155			status = "disabled";
156		};
157
158		wdt0: watchdog@60008048  {
159			compatible = "espressif,esp32-watchdog";
160			reg = <0x60008048 0x20>;
161			interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
162			interrupt-parent = <&intc>;
163			clocks = <&rtc ESP32_TIMG0_MODULE>;
164			status = "disabled";
165		};
166
167		wdt1: watchdog@60009048 {
168			compatible = "espressif,esp32-watchdog";
169			reg = <0x60009048 0x20>;
170			interrupts = <TG1_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
171			interrupt-parent = <&intc>;
172			clocks = <&rtc ESP32_TIMG1_MODULE>;
173			status = "disabled";
174		};
175
176		flash: flash-controller@60002000 {
177			compatible = "espressif,esp32-flash-controller";
178			reg = <0x60002000 0x1000>;
179
180			#address-cells = <1>;
181			#size-cells = <1>;
182
183			flash0: flash@0 {
184				compatible = "soc-nv-flash";
185				erase-block-size = <4096>;
186				write-block-size = <4>;
187				/* Flash size is specified in SOC/SIP dtsi */
188			};
189		};
190
191		dma: dma@60080000 {
192			compatible = "espressif,esp32-gdma";
193			reg = <0x60080000 DT_SIZE_K(4)>;
194			#dma-cells = <1>;
195			interrupts =
196				<DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
197				<DMA_OUT_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
198				<DMA_IN_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
199				<DMA_OUT_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
200				<DMA_IN_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>,
201				<DMA_OUT_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
202			interrupt-parent = <&intc>;
203			clocks = <&rtc ESP32_GDMA_MODULE>;
204			dma-channels = <6>;
205			dma-buf-addr-alignment = <4>;
206			status = "disabled";
207		};
208
209		gpio0: gpio@60091000 {
210			compatible = "espressif,esp32-gpio";
211			gpio-controller;
212			#gpio-cells = <2>;
213			reg = <0x60091000 DT_SIZE_K(4)>;
214			interrupts = <GPIO_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
215			interrupt-parent = <&intc>;
216			ngpios = <30>;   /* 0..29 */
217		};
218
219		i2c0: i2c@60004000 {
220			compatible = "espressif,esp32-i2c";
221			#address-cells = <1>;
222			#size-cells = <0>;
223			reg = <0x60004000 0x1000>;
224			interrupts = <I2C_EXT0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
225			interrupt-parent = <&intc>;
226			clocks = <&rtc ESP32_I2C0_MODULE>;
227			status = "disabled";
228		};
229
230		uart0: uart@60000000 {
231			compatible = "espressif,esp32-uart";
232			reg = <0x60000000 DT_SIZE_K(4)>;
233			status = "disabled";
234			interrupts = <UART0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
235			interrupt-parent = <&intc>;
236			clocks = <&rtc ESP32_UART0_MODULE>;
237		};
238
239		uart1: uart@60001000 {
240			compatible = "espressif,esp32-uart";
241			reg = <0x60001000 DT_SIZE_K(4)>;
242			status = "disabled";
243			interrupts = <UART1_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
244			interrupt-parent = <&intc>;
245			clocks = <&rtc ESP32_UART1_MODULE>;
246			current-speed = <115200>;
247		};
248
249		usb_serial: uart@6000f000 {
250			compatible = "espressif,esp32-usb-serial";
251			reg = <0x6000F000 0x1000>;
252			status = "disabled";
253			interrupts = <USB_SERIAL_JTAG_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
254			interrupt-parent = <&intc>;
255			clocks = <&rtc ESP32_USB_MODULE>;
256		};
257
258		ledc0: ledc@60007000 {
259			compatible = "espressif,esp32-ledc";
260			pwm-controller;
261			#pwm-cells = <3>;
262			reg = <0x60007000 0x1000>;
263			clocks = <&rtc ESP32_LEDC_MODULE>;
264			status = "disabled";
265		};
266
267		mcpwm0: mcpwm@60014000 {
268			compatible = "espressif,esp32-mcpwm";
269			reg = <0x60014000 DT_SIZE_K(4)>;
270			interrupts = <MCPWM0_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
271			interrupt-parent = <&intc>;
272			clocks = <&rtc ESP32_MCPWM0_MODULE>;
273			#pwm-cells = <3>;
274			status = "disabled";
275		};
276	};
277};
278