1 /*!
2 \file gd32e50x_sqpi.c
3 \brief SQPI driver
4
5 \version 2020-03-10, V1.0.0, firmware for GD32E50x
6 \version 2020-08-26, V1.1.0, firmware for GD32E50x
7 \version 2021-03-23, V1.2.0, firmware for GD32E50x
8 */
9
10 /*
11 Copyright (c) 2021, GigaDevice Semiconductor Inc.
12
13 Redistribution and use in source and binary forms, with or without modification,
14 are permitted provided that the following conditions are met:
15
16 1. Redistributions of source code must retain the above copyright notice, this
17 list of conditions and the following disclaimer.
18 2. Redistributions in binary form must reproduce the above copyright notice,
19 this list of conditions and the following disclaimer in the documentation
20 and/or other materials provided with the distribution.
21 3. Neither the name of the copyright holder nor the names of its contributors
22 may be used to endorse or promote products derived from this software without
23 specific prior written permission.
24
25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
34 OF SUCH DAMAGE.
35 */
36
37 #include "gd32e50x_sqpi.h"
38
39 /*!
40 \brief reset SQPI
41 \param[in] none
42 \param[out] none
43 \retval none
44 */
sqpi_deinit(void)45 void sqpi_deinit(void)
46 {
47 rcu_periph_reset_enable(RCU_SQPIRST);
48 rcu_periph_reset_disable(RCU_SQPIRST);
49 }
50
51 /*!
52 \brief initialize the parameters of SQPI struct with the default values
53 \param[in] sqpi_struct: SQPI parameter stuct
54 \param[out] none
55 \retval none
56 */
sqpi_struct_para_init(sqpi_parameter_struct * sqpi_struct)57 void sqpi_struct_para_init(sqpi_parameter_struct* sqpi_struct)
58 {
59 /* set the SQPI struct with the default values */
60 sqpi_struct->polarity = SQPI_SAMPLE_POLARITY_RISING;
61 sqpi_struct->id_length = SQPI_ID_LENGTH_32_BITS;
62 sqpi_struct->addr_bit = 24U;
63 sqpi_struct->clk_div = 2U;
64 sqpi_struct->cmd_bit = SQPI_CMDBIT_8_BITS;
65 }
66
67 /*!
68 \brief initialize SQPI parameter
69 \param[in] sqpi_struct: SQPI parameter initialization stuct members of the structure
70 and the member values are shown as below:
71 polarity: SQPI_SAMPLE_POLARITY_RISING, SQPI_SAMPLE_POLARITY_FALLING
72 id_length: SQPI_ID_LENGTH_n_BITS (n=8,16,32,64)
73 addr_bit: 0x00 - 0x1F
74 clk_div: 0x01 - 0x3F
75 cmd_bit: SQPI_CMDBIT_n_BITS (n=4,8,16)
76 \param[out] none
77 \retval none
78 */
sqpi_init(sqpi_parameter_struct * sqpi_struct)79 void sqpi_init(sqpi_parameter_struct *sqpi_struct)
80 {
81 __IO uint32_t temp = 0U;
82
83 temp |= ((sqpi_struct->polarity)|sqpi_struct->id_length|sqpi_struct->cmd_bit);
84 temp |= ((sqpi_struct->addr_bit << 24U) | sqpi_struct->clk_div << 18U);
85 SQPI_INIT = temp;
86 }
87
88 /*!
89 \brief send SQPI read ID command
90 \param[in] none
91 \param[out] none
92 \retval none
93 */
sqpi_read_id_command(void)94 void sqpi_read_id_command(void)
95 {
96 while((SQPI_RCMD & SQPI_RCMD_RID) != RESET){
97 }
98
99 SQPI_RCMD |= SQPI_RCMD_RID;
100
101 while((SQPI_RCMD & SQPI_RCMD_RID) != RESET){
102 }
103 }
104
105 /*!
106 \brief send SQPI special command
107 \param[in] none
108 \param[out] none
109 \retval none
110 */
sqpi_special_command(void)111 void sqpi_special_command(void)
112 {
113 while((SQPI_WCMD & SQPI_WCMD_SCMD) != RESET){
114 }
115
116 SQPI_WCMD |= SQPI_WCMD_SCMD;
117
118 while((SQPI_WCMD & SQPI_WCMD_SCMD) != RESET){
119 }
120 }
121
122 /*!
123 \brief configure SQPI read command
124 \param[in] rmode: SQPI_MODE_SSQ, SQPI_MODE_SSS, SQPI_MODE_SQQ, SQPI_MODE_QQQ, SQPI_MODE_SSD, SQPI_MODE_SDD
125 rwaitcycle: 0x00 - 0x1F
126 rcmd: 0x00 - 0xFF
127 \param[out] none
128 \retval none
129 */
sqpi_read_command_config(uint32_t rmode,uint32_t rwaitcycle,uint32_t rcmd)130 void sqpi_read_command_config(uint32_t rmode, uint32_t rwaitcycle, uint32_t rcmd)
131 {
132 __IO uint32_t temp = 0U;
133 temp |= (rcmd | (rwaitcycle << 16U) | rmode);
134 SQPI_RCMD = temp;
135 }
136
137 /*!
138 \brief configure SQPI write command
139 \param[in] wmode: SQPI_MODE_SSQ, SQPI_MODE_SSS, SQPI_MODE_SQQ, SQPI_MODE_QQQ, SQPI_MODE_SSD, SQPI_MODE_SDD
140 wwaitcycle: 0x00 - 0x1F
141 wcmd: 0x00 - 0xFF
142 \param[out] none
143 \retval none
144 */
sqpi_write_command_config(uint32_t wmode,uint32_t wwaitcycle,uint32_t wcmd)145 void sqpi_write_command_config(uint32_t wmode, uint32_t wwaitcycle, uint32_t wcmd)
146 {
147 __IO uint32_t temp = 0U;
148 temp |= (wcmd | (wwaitcycle << 16U) | wmode);
149 SQPI_WCMD = temp;
150 }
151
152 /*!
153 \brief SQPI receive low ID
154 \param[in] none
155 \param[out] none
156 \retval 32-bit low ID
157 */
sqpi_low_id_receive(void)158 uint32_t sqpi_low_id_receive(void)
159 {
160 __IO uint32_t temp = 0U;
161 temp = SQPI_IDL;
162 return temp;
163 }
164
165 /*!
166 \brief SQPI receive high ID
167 \param[in] none
168 \param[out] none
169 \retval 32-bit high ID
170 */
sqpi_high_id_receive(void)171 uint32_t sqpi_high_id_receive(void)
172 {
173 __IO uint32_t temp = 0U;
174 temp = SQPI_IDH;
175 return temp;
176 }
177
