1 /* 2 * Copyright (c) 2019, ARM Limited. All rights reserved. 3 * Copyright (c) 2023, NVIDIA Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef GIC600_MULTICHIP_H 9 #define GIC600_MULTICHIP_H 10 11 #include <stdint.h> 12 13 /* 14 * GIC-600 microarchitecture supports coherent multichip environments containing 15 * up to 16 chips. 16 */ 17 #define GIC600_MAX_MULTICHIP 16 18 19 typedef struct multichip_spi_ids_desc { 20 uintptr_t gicd_base; 21 uint32_t spi_id_min; 22 uint32_t spi_id_max; 23 } multichip_spi_ids_desc_t; 24 25 /******************************************************************************* 26 * GIC-600 multichip data structure describes platform specific attributes 27 * related to GIC-600 multichip. Platform port is expected to define these 28 * attributes to initialize the multichip related registers and create 29 * successful connections between the GIC-600s in a multichip system. 30 * 31 * The 'rt_owner_base' field contains the base address of the GIC Distributor 32 * which owns the routing table. 33 * 34 * The 'rt_owner' field contains the chip number which owns the routing table. 35 * Chip number or chip_id starts from 0. 36 * 37 * The 'chip_count' field contains the total number of chips in a multichip 38 * system. This should match the number of entries in 'chip_addrs' and 'spi_ids' 39 * fields. 40 * 41 * The 'chip_addrs' field contains array of chip addresses. These addresses are 42 * implementation specific values. 43 * 44 * The 'multichip_spi_ids_desc_t' field contains array of descriptors used to 45 * provide minimum and maximum SPI interrupt ids that each chip owns and the 46 * corresponding chip base address. Note that SPI interrupt ids can range from 47 * 32 to 960 and it should be group of 32 (i.e., SPI minimum and (SPI maximum + 48 * 1) should be a multiple of 32). If a chip doesn't own any SPI interrupts a 49 * value of {0, 0, 0} should be passed. 50 ******************************************************************************/ 51 struct gic600_multichip_data { 52 uintptr_t rt_owner_base; 53 unsigned int rt_owner; 54 unsigned int chip_count; 55 uint64_t chip_addrs[GIC600_MAX_MULTICHIP]; 56 multichip_spi_ids_desc_t spi_ids[GIC600_MAX_MULTICHIP]; 57 }; 58 59 uintptr_t gic600_multichip_gicd_base_for_spi(uint32_t spi_id); 60 void gic600_multichip_init(struct gic600_multichip_data *multichip_data); 61 bool gic600_multichip_is_initialized(void); 62 63 #endif /* GIC600_MULTICHIP_H */ 64
