1 /*
2  * Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
3  * Copyright (c) 2018 Foundries.io Ltd
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /**
9  * @file
10  * @brief RISCV public exception handling
11  *
12  * RISCV-specific kernel exception handling interface.
13  */
14 
15 #ifndef ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_
16 #define ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_
17 
18 #ifndef _ASMLANGUAGE
19 #include <zephyr/types.h>
20 #include <toolchain.h>
21 
22 #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
23 #include <soc_context.h>
24 #endif
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
30 /*
31  * The name of the structure which contains soc-specific state, if
32  * any, as well as the soc_esf_t typedef below, are part of the RISC-V
33  * arch API.
34  *
35  * The contents of the struct are provided by a SOC-specific
36  * definition in soc_context.h.
37  */
38 #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
39 struct soc_esf {
40 	SOC_ESF_MEMBERS;
41 };
42 #endif
43 
44 #if !defined(RV_FP_TYPE) && defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
45 #ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION
46 #define RV_FP_TYPE uint64_t
47 #else
48 #define RV_FP_TYPE uint32_t
49 #endif
50 #endif
51 
52 struct __esf {
53 	ulong_t ra;		/* return address */
54 	ulong_t tp;		/* thread pointer */
55 
56 	ulong_t t0;		/* Caller-saved temporary register */
57 	ulong_t t1;		/* Caller-saved temporary register */
58 	ulong_t t2;		/* Caller-saved temporary register */
59 	ulong_t t3;		/* Caller-saved temporary register */
60 	ulong_t t4;		/* Caller-saved temporary register */
61 	ulong_t t5;		/* Caller-saved temporary register */
62 	ulong_t t6;		/* Caller-saved temporary register */
63 
64 	ulong_t a0;		/* function argument/return value */
65 	ulong_t a1;		/* function argument */
66 	ulong_t a2;		/* function argument */
67 	ulong_t a3;		/* function argument */
68 	ulong_t a4;		/* function argument */
69 	ulong_t a5;		/* function argument */
70 	ulong_t a6;		/* function argument */
71 	ulong_t a7;		/* function argument */
72 
73 	ulong_t mepc;		/* machine exception program counter */
74 	ulong_t mstatus;	/* machine status register */
75 
76 #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
77 	ulong_t fp_state;	/* Floating-point saved context state. */
78 	RV_FP_TYPE ft0;		/* Caller-saved temporary floating register */
79 	RV_FP_TYPE ft1;		/* Caller-saved temporary floating register */
80 	RV_FP_TYPE ft2;		/* Caller-saved temporary floating register */
81 	RV_FP_TYPE ft3;		/* Caller-saved temporary floating register */
82 	RV_FP_TYPE ft4;		/* Caller-saved temporary floating register */
83 	RV_FP_TYPE ft5;		/* Caller-saved temporary floating register */
84 	RV_FP_TYPE ft6;		/* Caller-saved temporary floating register */
85 	RV_FP_TYPE ft7;		/* Caller-saved temporary floating register */
86 	RV_FP_TYPE ft8;		/* Caller-saved temporary floating register */
87 	RV_FP_TYPE ft9;		/* Caller-saved temporary floating register */
88 	RV_FP_TYPE ft10;	/* Caller-saved temporary floating register */
89 	RV_FP_TYPE ft11;	/* Caller-saved temporary floating register */
90 	RV_FP_TYPE fa0;		/* function argument/return value */
91 	RV_FP_TYPE fa1;		/* function argument/return value */
92 	RV_FP_TYPE fa2;		/* function argument */
93 	RV_FP_TYPE fa3;		/* function argument */
94 	RV_FP_TYPE fa4;		/* function argument */
95 	RV_FP_TYPE fa5;		/* function argument */
96 	RV_FP_TYPE fa6;		/* function argument */
97 	RV_FP_TYPE fa7;		/* function argument */
98 #endif
99 
100 #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
101 	struct soc_esf soc_context;
102 #endif
103 };
104 
105 typedef struct __esf z_arch_esf_t;
106 #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
107 typedef struct soc_esf soc_esf_t;
108 #endif
109 
110 #ifdef __cplusplus
111 }
112 #endif
113 
114 #endif /* _ASMLANGUAGE */
115 
116 #endif /* ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_ */
117