1 /***************************************************************************/ /**
2 * @file siwx917_soc_ncp_host.c
3 *******************************************************************************
4 * # License
5 * <b>Copyright 2024 Silicon Laboratories Inc. www.silabs.com</b>
6 *******************************************************************************
7 *
8 * SPDX-License-Identifier: Zlib
9 *
10 * The licensor of this software is Silicon Laboratories Inc.
11 *
12 * This software is provided 'as-is', without any express or implied
13 * warranty. In no event will the authors be held liable for any damages
14 * arising from the use of this software.
15 *
16 * Permission is granted to anyone to use this software for any purpose,
17 * including commercial applications, and to alter it and redistribute it
18 * freely, subject to the following restrictions:
19 *
20 * 1. The origin of this software must not be misrepresented; you must not
21 * claim that you wrote the original software. If you use this software
22 * in a product, an acknowledgment in the product documentation would be
23 * appreciated but is not required.
24 * 2. Altered source versions must be plainly marked as such, and must not be
25 * misrepresented as being the original software.
26 * 3. This notice may not be removed or altered from any source distribution.
27 *
28 ******************************************************************************/
29
30 #include "sl_wifi_constants.h"
31 #include "sl_si91x_host_interface.h"
32 #include "sl_board_configuration.h"
33 #include "sl_status.h"
34 #include "sl_constants.h"
35 #include "cmsis_os2.h" // CMSIS RTOS2
36 #include "sl_si91x_types.h"
37 #include <stdbool.h>
38 #include <string.h>
39 #include "rsi_m4.h"
40 #include "sl_common.h"
41 #include "si91x_device.h"
42 #include "core_cm4.h"
43
44 extern int16_t rsi_mem_rd(uint32_t addr, uint16_t len, uint8_t *dBuf);
45 void sl_si91x_ta_events_init(void);
46 sl_status_t sl_si91x_bus_set_interrupt_mask(uint32_t mask);
47 sl_status_t sl_si91x_bus_enable_high_speed(void);
48 sl_status_t sl_si91x_bus_write_memory(uint32_t addr, uint16_t length, const uint8_t *buffer);
49 sl_status_t sl_si91x_bus_read_memory(uint32_t addr, uint16_t length, uint8_t *buffer);
50
sl_si91x_host_enable_high_speed_bus()51 void sl_si91x_host_enable_high_speed_bus()
52 {
53 //! Sets specific control register bits
54 //! Sets the baud rate
55 }
56
sl_si91x_bus_rx_irq_handler(void)57 sl_status_t sl_si91x_bus_rx_irq_handler(void)
58 {
59 return SL_STATUS_OK;
60 }
61
sl_si91x_bus_rx_done_handler(void)62 void sl_si91x_bus_rx_done_handler(void)
63 {
64 return;
65 }
66
sl_si91x_bus_set_interrupt_mask(uint32_t mask)67 sl_status_t sl_si91x_bus_set_interrupt_mask(uint32_t mask)
68 {
69 UNUSED_PARAMETER(mask);
70 return SL_STATUS_OK;
71 }
72
sl_si91x_bus_enable_high_speed(void)73 sl_status_t sl_si91x_bus_enable_high_speed(void)
74 {
75 return SL_STATUS_OK;
76 }
77
sl_si91x_host_set_sleep_indicator(void)78 void sl_si91x_host_set_sleep_indicator(void)
79 {
80 // sets a sleep indicator by activating a specific GPIO pin
81 }
82
sl_si91x_host_get_wake_indicator(void)83 uint32_t sl_si91x_host_get_wake_indicator(void)
84 {
85 return 1;
86 }
87
sl_si91x_host_init(const sl_si91x_host_init_configuration * config)88 sl_status_t sl_si91x_host_init(const sl_si91x_host_init_configuration *config)
89 {
90 UNUSED_PARAMETER(config);
91 // Initialize SI91X NWP events
92 sl_si91x_ta_events_init();
93 return SL_STATUS_OK;
94 }
95
sl_si91x_host_deinit(void)96 sl_status_t sl_si91x_host_deinit(void)
97 {
98 return SL_STATUS_OK;
99 }
100
sl_si91x_host_hold_in_reset(void)101 void sl_si91x_host_hold_in_reset(void)
102 {
103 // initializes and activates a GPIO pin to forcefully reset or disable a connected device.
104 }
105
sl_si91x_host_release_from_reset(void)106 void sl_si91x_host_release_from_reset(void)
107 {
108 // Release the reset state of a connected device
109 }
110
sl_si91x_host_enable_bus_interrupt(void)111 void sl_si91x_host_enable_bus_interrupt(void)
112 {
113 // allowing the system to respond to specific events
114 }
115
sl_si91x_host_disable_bus_interrupt(void)116 void sl_si91x_host_disable_bus_interrupt(void)
117 {
118 // Preventing the system from responding to events
119 }
120
sl_si91x_bus_write_memory(uint32_t addr,uint16_t length,const uint8_t * buffer)121 sl_status_t sl_si91x_bus_write_memory(uint32_t addr, uint16_t length, const uint8_t *buffer)
122 {
123 UNUSED_PARAMETER(length);
124 *(uint32_t *)addr = *(const uint32_t *)buffer;
125 return 0;
126 }
127
sl_si91x_bus_read_memory(uint32_t addr,uint16_t length,uint8_t * buffer)128 sl_status_t sl_si91x_bus_read_memory(uint32_t addr, uint16_t length, uint8_t *buffer)
129 {
130 // Read memory
131 rsi_mem_rd(addr, length, buffer);
132 return 0;
133 }
sl_si91x_host_is_in_irq_context(void)134 bool sl_si91x_host_is_in_irq_context(void)
135 {
136 return (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) != 0U;
137 }
138
