1 /***************************************************************************//**
2 * @file
3 * @brief Device Manager Clocks.
4 *******************************************************************************
5 * # License
6 * <b>Copyright 2024 Silicon Laboratories, Inc. www.silabs.com</b>
7 ******************************************************************************
8 *
9 * SPDX-License-Identifier: Zlib
10 *
11 * The licensor of this software is Silicon Laboratories Inc.
12 *
13 * This software is provided 'as-is', without any express or implied
14 * warranty. In no event will the authors be held liable for any damages
15 * arising from the use of this software.
16 *
17 * Permission is granted to anyone to use this software for any purpose,
18 * including commercial applications, and to alter it and redistribute it
19 * freely, subject to the following restrictions:
20 *
21 * 1. The origin of this software must not be misrepresented; you must not
22 * claim that you wrote the original software. If you use this software
23 * in a product, an acknowledgment in the product documentation would be
24 * appreciated but is not required.
25 * 2. Altered source versions must be plainly marked as such, and must not be
26 * misrepresented as being the original software.
27 * 3. This notice may not be removed or altered from any source distribution.
28 *
29 *****************************************************************************/
30
31 #ifndef SL_DEVICE_CLOCK_H
32 #define SL_DEVICE_CLOCK_H
33
34 #include "sl_enum.h"
35 #include <stdint.h>
36
37 #if defined(DEVICE_CLOCK_INTERNAL_PRESENT)
38 #include "sli_device_clock_internal.h"
39 #endif
40
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44
45 /***************************************************************************//**
46 * @addtogroup device_clock Device Manager Clock
47 * @details
48 * ## Overview
49 *
50 * The Device Manager Clock module defines the different oscillators,
51 * clock branches and bus clock values that exist across all Silicon Labs
52 * devices.
53 *
54 * @{
55 ******************************************************************************/
56
57 // ----------------------------------------------------------------------------
58 // ENUMS
59
60 /// Oscillators
SL_ENUM(sl_oscillator_t)61 SL_ENUM(sl_oscillator_t) {
62 SL_OSCILLATOR_FSRCO, ///< FSRCO Oscillator
63 SL_OSCILLATOR_HFRCODPLL, ///< HFRCODPLL Oscillator
64 SL_OSCILLATOR_HFXO, ///< HFXO Oscillator
65 SL_OSCILLATOR_HFRCOEM23, ///< HFRCOEM23 Oscillator
66 SL_OSCILLATOR_RFFPLL, ///< RFFPLL Oscillator
67 SL_OSCILLATOR_USBPLL, ///< USBPLL Oscillator
68 SL_OSCILLATOR_SOCPLL, ///< SOCPLL Oscillator
69 SL_OSCILLATOR_LFXO, ///< LFXO Oscillator
70 SL_OSCILLATOR_LFRCO, ///< LFRCO Oscillator
71 SL_OSCILLATOR_ULFRCO, ///< ULFRCO Oscillator
72 SL_OSCILLATOR_CLKIN0, ///< CLKIN0 Oscillator
73 SL_OSCILLATOR_FLPLL ///< FLPLL Oscillator
74 };
75
76 /// Clock Branches
SL_ENUM(sl_clock_branch_t)77 SL_ENUM(sl_clock_branch_t) {
78 SL_CLOCK_BRANCH_SYSCLK, ///< SYSCLK Clock Branch
79 SL_CLOCK_BRANCH_HCLK, ///< HCLK Clock Branch
80 SL_CLOCK_BRANCH_HCLKRADIO, ///< HCLK Radio Clock Branch
81 SL_CLOCK_BRANCH_PCLK, ///< PCLK Clock Branch
82 SL_CLOCK_BRANCH_LSPCLK, ///< LSPCLK Clock Branch
83 SL_CLOCK_BRANCH_TRACECLK, ///< TRACECLK Clock Branch
84 SL_CLOCK_BRANCH_ADCCLK, ///< ADCCLK Clock Branch
85 SL_CLOCK_BRANCH_EXPORTCLK, ///< EXPORTCLK Clock Branch
86 SL_CLOCK_BRANCH_EM01GRPACLK, ///< EM01GRPACLK Clock Branch
87 SL_CLOCK_BRANCH_EM01GRPBCLK, ///< EM01GRPBCLK Clock Branch
88 SL_CLOCK_BRANCH_EM01GRPCCLK, ///< EM01GRPCCLK Clock Branch
89 SL_CLOCK_BRANCH_EM01GRPDCLK, ///< EM01GRPDCLK Clock Branch
90 SL_CLOCK_BRANCH_EM23GRPACLK, ///< EM23GRPACLK Clock Branch
91 SL_CLOCK_BRANCH_EM4GRPACLK, ///< EM4GRPACLK Clock Branch
92 SL_CLOCK_BRANCH_QSPISYSCLK, ///< QSPISYSCLK Clock Branch
93 SL_CLOCK_BRANCH_IADCCLK, ///< IADCCLK Clock Branch
94 SL_CLOCK_BRANCH_WDOG0CLK, ///< WDOG0CLK Clock Branch
95 SL_CLOCK_BRANCH_WDOG1CLK, ///< WDOG1CLK Clock Branch
96 SL_CLOCK_BRANCH_RTCCCLK, ///< RTCCCLK Clock Branch
97 SL_CLOCK_BRANCH_SYSRTCCLK, ///< SYSRTCCLK Clock Branch
98 SL_CLOCK_BRANCH_EUART0CLK, ///< EUART0CLK Clock Branch
99 SL_CLOCK_BRANCH_EUSART0CLK, ///< EUSART0CLK Clock Branch
100 SL_CLOCK_BRANCH_DPLLREFCLK, ///< DPLLREFCLK Clock Branch
101 SL_CLOCK_BRANCH_I2C0CLK, ///< I2C0CLK Clock Branch
102 SL_CLOCK_BRANCH_LCDCLK, ///< LCDCLK Clock Branch
103 SL_CLOCK_BRANCH_PIXELRZCLK, ///< PIXELRZCLK Clock Branch
104 SL_CLOCK_BRANCH_PCNT0CLK, ///< PCNT0CLK Clock Branch
105 SL_CLOCK_BRANCH_PRORTCCLK, ///< PCNT0CLK Clock Branch
106 SL_CLOCK_BRANCH_SYSTICKCLK, ///< SYSTICKCLK Clock Branch
107 SL_CLOCK_BRANCH_LESENSEHFCLK, ///< LESENSEHFCLK Clock Branch
108 SL_CLOCK_BRANCH_VDAC0CLK, ///< VDAC0CLK Clock Branch
109 SL_CLOCK_BRANCH_VDAC1CLK, ///< VDAC1CLK Clock Branch
110 SL_CLOCK_BRANCH_USB0CLK, ///< USB0CLK Clock Branch
111 SL_CLOCK_BRANCH_FLPLLREFCLK, ///< FLPLLREFCLK Clock Branch
112 SL_CLOCK_BRANCH_INVALID ///< INVALID Clock Branch
113 };
114
115 // ----------------------------------------------------------------------------
116 // DEFINES
117
118 /// @cond DO_NOT_INCLUDE_WITH_DOXYGEN
119
120 // CLKEN bitfield shift in bus clock value.
121 #define _BUS_CLOCK_CLKEN_BIT_SHIFT 0
122
123 // CLKEN bitfield mask in bus clock value.
124 #define _BUS_CLOCK_CLKEN_BIT_MASK 0x3FUL
125
126 // CLKENx register number shift in bus clock value.
127 #define _BUS_CLOCK_CLKENX_SHIFT 6
128
129 // CLKENx register number mask in bus clock value.
130 #define _BUS_CLOCK_CLKENX_MASK 0x1C0UL
131
132 // CLKEN0 value in bus clock.
133 #define BUS_CLOCK_CLKEN0 0x0UL
134
135 // CLKEN1 value in bus clock.
136 #define BUS_CLOCK_CLKEN1 0x1UL
137
138 // CLKEN2 value in bus clock.
139 #define BUS_CLOCK_CLKEN2 0x2UL
140
141 // CLKENHV value in bus clock.
142 #define BUS_CLOCK_CLKENHV 0x3UL
143
144 /// @endcond
145
146 /***************************************************************************//**
147 * @name Bus Clock Defines
148 * Those defines can be used as constant of type sl_bus_clock_t and thus can
149 * be used as argument for function sl_clock_manager_enable_bus_clock() and
150 * sl_clock_manager_disable_bus_clock() in @ref clock_manager.
151 * The values of those defines are device specific.
152 * @{
153 ******************************************************************************/
154
155 /// Define for INVALID peripheral bus clock pointer.
156 #define SL_BUS_CLOCK_INVALID (0)
157
158 /// Define for ACMP0 peripheral bus clock pointer.
159 #define SL_BUS_CLOCK_ACMP0 (&SL_BUS_CLOCK_ACMP0_VALUE)
160
161 /// Define for ACMP1 peripheral bus clock pointer.
162 #define SL_BUS_CLOCK_ACMP1 (&SL_BUS_CLOCK_ACMP1_VALUE)
163
164 /// Define for ADC0 peripheral bus clock pointer.
165 #define SL_BUS_CLOCK_ADC0 (&SL_BUS_CLOCK_ADC0_VALUE)
166
167 /// Define for AGC peripheral bus clock pointer.
168 #define SL_BUS_CLOCK_AGC (&SL_BUS_CLOCK_AGC_VALUE)
169
170 /// Define for AMUXCP0 peripheral bus clock pointer.
171 #define SL_BUS_CLOCK_AMUXCP0 (&SL_BUS_CLOCK_AMUXCP0_VALUE)
172
173 /// Define for BUFC peripheral bus clock pointer.
174 #define SL_BUS_CLOCK_BUFC (&SL_BUS_CLOCK_BUFC_VALUE)
175
176 /// Define for BURAM peripheral bus clock pointer.
177 #define SL_BUS_CLOCK_BURAM (&SL_BUS_CLOCK_BURAM_VALUE)
178
179 /// Define for BURTC peripheral bus clock pointer.
180 #define SL_BUS_CLOCK_BURTC (&SL_BUS_CLOCK_BURTC_VALUE)
181
182 /// Define for CRYPTOACC peripheral bus clock pointer.
183 #define SL_BUS_CLOCK_CRYPTOACC (&SL_BUS_CLOCK_CRYPTOACC_VALUE)
184
185 /// Define for DCDC peripheral bus clock pointer.
186 #define SL_BUS_CLOCK_DCDC (&SL_BUS_CLOCK_DCDC_VALUE)
187
188 /// Define for DEVINFO peripheral bus clock pointer.
189 #define SL_BUS_CLOCK_DEVINFO (&SL_BUS_CLOCK_DEVINFO_VALUE)
190
191 /// Define for DMEM peripheral bus clock pointer.
192 #define SL_BUS_CLOCK_DMEM (&SL_BUS_CLOCK_DMEM_VALUE)
193
194 /// Define for DPLL0 peripheral bus clock pointer.
195 #define SL_BUS_CLOCK_DPLL0 (&SL_BUS_CLOCK_DPLL0_VALUE)
196
197 /// Define for ECAIFADC peripheral bus clock pointer.
198 #define SL_BUS_CLOCK_ECAIFADC (&SL_BUS_CLOCK_ECAIFADC_VALUE)
199
200 /// Define for ETAMPDET peripheral bus clock pointer.
201 #define SL_BUS_CLOCK_ETAMPDET (&SL_BUS_CLOCK_ETAMPDET_VALUE)
202
203 /// Define for EUART0 peripheral bus clock pointer.
204 #define SL_BUS_CLOCK_EUART0 (&SL_BUS_CLOCK_EUART0_VALUE)
205
206 /// Define for EUSART0 peripheral bus clock pointer.
207 #define SL_BUS_CLOCK_EUSART0 (&SL_BUS_CLOCK_EUSART0_VALUE)
208
209 /// Define for EUSART1 peripheral bus clock pointer.
210 #define SL_BUS_CLOCK_EUSART1 (&SL_BUS_CLOCK_EUSART1_VALUE)
211
212 /// Define for EUSART2 peripheral bus clock pointer.
213 #define SL_BUS_CLOCK_EUSART2 (&SL_BUS_CLOCK_EUSART2_VALUE)
214
215 /// Define for EUSART3 peripheral bus clock pointer.
216 #define SL_BUS_CLOCK_EUSART3 (&SL_BUS_CLOCK_EUSART3_VALUE)
217
218 /// Define for EUSART4 peripheral bus clock pointer.
219 #define SL_BUS_CLOCK_EUSART4 (&SL_BUS_CLOCK_EUSART4_VALUE)
220
221 /// Define for FRC peripheral bus clock pointer.
222 #define SL_BUS_CLOCK_FRC (&SL_BUS_CLOCK_FRC_VALUE)
223
224 /// Define for FSRCO peripheral bus clock pointer.
225 #define SL_BUS_CLOCK_FSRCO (&SL_BUS_CLOCK_FSRCO_VALUE)
226
227 /// Define for GPCRC0 peripheral bus clock pointer.
228 #define SL_BUS_CLOCK_GPCRC0 (&SL_BUS_CLOCK_GPCRC0_VALUE)
229
230 /// Define for GPIO peripheral bus clock pointer.
231 #define SL_BUS_CLOCK_GPIO (&SL_BUS_CLOCK_GPIO_VALUE)
232
233 /// Define for HFRCO0 peripheral bus clock pointer.
234 #define SL_BUS_CLOCK_HFRCO0 (&SL_BUS_CLOCK_HFRCO0_VALUE)
235
236 /// Define for HFRCOEM23 peripheral bus clock pointer.
237 #define SL_BUS_CLOCK_HFRCOEM23 (&SL_BUS_CLOCK_HFRCOEM23_VALUE)
238
239 /// Define for HFXO0 peripheral bus clock pointer.
240 #define SL_BUS_CLOCK_HFXO0 (&SL_BUS_CLOCK_HFXO0_VALUE)
241
242 /// Define for HOSTMAILBOX peripheral bus clock pointer.
243 #define SL_BUS_CLOCK_HOSTMAILBOX (&SL_BUS_CLOCK_HOSTMAILBOX_VALUE)
244
245 /// Define for HOSTPORTAL peripheral bus clock pointer.
246 #define SL_BUS_CLOCK_HOSTPORTAL (&SL_BUS_CLOCK_HOSTPORTAL_VALUE)
247
248 /// Define for I2C0 peripheral bus clock pointer.
249 #define SL_BUS_CLOCK_I2C0 (&SL_BUS_CLOCK_I2C0_VALUE)
250
251 /// Define for I2C1 peripheral bus clock pointer.
252 #define SL_BUS_CLOCK_I2C1 (&SL_BUS_CLOCK_I2C1_VALUE)
253
254 /// Define for I2C2 peripheral bus clock pointer.
255 #define SL_BUS_CLOCK_I2C2 (&SL_BUS_CLOCK_I2C2_VALUE)
256
257 /// Define for I2C3 peripheral bus clock pointer.
258 #define SL_BUS_CLOCK_I2C3 (&SL_BUS_CLOCK_I2C3_VALUE)
259
260 /// Define for IADC0 peripheral bus clock pointer.
261 #define SL_BUS_CLOCK_IADC0 (&SL_BUS_CLOCK_IADC0_VALUE)
262
263 /// Define for ICACHE0 peripheral bus clock pointer.
264 #define SL_BUS_CLOCK_ICACHE0 (&SL_BUS_CLOCK_ICACHE0_VALUE)
265
266 /// Define for IFADCDEBUG peripheral bus clock pointer.
267 #define SL_BUS_CLOCK_IFADCDEBUG (&SL_BUS_CLOCK_IFADCDEBUG_VALUE)
268
269 /// Define for KEYSCAN peripheral bus clock pointer.
270 #define SL_BUS_CLOCK_KEYSCAN (&SL_BUS_CLOCK_KEYSCAN_VALUE)
271
272 /// Define for KSU peripheral bus clock pointer.
273 #define SL_BUS_CLOCK_KSU (&SL_BUS_CLOCK_KSU_VALUE)
274
275 /// Define for L2ICACHE0 peripheral bus clock pointer.
276 #define SL_BUS_CLOCK_L2ICACHE0 (&SL_BUS_CLOCK_L2ICACHE0_VALUE)
277
278 /// Define for LCD peripheral bus clock pointer.
279 #define SL_BUS_CLOCK_LCD (&SL_BUS_CLOCK_LCD_VALUE)
280
281 /// Define for LDMA0 peripheral bus clock pointer.
282 #define SL_BUS_CLOCK_LDMA0 (&SL_BUS_CLOCK_LDMA0_VALUE)
283
284 /// Define for LDMAXBAR0 peripheral bus clock pointer.
285 #define SL_BUS_CLOCK_LDMAXBAR0 (&SL_BUS_CLOCK_LDMAXBAR0_VALUE)
286
287 /// Define for LEDDRV0 peripheral bus clock pointer.
288 #define SL_BUS_CLOCK_LEDDRV0 (&SL_BUS_CLOCK_LEDDRV0_VALUE)
289
290 /// Define for LESENSE peripheral bus clock pointer.
291 #define SL_BUS_CLOCK_LESENSE (&SL_BUS_CLOCK_LESENSE_VALUE)
292
293 /// Define for LETIMER0 peripheral bus clock pointer.
294 #define SL_BUS_CLOCK_LETIMER0 (&SL_BUS_CLOCK_LETIMER0_VALUE)
295
296 /// Define for LFRCO peripheral bus clock pointer.
297 #define SL_BUS_CLOCK_LFRCO (&SL_BUS_CLOCK_LFRCO_VALUE)
298
299 /// Define for LFXO peripheral bus clock pointer.
300 #define SL_BUS_CLOCK_LFXO (&SL_BUS_CLOCK_LFXO_VALUE)
301
302 /// Define for LPWAES peripheral bus clock pointer.
303 #define SL_BUS_CLOCK_LPWAES (&SL_BUS_CLOCK_LPWAES_VALUE)
304
305 /// Define for LPW0PORTAL peripheral bus clock pointer.
306 #define SL_BUS_CLOCK_LPW0PORTAL (&SL_BUS_CLOCK_LPW0PORTAL_VALUE)
307
308 /// Define for MODEM peripheral bus clock pointer.
309 #define SL_BUS_CLOCK_MODEM (&SL_BUS_CLOCK_MODEM_VALUE)
310
311 /// Define for MSC peripheral bus clock pointer.
312 #define SL_BUS_CLOCK_MSC (&SL_BUS_CLOCK_MSC_VALUE)
313
314 /// Define for MVP peripheral bus clock pointer.
315 #define SL_BUS_CLOCK_MVP (&SL_BUS_CLOCK_MVP_VALUE)
316
317 /// Define for PCNT0 peripheral bus clock pointer.
318 #define SL_BUS_CLOCK_PCNT0 (&SL_BUS_CLOCK_PCNT0_VALUE)
319
320 /// Define for PDM peripheral bus clock pointer.
321 #define SL_BUS_CLOCK_PDM (&SL_BUS_CLOCK_PDM_VALUE)
322
323 /// Define for PIXELRZ0 peripheral bus clock pointer.
324 #define SL_BUS_CLOCK_PIXELRZ0 (&SL_BUS_CLOCK_PIXELRZ0_VALUE)
325
326 /// Define for PIXELRZ1 peripheral bus clock pointer.
327 #define SL_BUS_CLOCK_PIXELRZ1 (&SL_BUS_CLOCK_PIXELRZ1_VALUE)
328
329 /// Define for PRORTC peripheral bus clock pointer.
330 #define SL_BUS_CLOCK_PRORTC (&SL_BUS_CLOCK_PRORTC_VALUE)
331
332 /// Define for PROTIMER peripheral bus clock pointer.
333 #define SL_BUS_CLOCK_PROTIMER (&SL_BUS_CLOCK_PROTIMER_VALUE)
334
335 /// Define for PRS peripheral bus clock pointer.
336 #define SL_BUS_CLOCK_PRS (&SL_BUS_CLOCK_PRS_VALUE)
337
338 /// Define for RAC peripheral bus clock pointer.
339 #define SL_BUS_CLOCK_RAC (&SL_BUS_CLOCK_RAC_VALUE)
340
341 /// Define for RADIOAES peripheral bus clock pointer.
342 #define SL_BUS_CLOCK_RADIOAES (&SL_BUS_CLOCK_RADIOAES_VALUE)
343
344 /// Define for RDMAILBOX0 peripheral bus clock pointer.
345 #define SL_BUS_CLOCK_RDMAILBOX0 (&SL_BUS_CLOCK_RDMAILBOX0_VALUE)
346
347 /// Define for RDMAILBOX1 peripheral bus clock pointer.
348 #define SL_BUS_CLOCK_RDMAILBOX1 (&SL_BUS_CLOCK_RDMAILBOX1_VALUE)
349
350 /// Define for RDSCRATCHPAD peripheral bus clock pointer.
351 #define SL_BUS_CLOCK_RDSCRATCHPAD (&SL_BUS_CLOCK_RDSCRATCHPAD_VALUE)
352
353 /// Define for RFCRC peripheral bus clock pointer.
354 #define SL_BUS_CLOCK_RFCRC (&SL_BUS_CLOCK_RFCRC_VALUE)
355
356 /// Define for RFECA0 peripheral bus clock pointer.
357 #define SL_BUS_CLOCK_RFECA0 (&SL_BUS_CLOCK_RFECA0_VALUE)
358
359 /// Define for RFECA1 peripheral bus clock pointer.
360 #define SL_BUS_CLOCK_RFECA1 (&SL_BUS_CLOCK_RFECA1_VALUE)
361
362 /// Define for RFFPLL0 peripheral bus clock pointer.
363 #define SL_BUS_CLOCK_RFFPLL0 (&SL_BUS_CLOCK_RFFPLL0_VALUE)
364
365 /// Define for RFMAILBOX peripheral bus clock pointer.
366 #define SL_BUS_CLOCK_RFMAILBOX (&SL_BUS_CLOCK_RFMAILBOX_VALUE)
367
368 /// Define for RFSCRATCHPAD peripheral bus clock pointer.
369 #define SL_BUS_CLOCK_RFSCRATCHPAD (&SL_BUS_CLOCK_RFSCRATCHPAD_VALUE)
370
371 /// Define for RFSENSE peripheral bus clock pointer.
372 #define SL_BUS_CLOCK_RFSENSE (&SL_BUS_CLOCK_RFSENSE_VALUE)
373
374 /// Define for RPA peripheral bus clock pointer.
375 #define SL_BUS_CLOCK_RPA (&SL_BUS_CLOCK_RPA_VALUE)
376
377 /// Define for RTCC peripheral bus clock pointer.
378 #define SL_BUS_CLOCK_RTCC (&SL_BUS_CLOCK_RTCC_VALUE)
379
380 /// Define for SCRATCHPAD peripheral bus clock pointer.
381 #define SL_BUS_CLOCK_SCRATCHPAD (&SL_BUS_CLOCK_SCRATCHPAD_VALUE)
382
383 /// Define for SEMAILBOX peripheral bus clock pointer.
384 #define SL_BUS_CLOCK_SEMAILBOX (&SL_BUS_CLOCK_SEMAILBOX_VALUE)
385
386 /// Define for SEMAPHORE0 peripheral bus clock pointer.
387 #define SL_BUS_CLOCK_SEMAPHORE0 (&SL_BUS_CLOCK_SEMAPHORE0_VALUE)
388
389 /// Define for SEMAPHORE1 peripheral bus clock pointer.
390 #define SL_BUS_CLOCK_SEMAPHORE1 (&SL_BUS_CLOCK_SEMAPHORE1_VALUE)
391
392 /// Define for SEPORTAL peripheral bus clock pointer.
393 #define SL_BUS_CLOCK_SEPORTAL (&SL_BUS_CLOCK_SEPORTAL_VALUE)
394
395 /// Define for SMU peripheral bus clock pointer.
396 #define SL_BUS_CLOCK_SMU (&SL_BUS_CLOCK_SMU_VALUE)
397
398 /// Define for SOCPLL0 peripheral bus clock pointer.
399 #define SL_BUS_CLOCK_SOCPLL0 (&SL_BUS_CLOCK_SOCPLL0_VALUE)
400
401 /// Define for SYMCRYPTO peripheral bus clock pointer.
402 #define SL_BUS_CLOCK_SYMCRYPTO (&SL_BUS_CLOCK_SYMCRYPTO_VALUE)
403
404 /// Define for SYNTH peripheral bus clock pointer.
405 #define SL_BUS_CLOCK_SYNTH (&SL_BUS_CLOCK_SYNTH_VALUE)
406
407 /// Define for SYSCFG peripheral bus clock pointer.
408 #define SL_BUS_CLOCK_SYSCFG (&SL_BUS_CLOCK_SYSCFG_VALUE)
409
410 /// Define for SYSRTC0 peripheral bus clock pointer.
411 #define SL_BUS_CLOCK_SYSRTC0 (&SL_BUS_CLOCK_SYSRTC0_VALUE)
412
413 /// Define for TIMER0 peripheral bus clock pointer.
414 #define SL_BUS_CLOCK_TIMER0 (&SL_BUS_CLOCK_TIMER0_VALUE)
415
416 /// Define for TIMER1 peripheral bus clock pointer.
417 #define SL_BUS_CLOCK_TIMER1 (&SL_BUS_CLOCK_TIMER1_VALUE)
418
419 /// Define for TIMER2 peripheral bus clock pointer.
420 #define SL_BUS_CLOCK_TIMER2 (&SL_BUS_CLOCK_TIMER2_VALUE)
421
422 /// Define for TIMER3 peripheral bus clock pointer.
423 #define SL_BUS_CLOCK_TIMER3 (&SL_BUS_CLOCK_TIMER3_VALUE)
424
425 /// Define for TIMER4 peripheral bus clock pointer.
426 #define SL_BUS_CLOCK_TIMER4 (&SL_BUS_CLOCK_TIMER4_VALUE)
427
428 /// Define for TIMER5 peripheral bus clock pointer.
429 #define SL_BUS_CLOCK_TIMER5 (&SL_BUS_CLOCK_TIMER5_VALUE)
430
431 /// Define for TIMER6 peripheral bus clock pointer.
432 #define SL_BUS_CLOCK_TIMER6 (&SL_BUS_CLOCK_TIMER6_VALUE)
433
434 /// Define for TIMER7 peripheral bus clock pointer.
435 #define SL_BUS_CLOCK_TIMER7 (&SL_BUS_CLOCK_TIMER7_VALUE)
436
437 /// Define for TIMER8 peripheral bus clock pointer.
438 #define SL_BUS_CLOCK_TIMER8 (&SL_BUS_CLOCK_TIMER8_VALUE)
439
440 /// Define for TIMER9 peripheral bus clock pointer.
441 #define SL_BUS_CLOCK_TIMER9 (&SL_BUS_CLOCK_TIMER9_VALUE)
442
443 /// Define for ULFRCO peripheral bus clock pointer.
444 #define SL_BUS_CLOCK_ULFRCO (&SL_BUS_CLOCK_ULFRCO_VALUE)
445
446 /// Define for USART0 peripheral bus clock pointer.
447 #define SL_BUS_CLOCK_USART0 (&SL_BUS_CLOCK_USART0_VALUE)
448
449 /// Define for USART1 peripheral bus clock pointer.
450 #define SL_BUS_CLOCK_USART1 (&SL_BUS_CLOCK_USART1_VALUE)
451
452 /// Define for USART2 peripheral bus clock pointer.
453 #define SL_BUS_CLOCK_USART2 (&SL_BUS_CLOCK_USART2_VALUE)
454
455 /// Define for USB peripheral bus clock pointer.
456 #define SL_BUS_CLOCK_USB (&SL_BUS_CLOCK_USB_VALUE)
457
458 /// Define for VDAC0 peripheral bus clock pointer.
459 #define SL_BUS_CLOCK_VDAC0 (&SL_BUS_CLOCK_VDAC0_VALUE)
460
461 /// Define for VDAC1 peripheral bus clock pointer.
462 #define SL_BUS_CLOCK_VDAC1 (&SL_BUS_CLOCK_VDAC1_VALUE)
463
464 /// Define for WDOG0 peripheral bus clock pointer.
465 #define SL_BUS_CLOCK_WDOG0 (&SL_BUS_CLOCK_WDOG0_VALUE)
466
467 /// Define for WDOG1 peripheral bus clock pointer.
468 #define SL_BUS_CLOCK_WDOG1 (&SL_BUS_CLOCK_WDOG1_VALUE)
469
470 /// @} (end bus_clock_defines)
471
472 // ----------------------------------------------------------------------------
473 // TYPEDEFS
474
475 /// The bus clock typedef.
476 typedef const uint32_t* sl_bus_clock_t;
477
478 // ----------------------------------------------------------------------------
479 // EXTERNS
480
481 /// @cond DO_NOT_INCLUDE_WITH_DOXYGEN
482
483 // External declaration for invalid peripheral bus clock value.
484 extern const uint32_t SL_BUS_CLOCK_INVALID_VALUE;
485
486 // External declaration for ACMP0 peripheral bus clock value.
487 extern const uint32_t SL_BUS_CLOCK_ACMP0_VALUE;
488
489 // External declaration for ACMP1 peripheral bus clock value.
490 extern const uint32_t SL_BUS_CLOCK_ACMP1_VALUE;
491
492 // External declaration for ADC0 peripheral bus clock value.
493 extern const uint32_t SL_BUS_CLOCK_ADC0_VALUE;
494
495 // External declaration for AGC peripheral bus clock value.
496 extern const uint32_t SL_BUS_CLOCK_AGC_VALUE;
497
498 // External declaration for AMUXCP0 peripheral bus clock value.
499 extern const uint32_t SL_BUS_CLOCK_AMUXCP0_VALUE;
500
501 // External declaration for BUFC peripheral bus clock value.
502 extern const uint32_t SL_BUS_CLOCK_BUFC_VALUE;
503
504 // External declaration for BURAM peripheral bus clock value.
505 extern const uint32_t SL_BUS_CLOCK_BURAM_VALUE;
506
507 // External declaration for BURTC peripheral bus clock value.
508 extern const uint32_t SL_BUS_CLOCK_BURTC_VALUE;
509
510 // External declaration for CRYPTOACC peripheral bus clock value.
511 extern const uint32_t SL_BUS_CLOCK_CRYPTOACC_VALUE;
512
513 // External declaration for DCDC peripheral bus clock value.
514 extern const uint32_t SL_BUS_CLOCK_DCDC_VALUE;
515
516 // External declaration for DEVINFO peripheral bus clock value.
517 extern const uint32_t SL_BUS_CLOCK_DEVINFO_VALUE;
518
519 // External declaration for DMEM peripheral bus clock value.
520 extern const uint32_t SL_BUS_CLOCK_DMEM_VALUE;
521
522 // External declaration for DPLL0 peripheral bus clock value.
523 extern const uint32_t SL_BUS_CLOCK_DPLL0_VALUE;
524
525 // External declaration for ECAIFADC peripheral bus clock value.
526 extern const uint32_t SL_BUS_CLOCK_ECAIFADC_VALUE;
527
528 // External declaration for ETAMPDET peripheral bus clock value.
529 extern const uint32_t SL_BUS_CLOCK_ETAMPDET_VALUE;
530
531 // External declaration for EUART0 peripheral bus clock value.
532 extern const uint32_t SL_BUS_CLOCK_EUART0_VALUE;
533
534 // External declaration for EUSART0 peripheral bus clock value.
535 extern const uint32_t SL_BUS_CLOCK_EUSART0_VALUE;
536
537 // External declaration for EUSART1 peripheral bus clock value.
538 extern const uint32_t SL_BUS_CLOCK_EUSART1_VALUE;
539
540 // External declaration for EUSART2 peripheral bus clock value.
541 extern const uint32_t SL_BUS_CLOCK_EUSART2_VALUE;
542
543 // External declaration for EUSART3 peripheral bus clock value.
544 extern const uint32_t SL_BUS_CLOCK_EUSART3_VALUE;
545
546 // External declaration for EUSART4 peripheral bus clock value.
547 extern const uint32_t SL_BUS_CLOCK_EUSART4_VALUE;
548
549 // External declaration for FRC peripheral bus clock value.
550 extern const uint32_t SL_BUS_CLOCK_FRC_VALUE;
551
552 // External declaration for FSRCO peripheral bus clock value.
553 extern const uint32_t SL_BUS_CLOCK_FSRCO_VALUE;
554
555 // External declaration for GPCRC0 peripheral bus clock value.
556 extern const uint32_t SL_BUS_CLOCK_GPCRC0_VALUE;
557
558 // External declaration for GPIO peripheral bus clock value.
559 extern const uint32_t SL_BUS_CLOCK_GPIO_VALUE;
560
561 // External declaration for HFRCO0 peripheral bus clock value.
562 extern const uint32_t SL_BUS_CLOCK_HFRCO0_VALUE;
563
564 // External declaration for HFRCOEM23 peripheral bus clock value.
565 extern const uint32_t SL_BUS_CLOCK_HFRCOEM23_VALUE;
566
567 // External declaration for HFXO0 peripheral bus clock value.
568 extern const uint32_t SL_BUS_CLOCK_HFXO0_VALUE;
569
570 // External declaration for HOSTMAILBOX peripheral bus clock value.
571 extern const uint32_t SL_BUS_CLOCK_HOSTMAILBOX_VALUE;
572
573 // External declaration for HOSTPORTAL peripheral bus clock value.
574 extern const uint32_t SL_BUS_CLOCK_HOSTPORTAL_VALUE;
575
576 // External declaration for I2C0 peripheral bus clock value.
577 extern const uint32_t SL_BUS_CLOCK_I2C0_VALUE;
578
579 // External declaration for I2C1 peripheral bus clock value.
580 extern const uint32_t SL_BUS_CLOCK_I2C1_VALUE;
581
582 // External declaration for I2C2 peripheral bus clock value.
583 extern const uint32_t SL_BUS_CLOCK_I2C2_VALUE;
584
585 // External declaration for I2C3 peripheral bus clock value.
586 extern const uint32_t SL_BUS_CLOCK_I2C3_VALUE;
587
588 // External declaration for IADC0 peripheral bus clock value.
589 extern const uint32_t SL_BUS_CLOCK_IADC0_VALUE;
590
591 // External declaration for ICACHE0 peripheral bus clock value.
592 extern const uint32_t SL_BUS_CLOCK_ICACHE0_VALUE;
593
594 // External declaration for IFADCDEBUG peripheral bus clock value.
595 extern const uint32_t SL_BUS_CLOCK_IFADCDEBUG_VALUE;
596
597 // External declaration for KEYSCAN peripheral bus clock value.
598 extern const uint32_t SL_BUS_CLOCK_KEYSCAN_VALUE;
599
600 // External declaration for KSU peripheral bus clock value.
601 extern const uint32_t SL_BUS_CLOCK_KSU_VALUE;
602
603 // External declaration for L2ICACHE0 peripheral bus clock value.
604 extern const uint32_t SL_BUS_CLOCK_L2ICACHE0_VALUE;
605
606 // External declaration for LCD peripheral bus clock value.
607 extern const uint32_t SL_BUS_CLOCK_LCD_VALUE;
608
609 // External declaration for LDMA0 peripheral bus clock value.
610 extern const uint32_t SL_BUS_CLOCK_LDMA0_VALUE;
611
612 // External declaration for LDMAXBAR0 peripheral bus clock value.
613 extern const uint32_t SL_BUS_CLOCK_LDMAXBAR0_VALUE;
614
615 // External declaration for LEDDRV0 peripheral bus clock value.
616 extern const uint32_t SL_BUS_CLOCK_LEDDRV0_VALUE;
617
618 // External declaration for LESENSE peripheral bus clock value.
619 extern const uint32_t SL_BUS_CLOCK_LESENSE_VALUE;
620
621 // External declaration for LETIMER0 peripheral bus clock value.
622 extern const uint32_t SL_BUS_CLOCK_LETIMER0_VALUE;
623
624 // External declaration for LFRCO peripheral bus clock value.
625 extern const uint32_t SL_BUS_CLOCK_LFRCO_VALUE;
626
627 // External declaration for LFXO peripheral bus clock value.
628 extern const uint32_t SL_BUS_CLOCK_LFXO_VALUE;
629
630 // External declaration for LPWAES peripheral bus clock value.
631 extern const uint32_t SL_BUS_CLOCK_LPWAES_VALUE;
632
633 // External declaration for LPW0PORTAL peripheral bus clock value.
634 extern const uint32_t SL_BUS_CLOCK_LPW0PORTAL_VALUE;
635
636 // External declaration for MODEM peripheral bus clock value.
637 extern const uint32_t SL_BUS_CLOCK_MODEM_VALUE;
638
639 // External declaration for MSC peripheral bus clock value.
640 extern const uint32_t SL_BUS_CLOCK_MSC_VALUE;
641
642 // External declaration for MVP peripheral bus clock value.
643 extern const uint32_t SL_BUS_CLOCK_MVP_VALUE;
644
645 // External declaration for PCNT0 peripheral bus clock value.
646 extern const uint32_t SL_BUS_CLOCK_PCNT0_VALUE;
647
648 // External declaration for PDM peripheral bus clock value.
649 extern const uint32_t SL_BUS_CLOCK_PDM_VALUE;
650
651 // External declaration for PIXELRZ0 peripheral bus clock value.
652 extern const uint32_t SL_BUS_CLOCK_PIXELRZ0_VALUE;
653
654 // External declaration for PIXELRZ1 peripheral bus clock value.
655 extern const uint32_t SL_BUS_CLOCK_PIXELRZ1_VALUE;
656
657 // External declaration for PRORTC peripheral bus clock value.
658 extern const uint32_t SL_BUS_CLOCK_PRORTC_VALUE;
659
660 // External declaration for PROTIMER peripheral bus clock value.
661 extern const uint32_t SL_BUS_CLOCK_PROTIMER_VALUE;
662
663 // External declaration for PRS peripheral bus clock value.
664 extern const uint32_t SL_BUS_CLOCK_PRS_VALUE;
665
666 // External declaration for RAC peripheral bus clock value.
667 extern const uint32_t SL_BUS_CLOCK_RAC_VALUE;
668
669 // External declaration for RADIOAES peripheral bus clock value.
670 extern const uint32_t SL_BUS_CLOCK_RADIOAES_VALUE;
671
672 // External declaration for RDMAILBOX0 peripheral bus clock value.
673 extern const uint32_t SL_BUS_CLOCK_RDMAILBOX0_VALUE;
674
675 // External declaration for RDMAILBOX1 peripheral bus clock value.
676 extern const uint32_t SL_BUS_CLOCK_RDMAILBOX1_VALUE;
677
678 // External declaration for RDSCRATCHPAD peripheral bus clock value.
679 extern const uint32_t SL_BUS_CLOCK_RDSCRATCHPAD_VALUE;
680
681 // External declaration for RFCRC peripheral bus clock value.
682 extern const uint32_t SL_BUS_CLOCK_RFCRC_VALUE;
683
684 // External declaration for RFECA0 peripheral bus clock value.
685 extern const uint32_t SL_BUS_CLOCK_RFECA0_VALUE;
686
687 // External declaration for RFECA1 peripheral bus clock value.
688 extern const uint32_t SL_BUS_CLOCK_RFECA1_VALUE;
689
690 // External declaration for RFFPLL0 peripheral bus clock value.
691 extern const uint32_t SL_BUS_CLOCK_RFFPLL0_VALUE;
692
693 // External declaration for RFMAILBOX peripheral bus clock value.
694 extern const uint32_t SL_BUS_CLOCK_RFMAILBOX_VALUE;
695
696 // External declaration for RFSCRATCHPAD peripheral bus clock value.
697 extern const uint32_t SL_BUS_CLOCK_RFSCRATCHPAD_VALUE;
698
699 // External declaration for RFSENSE peripheral bus clock value.
700 extern const uint32_t SL_BUS_CLOCK_RFSENSE_VALUE;
701
702 // External declaration for RPA peripheral bus clock value.
703 extern const uint32_t SL_BUS_CLOCK_RPA_VALUE;
704
705 // External declaration for RTCC peripheral bus clock value.
706 extern const uint32_t SL_BUS_CLOCK_RTCC_VALUE;
707
708 // External declaration for SCRATCHPAD peripheral bus clock value.
709 extern const uint32_t SL_BUS_CLOCK_SCRATCHPAD_VALUE;
710
711 // External declaration for SEMAILBOX peripheral bus clock value.
712 extern const uint32_t SL_BUS_CLOCK_SEMAILBOX_VALUE;
713
714 // External declaration for SEMAPHORE0 peripheral bus clock value.
715 extern const uint32_t SL_BUS_CLOCK_SEMAPHORE0_VALUE;
716
717 // External declaration for SEMAPHORE1 peripheral bus clock value.
718 extern const uint32_t SL_BUS_CLOCK_SEMAPHORE1_VALUE;
719
720 // External declaration for SEPORTAL peripheral bus clock value.
721 extern const uint32_t SL_BUS_CLOCK_SEPORTAL_VALUE;
722
723 // External declaration for SMU peripheral bus clock value.
724 extern const uint32_t SL_BUS_CLOCK_SMU_VALUE;
725
726 // External declaration for SOCPLL0 peripheral bus clock value.
727 extern const uint32_t SL_BUS_CLOCK_SOCPLL0_VALUE;
728
729 // External declaration for SYMCRYPTO peripheral bus clock value.
730 extern const uint32_t SL_BUS_CLOCK_SYMCRYPTO_VALUE;
731
732 // External declaration for SYNTH peripheral bus clock value.
733 extern const uint32_t SL_BUS_CLOCK_SYNTH_VALUE;
734
735 // External declaration for SYSCFG peripheral bus clock value.
736 extern const uint32_t SL_BUS_CLOCK_SYSCFG_VALUE;
737
738 // External declaration for SYSRTC0 peripheral bus clock value.
739 extern const uint32_t SL_BUS_CLOCK_SYSRTC0_VALUE;
740
741 // External declaration for TIMER0 peripheral bus clock value.
742 extern const uint32_t SL_BUS_CLOCK_TIMER0_VALUE;
743
744 // External declaration for TIMER1 peripheral bus clock value.
745 extern const uint32_t SL_BUS_CLOCK_TIMER1_VALUE;
746
747 // External declaration for TIMER2 peripheral bus clock value.
748 extern const uint32_t SL_BUS_CLOCK_TIMER2_VALUE;
749
750 // External declaration for TIMER3 peripheral bus clock value.
751 extern const uint32_t SL_BUS_CLOCK_TIMER3_VALUE;
752
753 // External declaration for TIMER4 peripheral bus clock value.
754 extern const uint32_t SL_BUS_CLOCK_TIMER4_VALUE;
755
756 // External declaration for TIMER5 peripheral bus clock value.
757 extern const uint32_t SL_BUS_CLOCK_TIMER5_VALUE;
758
759 // External declaration for TIMER6 peripheral bus clock value.
760 extern const uint32_t SL_BUS_CLOCK_TIMER6_VALUE;
761
762 // External declaration for TIMER7 peripheral bus clock value.
763 extern const uint32_t SL_BUS_CLOCK_TIMER7_VALUE;
764
765 // External declaration for TIMER8 peripheral bus clock value.
766 extern const uint32_t SL_BUS_CLOCK_TIMER8_VALUE;
767
768 // External declaration for TIMER9 peripheral bus clock value.
769 extern const uint32_t SL_BUS_CLOCK_TIMER9_VALUE;
770
771 // External declaration for ULFRCO peripheral bus clock value.
772 extern const uint32_t SL_BUS_CLOCK_ULFRCO_VALUE;
773
774 // External declaration for USART0 peripheral bus clock value.
775 extern const uint32_t SL_BUS_CLOCK_USART0_VALUE;
776
777 // External declaration for USART1 peripheral bus clock value.
778 extern const uint32_t SL_BUS_CLOCK_USART1_VALUE;
779
780 // External declaration for USART2 peripheral bus clock value.
781 extern const uint32_t SL_BUS_CLOCK_USART2_VALUE;
782
783 // External declaration for USB peripheral bus clock value.
784 extern const uint32_t SL_BUS_CLOCK_USB_VALUE;
785
786 // External declaration for VDAC0 peripheral bus clock value.
787 extern const uint32_t SL_BUS_CLOCK_VDAC0_VALUE;
788
789 // External declaration for VDAC1 peripheral bus clock value.
790 extern const uint32_t SL_BUS_CLOCK_VDAC1_VALUE;
791
792 // External declaration for WDOG0 peripheral bus clock value.
793 extern const uint32_t SL_BUS_CLOCK_WDOG0_VALUE;
794
795 // External declaration for WDOG1 peripheral bus clock value.
796 extern const uint32_t SL_BUS_CLOCK_WDOG1_VALUE;
797
798 /// @endcond
799
800 /** @} (end addtogroup device_clock) */
801
802 #ifdef __cplusplus
803 }
804 #endif
805
806 #endif // SL_DEVICE_CLOCK_H
807
