1/* Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com> */ 2/* SPDX-License-Identifier: Apache-2.0 */ 3 4/ { 5 compatible = "arm,mps2"; 6 #address-cells = <1>; 7 #size-cells = <1>; 8 9 aliases { 10 led0 = &led_0; 11 led1 = &led_1; 12 sw0 = &user_button_0; 13 sw1 = &user_button_1; 14 watchdog0 = &wdog0; 15 }; 16 17 chosen { 18 zephyr,console = &uart0; 19 zephyr,shell-uart = &uart0; 20 zephyr,uart-pipe = &uart1; 21 zephyr,sram = &sram0; 22 zephyr,flash = &flash0; 23 zephyr,flash-controller = &sim_flash_controller; 24 }; 25 26 leds { 27 compatible = "gpio-leds"; 28 led_0: led_0 { 29 gpios = <&gpio_led0 0>; 30 label = "USERLED0"; 31 }; 32 33 led_1: led_1 { 34 gpios = <&gpio_led0 1>; 35 label = "USERLED1"; 36 }; 37 }; 38 39 gpio_keys { 40 compatible = "gpio-keys"; 41 user_button_0: button_0 { 42 label = "USERPB0"; 43 gpios = <&gpio_button 0>; 44 zephyr,code = <INPUT_KEY_0>; 45 }; 46 47 user_button_1: button_1 { 48 label = "USERPB1"; 49 gpios = <&gpio_button 1>; 50 zephyr,code = <INPUT_KEY_1>; 51 }; 52 }; 53 54 sram0: memory@20000000 { 55 compatible = "mmio-sram"; 56 reg = <0x20000000 0x400000>; 57 }; 58 59 flash0: flash@0 { 60 compatible = "soc-nv-flash"; 61 reg = <0 0x400000>; 62 }; 63 64 sim_flash_controller: sim_flash_controller { 65 compatible = "zephyr,sim-flash"; 66 #address-cells = <1>; 67 #size-cells = <1>; 68 erase-value = <0x00>; 69 70 flash_sim0: flash_sim@0 { 71 compatible = "soc-nv-flash"; 72 reg = <0x00000000 0x8000>; 73 erase-block-size = <1024>; 74 write-block-size = <4>; 75 76 partitions { 77 compatible = "fixed-partitions"; 78 #address-cells = <1>; 79 #size-cells = <1>; 80 81 storage_partition: partition@0 { 82 label = "storage_partition"; 83 reg = <0x00000000 0x8000>; 84 }; 85 }; 86 }; 87 }; 88 89 sysclk: system-clock { 90 compatible = "fixed-clock"; 91 clock-frequency = <25000000>; 92 #clock-cells = <0>; 93 }; 94 95 soc { 96 timer0: timer@40000000 { 97 compatible = "arm,cmsdk-timer"; 98 reg = <0x40000000 0x1000>; 99 interrupts = <8 3>; 100 }; 101 102 timer1: timer@40001000 { 103 compatible = "arm,cmsdk-timer"; 104 reg = <0x40001000 0x1000>; 105 interrupts = <9 3>; 106 }; 107 108 dtimer0: dtimer@40002000 { 109 compatible = "arm,cmsdk-dtimer"; 110 reg = <0x40002000 0x1000>; 111 interrupts = <10 3>; 112 }; 113 114 uart0: uart@40004000 { 115 compatible = "arm,cmsdk-uart"; 116 reg = <0x40004000 0x1000>; 117 interrupts = <1 3 0 3>; 118 interrupt-names = "tx", "rx"; 119 clocks = <&sysclk>; 120 current-speed = <115200>; 121 }; 122 123 uart1: uart@40005000 { 124 compatible = "arm,cmsdk-uart"; 125 reg = <0x40005000 0x1000>; 126 interrupts = <3 3 2 3>; 127 interrupt-names = "tx", "rx"; 128 clocks = <&sysclk>; 129 current-speed = <115200>; 130 }; 131 132 uart2: uart@40006000 { 133 compatible = "arm,cmsdk-uart"; 134 reg = <0x40006000 0x1000>; 135 interrupts = <5 3 4 3>; 136 interrupt-names = "tx", "rx"; 137 clocks = <&sysclk>; 138 current-speed = <115200>; 139 }; 140 141 uart3: uart@40007000 { 142 compatible = "arm,cmsdk-uart"; 143 reg = <0x40007000 0x1000>; 144 interrupts = <19 3 18 3>; 145 interrupt-names = "tx", "rx"; 146 clocks = <&sysclk>; 147 current-speed = <115200>; 148 }; 149 150 wdog0: wdog@40008000 { 151 compatible = "arm,cmsdk-watchdog"; 152 clocks = <&sysclk>; 153 reg = <0x40008000 0x1000>; 154 }; 155 156 uart4: uart@40009000 { 157 compatible = "arm,cmsdk-uart"; 158 reg = <0x40009000 0x1000>; 159 interrupts = <21 3 20 3>; 160 interrupt-names = "tx", "rx"; 161 clocks = <&sysclk>; 162 current-speed = <115200>; 163 }; 164 165 gpio0: gpio@40010000 { 166 compatible = "arm,cmsdk-gpio"; 167 reg = <0x40010000 0x1000>; 168 interrupts = <6 3>; 169 gpio-controller; 170 #gpio-cells = <2>; 171 }; 172 173 gpio1: gpio@40011000 { 174 compatible = "arm,cmsdk-gpio"; 175 reg = <0x40011000 0x1000>; 176 interrupts = <7 3>; 177 gpio-controller; 178 #gpio-cells = <2>; 179 }; 180 181 gpio2: gpio@40012000 { 182 compatible = "arm,cmsdk-gpio"; 183 reg = <0x40012000 0x1000>; 184 interrupts = <16 3>; 185 gpio-controller; 186 #gpio-cells = <2>; 187 }; 188 189 gpio3: gpio@40013000 { 190 compatible = "arm,cmsdk-gpio"; 191 reg = <0x40013000 0x1000>; 192 interrupts = <17 3>; 193 gpio-controller; 194 #gpio-cells = <2>; 195 }; 196 197 eth0: eth@40200000 { 198 /* Linux has "smsc,lan9115" */ 199 compatible = "smsc,lan9220"; 200 /* Such a big size from memory map in AN385 */ 201 /* Actual reg range is ~0x200 */ 202 reg = <0x40200000 0x100000>; 203 interrupts = <13 3>; 204 }; 205 206 i2c_touch: i2c@40022000 { 207 compatible = "arm,versatile-i2c"; 208 clock-frequency = <I2C_BITRATE_STANDARD>; 209 #address-cells = <1>; 210 #size-cells = <0>; 211 reg = <0x40022000 0x1000>; 212 }; 213 214 i2c_audio_conf: i2c@40023000 { 215 compatible = "arm,versatile-i2c"; 216 clock-frequency = <I2C_BITRATE_STANDARD>; 217 #address-cells = <1>; 218 #size-cells = <0>; 219 reg = <0x40023000 0x1000>; 220 }; 221 222 i2c_shield0: i2c@40029000 { 223 compatible = "arm,versatile-i2c"; 224 clock-frequency = <I2C_BITRATE_STANDARD>; 225 #address-cells = <1>; 226 #size-cells = <0>; 227 reg = <0x40029000 0x1000>; 228 }; 229 230 i2c_shield1: i2c@4002a000 { 231 compatible = "arm,versatile-i2c"; 232 clock-frequency = <I2C_BITRATE_STANDARD>; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 reg = <0x4002a000 0x1000>; 236 }; 237 238 gpio_led0: mps2_fpgaio@40028000 { 239 compatible = "arm,mmio32-gpio"; 240 reg = <0x40028000 0x4>; 241 gpio-controller; 242 #gpio-cells = <1>; 243 ngpios = <2>; 244 }; 245 246 gpio_button: mps2_fpgaio@40028008 { 247 compatible = "arm,mmio32-gpio"; 248 reg = <0x40028008 0x4>; 249 gpio-controller; 250 #gpio-cells = <1>; 251 ngpios = <2>; 252 direction-input; 253 }; 254 255 gpio_misc: mps2_fpgaio@4002804c { 256 compatible = "arm,mmio32-gpio"; 257 reg = <0x4002804c 0x4>; 258 gpio-controller; 259 #gpio-cells = <1>; 260 ngpios = <10>; 261 }; 262 }; 263}; 264 265&nvic { 266 arm,num-irq-priority-bits = <3>; 267}; 268
