1 /*
2 * Copyright (c) 2023 Intel Corporation
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef _SEDI_SOC_H_
8 #define _SEDI_SOC_H_
9
10 #define SEDI_CONFIG_ARCH_X86 (1)
11
12 #define SEDI_MHZ_TO_HZ(mhz) ((mhz) * 1000000)
13
14 #ifndef ISH_CONFIG_CLK_FREQUENCY_MHZ
15 #ifdef CONFIG_ISH_PLATFORM_FPGA
16 #define ISH_CONFIG_CLK_FREQUENCY_MHZ (20)
17 #else
18 #define ISH_CONFIG_CLK_FREQUENCY_MHZ (100)
19 #endif
20 #endif
21
22 #ifndef ISH_CONFIG_HBW_CLK_DIVIDER
23 #define ISH_CONFIG_HBW_CLK_DIVIDER (1)
24 #endif
25
26 /*!
27 * \defgroup sedi_soc_ish Intel ISH SoC
28 */
29
30 /*!
31 * \fn uint32_t sedi_pm_get_hbw_clock(void)
32 * \brief Get current HBW clock frequency
33 * \return uint32_t current HBW clock frequency
34 * \ingroup sedi_soc_ish
35 */
sedi_pm_get_hbw_clock(void)36 static inline uint32_t sedi_pm_get_hbw_clock(void)
37 {
38 return SEDI_MHZ_TO_HZ(ISH_CONFIG_CLK_FREQUENCY_MHZ /
39 ISH_CONFIG_HBW_CLK_DIVIDER);
40 }
41
42 /*!
43 * \fn uint32_t sedi_pm_get_lbw_clock(void)
44 * \brief Get current LBW clock frequency
45 * \return uint32_t current LBW clock frequency
46 * \ingroup sedi_soc_ish
47 */
sedi_pm_get_lbw_clock(void)48 static inline uint32_t sedi_pm_get_lbw_clock(void)
49 {
50 return SEDI_MHZ_TO_HZ(ISH_CONFIG_CLK_FREQUENCY_MHZ);
51 }
52
53 /*!
54 * \enum vnn_id_t
55 * \brief VNN ID bit for different drivers
56 * \ingroup sedi_soc_ish
57 */
58 typedef enum {
59 VNN_ID_FIRST = 0,
60 VNN_ID_AON_TASK = VNN_ID_FIRST,
61 VNN_ID_IPC_HOST_W,
62 VNN_ID_IPC_HOST_R,
63 VNN_ID_IPC_CSME_W,
64 VNN_ID_IPC_CSME_R,
65 VNN_ID_IPC_PMC_W = 5,
66 VNN_ID_IPC_PMC_R,
67 VNN_ID_DMA0,
68 VNN_ID_SIDEBAND,
69 VNN_ID_TOP,
70 } vnn_id_t;
71
72 #define VNN_ID_IPC_CSE_R VNN_ID_IPC_CSME_R
73 #define VNN_ID_IPC_CSE_W VNN_ID_IPC_CSME_W
74
75 #ifndef SEDI_PMU_BASE
76 #define SEDI_PMU_BASE (0x04200000)
77 #endif
78
79 #define PMU_VNN_REQ_31_0 (SEDI_PMU_BASE + 0x3c)
80 #define PMU_VNN_REQ_ACK (SEDI_PMU_BASE + 0x40)
81 #define PMU_VNN_REQ_ACK_STS BIT(0)
82
83 #define PM_VNN_DRIVER_REQ(vnn_id) \
84 do { \
85 if ((read32(PMU_VNN_REQ_31_0) & BIT(vnn_id)) == 0) { \
86 write32(PMU_VNN_REQ_31_0, BIT(vnn_id)); \
87 while ( \
88 !(read32(PMU_VNN_REQ_ACK) & PMU_VNN_REQ_ACK_STS)) \
89 ; \
90 } \
91 } while (0)
92
93 #define PM_VNN_DRIVER_DEREQ(vnn_id) \
94 do { \
95 if ((read32(PMU_VNN_REQ_31_0) & BIT(vnn_id)) != 0) { \
96 write32(PMU_VNN_REQ_31_0, BIT(vnn_id)); \
97 write32(PMU_VNN_REQ_ACK, read32(PMU_VNN_REQ_ACK)); \
98 } \
99 } while (0)
100
101 #define PM_VNN_ALL_RESET() \
102 do { \
103 write32(PMU_VNN_REQ_31_0, read32(PMU_VNN_REQ_31_0)); \
104 write32(PMU_VNN_REQ_ACK, read32(PMU_VNN_REQ_ACK)); \
105 } while (0)
106
107 #define PM_VNN_DRIVER_RESET(vnn_id) \
108 write32(PMU_VNN_REQ_31_0, \
109 read32(PMU_VNN_REQ_31_0) & BIT(vnn_id));
110
111 /*!
112 * \enum sedi_devid_t
113 * \brief SEDI device ID table
114 * \ingroup sedi_soc_ish
115 */
116 typedef enum {
117 SEDI_DEVID_FIRST = 0,
118 SEDI_DEVID_I2C0 = SEDI_DEVID_FIRST,
119 SEDI_DEVID_I2C1,
120 SEDI_DEVID_I2C2,
121 SEDI_DEVID_UART0,
122 SEDI_DEVID_UART1,
123 SEDI_DEVID_UART2,
124 SEDI_DEVID_GPIO0,
125 SEDI_DEVID_DMA0,
126 SEDI_DEVID_SPI0,
127 SEDI_DEVID_SPI1,
128 SEDI_DEVID_TOP
129 } sedi_devid_t;
130
131 /*!
132 * \brief check if a device is owned by SoC itself
133 * \param[in] dev: device id to check
134 * \return true/false
135 * \ingroup sedi_soc_ish
136 */
sedi_dev_is_self_owned(sedi_devid_t dev)137 static inline bool sedi_dev_is_self_owned(sedi_devid_t dev)
138 {
139 (void)dev;
140
141 return true;
142 }
143
144 #endif
145
