1 /*
2 * Copyright (c) 2023 Intel Corporation
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef _SEDI_SOC_H_
8 #define _SEDI_SOC_H_
9
10 #define SEDI_CONFIG_ARCH_X86 (1)
11
12 #if defined(CONFIG_ISH_PLATFORM_FPGA)
13 /* ISH SoC clock is lower on FPGA than Silicon */
14 #define SEDI_SOC_CLK_DIVISOR (5)
15 #endif
16
17 #ifndef SEDI_SOC_CLK_DIVISOR
18 #define SEDI_SOC_CLK_DIVISOR (1)
19 #endif
20
21 #ifndef ISH_CONFIG_HBW_CLK_DIVIDER
22 #define ISH_CONFIG_HBW_CLK_DIVIDER (1)
23 #endif
24
25 #define SEDI_RTC_TICKS_PER_SECOND (32768 / SEDI_SOC_CLK_DIVISOR)
26
27 #define SEDI_MHZ_TO_HZ(mhz) ((mhz) * 1000000)
28
29 #ifndef ISH_CONFIG_CLK_FREQUENCY_MHZ
30 #define ISH_CONFIG_CLK_FREQUENCY_MHZ (100 / SEDI_SOC_CLK_DIVISOR)
31 #endif
32
33 /*!
34 * \defgroup sedi_soc_ish Intel ISH SoC
35 */
36
37 /*!
38 * \fn uint32_t sedi_pm_get_hbw_clock(void)
39 * \brief Get current HBW clock frequency
40 * \return uint32_t current HBW clock frequency
41 * \ingroup sedi_soc_ish
42 */
sedi_pm_get_hbw_clock(void)43 static inline uint32_t sedi_pm_get_hbw_clock(void)
44 {
45 return SEDI_MHZ_TO_HZ(ISH_CONFIG_CLK_FREQUENCY_MHZ /
46 ISH_CONFIG_HBW_CLK_DIVIDER);
47 }
48
49 /*!
50 * \fn uint32_t sedi_pm_get_lbw_clock(void)
51 * \brief Get current LBW clock frequency
52 * \return uint32_t current LBW clock frequency
53 * \ingroup sedi_soc_ish
54 */
sedi_pm_get_lbw_clock(void)55 static inline uint32_t sedi_pm_get_lbw_clock(void)
56 {
57 return SEDI_MHZ_TO_HZ(ISH_CONFIG_CLK_FREQUENCY_MHZ);
58 }
59
60 /*!
61 * \enum vnn_id_t
62 * \brief VNN ID bit for different drivers
63 * \ingroup sedi_soc_ish
64 */
65 typedef enum {
66 VNN_ID_FIRST = 0,
67 VNN_ID_AON_TASK = VNN_ID_FIRST,
68 VNN_ID_IPC_HOST_W,
69 VNN_ID_IPC_HOST_R,
70 VNN_ID_IPC_CSME_W,
71 VNN_ID_IPC_CSME_R,
72 VNN_ID_IPC_PMC_W = 5,
73 VNN_ID_IPC_PMC_R,
74 VNN_ID_DMA0,
75 VNN_ID_SIDEBAND,
76 VNN_ID_TOP,
77 } vnn_id_t;
78
79 #define VNN_ID_IPC_CSE_R VNN_ID_IPC_CSME_R
80 #define VNN_ID_IPC_CSE_W VNN_ID_IPC_CSME_W
81
82 #ifndef SEDI_PMU_BASE
83 #define SEDI_PMU_BASE (0x04200000)
84 #endif
85
86 #define PMU_VNN_REQ_31_0 (SEDI_PMU_BASE + 0x3c)
87 #define PMU_VNN_REQ_ACK (SEDI_PMU_BASE + 0x40)
88 #define PMU_VNN_REQ_ACK_STS BIT(0)
89
90 /*!
91 * \enum sedi_devid_t
92 * \brief SEDI device ID table
93 * \ingroup sedi_soc_ish
94 */
95 typedef enum {
96 SEDI_DEVID_FIRST = 0,
97 SEDI_DEVID_I2C0 = SEDI_DEVID_FIRST,
98 SEDI_DEVID_I2C1,
99 SEDI_DEVID_I2C2,
100 SEDI_DEVID_UART0,
101 SEDI_DEVID_UART1,
102 SEDI_DEVID_UART2,
103 SEDI_DEVID_GPIO0,
104 SEDI_DEVID_DMA0,
105 SEDI_DEVID_SPI0,
106 SEDI_DEVID_SPI1,
107 SEDI_DEVID_TOP
108 } sedi_devid_t;
109
110 /*!
111 * peripheral device id for dma handshake
112 */
113 typedef enum {
114 DMA_HWID_I2C0_RX = 0,
115 DMA_HWID_I2C0_TX = 1,
116 DMA_HWID_I2C1_RX = 2,
117 DMA_HWID_I2C1_TX = 3,
118 DMA_HWID_I2C2_RX = 4,
119 DMA_HWID_I2C2_TX = 5,
120 DMA_HWID_UART0_RX = 6,
121 DMA_HWID_UART0_TX = 7,
122 DMA_HWID_UART1_RX = 8,
123 DMA_HWID_UART1_TX = 9,
124 DMA_HWID_UART2_RX = 10,
125 DMA_HWID_UART2_TX = 11,
126 DMA_HWID_SPI0_RX = 12,
127 DMA_HWID_SPI0_TX = 13,
128 DMA_HWID_SPI1_RX = 14,
129 DMA_HWID_SPI1_TX = 15,
130 } dma_hs_per_dev_id_t;
131
132 /*!
133 * \brief check if a device is owned by SoC itself
134 * \param[in] dev: device id to check
135 * \return true/false
136 * \ingroup sedi_soc_ish
137 */
sedi_dev_is_self_owned(sedi_devid_t dev)138 static inline bool sedi_dev_is_self_owned(sedi_devid_t dev)
139 {
140 (void)dev;
141
142 return true;
143 }
144
145 /*!
146 * \brief Request VNN for a device
147 * \param[in] vnn_id: device id
148 * \return void
149 * \ingroup sedi_soc_ish
150 */
151 void PM_VNN_DRIVER_REQ(vnn_id_t vnn_id);
152
153 /*!
154 * \brief De-request VNN for a device
155 * \param[in] vnn_id: device id
156 * \return void
157 * \ingroup sedi_soc_ish
158 */
159 void PM_VNN_DRIVER_DEREQ(vnn_id_t vnn_id);
160
161 /*!
162 * \brief Reset VNN for all devices
163 * \return void
164 * \ingroup sedi_soc_ish
165 */
166 void PM_VNN_ALL_RESET(void);
167
168 /*!
169 * \brief Reset VNN for a device
170 * \param[in] vnn_id: device id
171 * \return void
172 * \ingroup sedi_soc_ish
173 */
174 void PM_VNN_DRIVER_RESET(vnn_id_t vnn_id);
175
176 #endif
177
