1 /*
2  * Copyright (c) 2019-2022 Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Licensed under the Apache License, Version 2.0 (the License); you may
7  * not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  * www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  */
18 
19 #ifndef ETHOSU_DEVICE_H
20 #define ETHOSU_DEVICE_H
21 
22 /******************************************************************************
23  * Includes
24  ******************************************************************************/
25 #include "ethosu_types.h"
26 
27 #include <stdbool.h>
28 #include <stdint.h>
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
34 /******************************************************************************
35  * Defines
36  ******************************************************************************/
37 
38 // NOTE: Deprecated
39 #ifndef ETHOSU_PMU_NCOUNTERS
40 #define ETHOSU_PMU_NCOUNTERS 4
41 #endif
42 
43 /******************************************************************************
44  * Types
45  ******************************************************************************/
46 struct NPU_REG; // Forward declare, to be implemented by each device
47 
48 struct ethosu_device
49 {
50     volatile struct NPU_REG *reg; // Register map
51     uint32_t secure;
52     uint32_t privileged;
53 };
54 
55 /******************************************************************************
56  * Prototypes
57  ******************************************************************************/
58 
59 /**
60  * Initialize the device.
61  */
62 struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_enable, uint32_t privilege_enable);
63 
64 /**
65  * Deinitialize the device.
66  */
67 void ethosu_dev_deinit(struct ethosu_device *dev);
68 
69 /**
70  * Initialize AXI settings for device.
71  */
72 enum ethosu_error_codes ethosu_dev_axi_init(struct ethosu_device *dev);
73 
74 /**
75  * Execute a given command stream on NPU.
76  * \param[in] cmd_stream_ptr   Pointer to the command stream
77  * \param[in] cms_length       Command stream length
78  * \param[in] base_addr        Pointer to array of base addresses
79  *                             - 0: weight tensor
80  *                             - 1: scratch tensor
81  *                             - All input tensors
82  *                             - All output tensors
83  * \param[in] num_base_addr    Number of base addresses.
84  */
85 void ethosu_dev_run_command_stream(struct ethosu_device *dev,
86                                    const uint8_t *cmd_stream_ptr,
87                                    uint32_t cms_length,
88                                    const uint64_t *base_addr,
89                                    int num_base_addr);
90 
91 /**
92  * Print information on NPU error status
93  */
94 void ethosu_dev_print_err_status(struct ethosu_device *dev);
95 
96 /**
97  *  Interrupt handler on device layer
98  * \return                     true if NPU status is OK, otherwise false
99  */
100 bool ethosu_dev_handle_interrupt(struct ethosu_device *dev);
101 
102 /**
103  * Get hardware information from NPU
104  * \param[out] hwinfo          Pointer to the hardware info struct to be filled in.
105  */
106 void ethosu_dev_get_hw_info(struct ethosu_device *dev, struct ethosu_hw_info *hwinfo);
107 
108 /**
109  * Verify that requested security state and privilege mode are active
110  * \return                     32 bit status value
111  */
112 bool ethosu_dev_verify_access_state(struct ethosu_device *dev);
113 
114 /**
115  * Performs a NPU soft reset and waits for the NPU to become ready
116  * \return                     \ref ethosu_error_codes
117  */
118 enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev);
119 
120 /**
121  * Enable/disable clock and power using clock/power q interface.
122  * \param[in] clock_q          Clock q ENABLE/DISABLE \ref clock_q_request.
123  * \param[in] power_q          Power q ENABLE/DISABLE \ref power_q_request.
124  * \return                     \ref ethosu_error_codes
125  */
126 enum ethosu_error_codes ethosu_dev_set_clock_and_power(struct ethosu_device *dev,
127                                                        enum ethosu_clock_q_request clock_q,
128                                                        enum ethosu_power_q_request power_q);
129 
130 /**
131  * Verifies that optimizer parameters from model are compatible with the hardware
132  * \param[in] cfg              Config data from optimizer.
133  * \param[in] id               Id data from optimizer.
134  * \return                     true if parameters match with hardware, false otherwise.
135  */
136 bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_in, uint32_t id_in);
137 
138 #ifdef __cplusplus
139 }
140 #endif
141 
142 #endif // ETHOSU_DEVICE_H
143