1 /**
2 ******************************************************************************
3 * @file stm32h5xx_hal_pwr_ex.c
4 * @author MCD Application Team
5 * @brief Extended PWR HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Power Controller extension peripheral :
8 * + Power Supply Control Functions
9 * + Low Power Control Functions
10 * + Voltage Monitoring Functions
11 * + Memories Retention Functions
12 * + I/O Pull-Up Pull-Down Configuration Functions
13 ******************************************************************************
14 * @attention
15 *
16 * Copyright (c) 2022 STMicroelectronics.
17 * All rights reserved.
18 *
19 * This software is licensed under terms that can be found in the LICENSE file
20 * in the root directory of this software component.
21 * If no LICENSE file comes with this software, it is provided AS-IS.
22 *
23 ******************************************************************************
24 */
25
26 /* Includes ------------------------------------------------------------------*/
27 #include "stm32h5xx_hal.h"
28
29 /** @addtogroup STM32H5xx_HAL_Driver
30 * @{
31 */
32
33 /** @defgroup PWREx PWREx
34 * @brief PWR Extended HAL module driver
35 * @{
36 */
37
38 #if defined (HAL_PWR_MODULE_ENABLED)
39
40 /* Private typedef -----------------------------------------------------------*/
41 /* Private define ------------------------------------------------------------*/
42
43 /** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines
44 * @{
45 */
46 /* PORTI pins mask */
47 #define PWR_PORTI_AVAILABLE_PINS (0xFFU)
48 /*!< Time out value of flags setting */
49 #define PWR_FLAG_SETTING_DELAY (0x32U)
50
51 /** @defgroup PWR_PVM_Mode_Mask PWR PVM Mode Mask
52 * @{
53 */
54 #define PVM_RISING_EDGE (0x01U) /*!< Mask for rising edge set as PVM
55 trigger */
56 #define PVM_FALLING_EDGE (0x02U) /*!< Mask for falling edge set as PVM
57 trigger */
58 #define PVM_MODE_IT (0x04U) /*!< Mask for interruption yielded by PVM
59 threshold crossing */
60 #define PVM_MODE_EVT (0x08U) /*!< Mask for event yielded by PVM threshold
61 crossing */
62 /**
63 * @}
64 */
65
66 /** @defgroup PWREx_WakeUp_Pins_Offsets PWREx Wake-Up Pins offsets
67 * @{
68 */
69
70 /* Wake-Up Pins PWR Pin Pull shift offsets */
71 #define PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET (2U)
72
73 /**
74 * @}
75 */
76
77 /**
78 * @}
79 */
80
81 /* Private macro -------------------------------------------------------------*/
82 /* Private variables ---------------------------------------------------------*/
83 /* Private function prototypes -----------------------------------------------*/
84 /* Exported functions --------------------------------------------------------*/
85
86 /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions
87 * @{
88 */
89
90 /** @defgroup PWREx_Exported_Functions_Group1 Power Supply Control Functions
91 * @brief Power supply control functions
92 *
93 @verbatim
94 ===============================================================================
95 ##### Power supply control functions #####
96 ===============================================================================
97 [..]
98 @endverbatim
99 * @{
100 */
101
102 /**
103 * @brief Configure the system Power Supply.
104 * @param SupplySource : Specifies the Power Supply source to set after a
105 * system startup.
106 * This parameter can be one of the following values :
107 * @arg PWR_EXTERNAL_SOURCE_SUPPLY : The SMPS and the LDO are
108 * Bypassed. The Vcore Power
109 * Domains are supplied from
110 * external source.
111 * @retval HAL status.
112 */
HAL_PWREx_ConfigSupply(uint32_t SupplySource)113 HAL_StatusTypeDef HAL_PWREx_ConfigSupply(uint32_t SupplySource)
114 {
115 uint32_t tickstart;
116
117 /* Check the parameters */
118 assert_param(IS_PWR_SUPPLY(SupplySource));
119
120 if ((PWR->SCCR & PWR_SCCR_BYPASS) != (PWR_SCCR_BYPASS))
121 {
122 /* Set the power supply configuration */
123 MODIFY_REG(PWR->SCCR, PWR_SUPPLY_CONFIG_MASK, SupplySource);
124
125 /* Get tick */
126 tickstart = HAL_GetTick();
127
128 /* Wait till voltage level flag is set */
129 while (__HAL_PWR_GET_FLAG(PWR_FLAG_ACTVOSRDY) == 0U)
130 {
131 if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
132 {
133 return HAL_ERROR;
134 }
135 }
136 }
137
138 return HAL_OK;
139 }
140
141 /**
142 * @brief Get the power supply configuration.
143 * @retval The supply configuration.
144 */
HAL_PWREx_GetSupplyConfig(void)145 uint32_t HAL_PWREx_GetSupplyConfig(void)
146 {
147 return (PWR->SCCR & PWR_SUPPLY_CONFIG_MASK);
148 }
149
150 /**
151 * @brief Configure the main internal regulator output voltage.
152 * @param VoltageScaling : Specifies the regulator output voltage to achieve
153 * a tradeoff between performance and power
154 * consumption.
155 * This parameter can be one of the following values :
156 * @arg PWR_REGULATOR_VOLTAGE_SCALE0 : Regulator voltage output
157 * Scale 0 mode.
158 * @arg PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage output
159 * range 1 mode.
160 * @arg PWR_REGULATOR_VOLTAGE_SCALE2 : Regulator voltage output
161 * range 2 mode.
162 * @arg PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output
163 * range 3 mode.
164 * @retval HAL Status
165 */
HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)166 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
167 {
168 uint32_t tickstart = HAL_GetTick();
169
170 /* Check the parameters */
171 assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
172
173 /* Get the voltage scaling */
174 if ((PWR->VOSSR & PWR_VOSSR_ACTVOS) == VoltageScaling)
175 {
176 /* Old and new voltage scaling configuration match : nothing to do */
177 return HAL_OK;
178 }
179
180 /* Set the voltage range */
181 MODIFY_REG(PWR->VOSCR, PWR_VOSCR_VOS, VoltageScaling);
182
183 /* Wait till voltage level flag is set */
184 while (__HAL_PWR_GET_FLAG(PWR_FLAG_ACTVOSRDY) == 0U)
185 {
186 if ((HAL_GetTick() - tickstart) > PWR_FLAG_SETTING_DELAY)
187 {
188 return HAL_ERROR;
189 }
190 }
191
192 return HAL_OK;
193 }
194
195 /**
196 * @brief Get the main internal regulator output voltage. Reflecting the last
197 * VOS value applied to the PMU.
198 * @retval The current applied VOS selection.
199 */
HAL_PWREx_GetVoltageRange(void)200 uint32_t HAL_PWREx_GetVoltageRange(void)
201 {
202 /* Get the active voltage scaling */
203 return (PWR->VOSSR & PWR_VOSSR_ACTVOS);
204 }
205
206 /**
207 * @brief Configure the main internal regulator output voltage in STOP mode.
208 * @param VoltageScaling : Specifies the regulator output voltage when the
209 * system enters Stop mode to achieve a tradeoff between performance
210 * and power consumption.
211 * This parameter can be one of the following values:
212 * @arg PWR_REGULATOR_SVOS_SCALE3 : Regulator voltage output range
213 * 3 mode.
214 * @arg PWR_REGULATOR_SVOS_SCALE4 : Regulator voltage output range
215 * 4 mode.
216 * @arg PWR_REGULATOR_SVOS_SCALE5 : Regulator voltage output range
217 * 5 mode.
218 * @note The Stop mode voltage scaling for SVOS4 and SVOS5 sets the voltage
219 * regulator in Low-power (LP) mode to further reduce power consumption.
220 * When preselecting SVOS3, the use of the voltage regulator low-power
221 * mode (LP) can be selected by LPDS register bit.
222 * @note The selected SVOS4 and SVOS5 levels add an additional startup delay
223 * when exiting from system Stop mode.
224 * @retval HAL Status.
225 */
HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling)226 HAL_StatusTypeDef HAL_PWREx_ControlStopModeVoltageScaling(uint32_t VoltageScaling)
227 {
228 /* Check the parameters */
229 assert_param(IS_PWR_STOP_MODE_REGULATOR_VOLTAGE(VoltageScaling));
230
231 /* Return the stop mode voltage range */
232 MODIFY_REG(PWR->PMCR, PWR_PMCR_SVOS, VoltageScaling);
233
234 return HAL_OK;
235 }
236
237 /**
238 * @brief Get the main internal regulator output voltage in STOP mode.
239 * @retval The actual applied VOS selection.
240 */
HAL_PWREx_GetStopModeVoltageRange(void)241 uint32_t HAL_PWREx_GetStopModeVoltageRange(void)
242 {
243 /* Return the stop voltage scaling */
244 return (PWR->PMCR & PWR_PMCR_SVOS);
245 }
246 /**
247 * @}
248 */
249
250 /** @defgroup PWREx_Exported_Functions_Group2 Voltage Monitoring Functions
251 * @brief Voltage monitoring functions
252 *
253 @verbatim
254 ===============================================================================
255 ##### Voltage Monitoring Functions #####
256 ===============================================================================
257 [..]
258 @endverbatim
259 * @{
260 */
261
262 /**
263 * @brief Configure the event mode and the voltage threshold detected by the
264 * Analog Voltage Detector (AVD).
265 * @param sConfigAVD : Pointer to an PWREx_AVDTypeDef structure that contains
266 * the configuration information for the AVD.
267 * @note Refer to the electrical characteristics of your device datasheet for
268 * more details about the voltage threshold corresponding to each
269 * detection level.
270 * @retval None.
271 */
HAL_PWREx_ConfigAVD(PWREx_AVDTypeDef * sConfigAVD)272 void HAL_PWREx_ConfigAVD(PWREx_AVDTypeDef *sConfigAVD)
273 {
274 /* Check the parameters */
275 assert_param(IS_PWR_AVD_LEVEL(sConfigAVD->AVDLevel));
276 assert_param(IS_PWR_AVD_MODE(sConfigAVD->Mode));
277
278 /* Set the ALS[10:9] bits according to AVDLevel value */
279 MODIFY_REG(PWR->VMCR, PWR_VMCR_ALS, sConfigAVD->AVDLevel);
280
281 /* Clear any previous config */
282 __HAL_PWR_AVD_EXTI_DISABLE_EVENT();
283 __HAL_PWR_AVD_EXTI_DISABLE_IT();
284 __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE();
285 __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE();
286
287 /* Configure the interrupt mode */
288 if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
289 {
290 __HAL_PWR_AVD_EXTI_ENABLE_IT();
291 }
292
293 /* Configure the event mode */
294 if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
295 {
296 __HAL_PWR_AVD_EXTI_ENABLE_EVENT();
297 }
298
299 /* Rising edge configuration */
300 if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
301 {
302 __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE();
303 }
304
305 /* Falling edge configuration */
306 if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
307 {
308 __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE();
309 }
310 }
311
312 /**
313 * @brief Enable the Analog Voltage Detector (AVD).
314 * @retval None.
315 */
HAL_PWREx_EnableAVD(void)316 void HAL_PWREx_EnableAVD(void)
317 {
318 /* Enable the Analog Voltage Detector */
319 SET_BIT(PWR->VMCR, PWR_VMCR_AVDEN);
320 }
321
322 /**
323 * @brief Disable the Analog Voltage Detector(AVD).
324 * @retval None.
325 */
HAL_PWREx_DisableAVD(void)326 void HAL_PWREx_DisableAVD(void)
327 {
328 /* Disable the Analog Voltage Detector */
329 CLEAR_BIT(PWR->VMCR, PWR_VMCR_AVDEN);
330 }
331
332 #if defined (PWR_USBSCR_USB33DEN)
333 /**
334 * @brief Enable the USB voltage level detector.
335 * @retval None.
336 */
HAL_PWREx_EnableUSBVoltageDetector(void)337 void HAL_PWREx_EnableUSBVoltageDetector(void)
338 {
339 /* Enable the USB voltage detector */
340 SET_BIT(PWR->USBSCR, PWR_USBSCR_USB33DEN);
341 }
342
343 /**
344 * @brief Disable the USB voltage level detector.
345 * @retval None.
346 */
HAL_PWREx_DisableUSBVoltageDetector(void)347 void HAL_PWREx_DisableUSBVoltageDetector(void)
348 {
349 /* Disable the USB voltage detector */
350 CLEAR_BIT(PWR->USBSCR, PWR_USBSCR_USB33DEN);
351 }
352 #endif /* PWR_USBSCR_USB33DEN */
353
354 #if defined (PWR_USBSCR_USB33SV)
355 /**
356 * @brief Enable VDDUSB supply.
357 * @note Remove VDDUSB electrical and logical isolation, once VDDUSB supply
358 * is present for consumption saving.
359 * @retval None.
360 */
HAL_PWREx_EnableVddUSB(void)361 void HAL_PWREx_EnableVddUSB(void)
362 {
363 SET_BIT(PWR->USBSCR, PWR_USBSCR_USB33SV);
364 }
365
366 /**
367 * @brief Disable VDDUSB supply.
368 * @retval None.
369 */
HAL_PWREx_DisableVddUSB(void)370 void HAL_PWREx_DisableVddUSB(void)
371 {
372 CLEAR_BIT(PWR->USBSCR, PWR_USBSCR_USB33SV);
373 }
374 #endif /* PWR_USBSCR_USB33SV */
375
376 /**
377 * @brief Enable the VBAT and temperature monitoring.
378 * @retval None.
379 */
HAL_PWREx_EnableMonitoring(void)380 void HAL_PWREx_EnableMonitoring(void)
381 {
382 SET_BIT(PWR->BDCR, PWR_BDCR_MONEN);
383 }
384
385 /**
386 * @brief Disable the VBAT and temperature monitoring.
387 * @retval None.
388 */
HAL_PWREx_DisableMonitoring(void)389 void HAL_PWREx_DisableMonitoring(void)
390 {
391 CLEAR_BIT(PWR->BDCR, PWR_BDCR_MONEN);
392 }
393
394 #if defined (PWR_UCPDR_UCPD_STBY)
395 /**
396 * @brief Enable UCPD configuration memorization in Standby mode.
397 * @retval None.
398 */
HAL_PWREx_EnableUCPDStandbyMode(void)399 void HAL_PWREx_EnableUCPDStandbyMode(void)
400 {
401 SET_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_STBY);
402 }
403
404 /**
405 * @brief Disable UCPD configuration memorization in Standby mode.
406 * @note This function must be called on exiting the Standby mode and before
407 * any UCPD configuration update.
408 * @retval None.
409 */
HAL_PWREx_DisableUCPDStandbyMode(void)410 void HAL_PWREx_DisableUCPDStandbyMode(void)
411 {
412 CLEAR_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_STBY);
413 }
414 #endif /* PWR_UCPDR_UCPD_STBY */
415
416 #if defined (PWR_UCPDR_UCPD_DBDIS)
417 /**
418 * @brief Enable dead battery behavior.
419 * @note After exiting reset, the USB Type-C (dead battery) behavior is
420 * enabled, which may have a pull-down effect on CC1 and CC2 pins.
421 * It is recommended to disable it in all cases, either to stop this
422 * pull-down or to handover control to the UCPD (the UCPD must be
423 * initialized before doing the disable).
424 * @retval None.
425 */
HAL_PWREx_EnableUCPDDeadBattery(void)426 void HAL_PWREx_EnableUCPDDeadBattery(void)
427 {
428 CLEAR_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_DBDIS);
429 }
430
431 /**
432 * @brief Disable dead battery behavior.
433 * @note After exiting reset, the USB Type-C (dead battery) behavior is
434 * enabled, which may have a pull-down effect on CC1 and CC2 pins.
435 * It is recommended to disable it in all cases, either to stop this
436 * pull-down or to handover control to the UCPD (the UCPD must be
437 * initialized before doing the disable).
438 * @retval None.
439 */
HAL_PWREx_DisableUCPDDeadBattery(void)440 void HAL_PWREx_DisableUCPDDeadBattery(void)
441 {
442 SET_BIT(PWR->UCPDR, PWR_UCPDR_UCPD_DBDIS);
443 }
444 #endif /* PWR_UCPDR_UCPD_DBDIS */
445
446 /**
447 * @brief Enable the Battery charging.
448 * @note When VDD is present, charge the external battery through an internal
449 * resistor.
450 * @param ResistorValue : Specifies the charging resistor.
451 * This parameter can be one of the following values :
452 * @arg PWR_BATTERY_CHARGING_RESISTOR_5 : 5 KOhm resistor.
453 * @arg PWR_BATTERY_CHARGING_RESISTOR_1_5 : 1.5 KOhm resistor.
454 * @retval None.
455 */
HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue)456 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorValue)
457 {
458 /* Check the parameter */
459 assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorValue));
460
461 /* Specify the charging resistor */
462 MODIFY_REG(PWR->BDCR, PWR_BDCR_VBRS, ResistorValue);
463
464 /* Enable the Battery charging */
465 SET_BIT(PWR->BDCR, PWR_BDCR_VBE);
466 }
467
468 /**
469 * @brief Disable the Battery charging.
470 * @retval None.
471 */
HAL_PWREx_DisableBatteryCharging(void)472 void HAL_PWREx_DisableBatteryCharging(void)
473 {
474 CLEAR_BIT(PWR->BDCR, PWR_BDCR_VBE);
475 }
476
477 /**
478 * @brief Enable the booster to guarantee the analog switch AC performance when
479 * the VDD supply voltage is below 2V7.
480 * @note The VDD supply voltage can be monitored through the PVD and the PLS
481 * field bits.
482 * @retval None.
483 */
HAL_PWREx_EnableAnalogBooster(void)484 void HAL_PWREx_EnableAnalogBooster(void)
485 {
486 /* Enable the Analog voltage */
487 SET_BIT(PWR->PMCR, PWR_PMCR_AVD_READY);
488
489 /* Enable VDDA booster */
490 SET_BIT(PWR->PMCR, PWR_PMCR_BOOSTE);
491 }
492
493 /**
494 * @brief Disable the analog booster.
495 * @retval None.
496 */
HAL_PWREx_DisableAnalogBooster(void)497 void HAL_PWREx_DisableAnalogBooster(void)
498 {
499 /* Disable VDDA booster */
500 CLEAR_BIT(PWR->PMCR, PWR_PMCR_BOOSTE);
501
502 /* Disable the Analog voltage */
503 CLEAR_BIT(PWR->PMCR, PWR_PMCR_AVD_READY);
504 }
505
506 /**
507 * @brief This function handles the PWR PVD/AVD interrupt request.
508 * @note This API should be called under the PVD_AVD_IRQHandler().
509 * @retval None
510 */
HAL_PWREx_PVD_AVD_IRQHandler(void)511 void HAL_PWREx_PVD_AVD_IRQHandler(void)
512 {
513 /* Check if the Programmable Voltage Detector is enabled (PVD) */
514 if (READ_BIT(PWR->VMCR, PWR_VMCR_PVDEN) != 0U)
515 {
516 /* Check PWR EXTI Rising flag */
517 if (__HAL_PWR_PVD_EXTI_GET_RISING_FLAG() != 0U)
518 {
519 /* PWR PVD interrupt user callback */
520 HAL_PWR_PVDCallback();
521
522 /* Clear PWR EXTI pending bit */
523 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
524 }
525
526 /* Check PWR EXTI Falling flag */
527 if (__HAL_PWR_PVD_EXTI_GET_FALLING_FLAG() != 0U)
528 {
529 /* PWR PVD interrupt user callback */
530 HAL_PWR_PVDCallback();
531
532 /* Clear PWR EXTI pending bit */
533 __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
534 }
535 }
536
537 /* Check if the Analog Voltage Detector is enabled (AVD) */
538 if (READ_BIT(PWR->VMCR, PWR_VMCR_AVDEN) != 0U)
539 {
540 /* Check PWR EXTI flag */
541 if (__HAL_PWR_AVD_EXTI_GET_RISING_FLAG() != 0U)
542 {
543 /* PWR AVD interrupt user callback */
544 HAL_PWREx_AVDCallback();
545
546 /* Clear PWR EXTI pending bit */
547 __HAL_PWR_AVD_EXTI_CLEAR_FLAG();
548 }
549
550 /* Check PWR EXTI flag */
551 if (__HAL_PWR_AVD_EXTI_GET_FALLING_FLAG() != 0U)
552 {
553 /* PWR AVD interrupt user callback */
554 HAL_PWREx_AVDCallback();
555
556 /* Clear PWR EXTI pending bit */
557 __HAL_PWR_AVD_EXTI_CLEAR_FLAG();
558 }
559 }
560 }
561
562 /**
563 * @brief PWR AVD interrupt callback.
564 * @retval None.
565 */
HAL_PWREx_AVDCallback(void)566 __weak void HAL_PWREx_AVDCallback(void)
567 {
568 /* NOTE : This function should not be modified, when the callback is needed,
569 the HAL_PWR_AVDCallback can be implemented in the user file
570 */
571 }
572 /**
573 * @}
574 */
575
576 /** @defgroup PWREx_Exported_Functions_Group3 Wakeup Pins configuration functions
577 * @brief Low power control functions
578 *
579 @verbatim
580 ===============================================================================
581 ##### Wakeup Pins configuration functions #####
582 ===============================================================================
583 [..]
584 @endverbatim
585 * @{
586 */
587
588 /**
589 * @brief Enable the Wake-up PINx functionality.
590 * @param sPinParams : Pointer to a PWREx_WakeupPinTypeDef structure that
591 * contains the configuration information for the wake-up
592 * Pin.
593 * @retval None.
594 */
HAL_PWREx_EnableWakeUpPin(PWREx_WakeupPinTypeDef * sPinParams)595 void HAL_PWREx_EnableWakeUpPin(PWREx_WakeupPinTypeDef *sPinParams)
596 {
597 uint32_t pinConfig;
598 uint32_t regMask;
599 const uint32_t pullMask = PWR_WUCR_WUPPUPD1;
600
601 /* Check the parameters */
602 assert_param(IS_PWR_WAKEUP_PIN(sPinParams->WakeUpPin));
603 assert_param(IS_PWR_WAKEUP_PIN_POLARITY(sPinParams->PinPolarity));
604 assert_param(IS_PWR_WAKEUP_PIN_PULL(sPinParams->PinPull));
605
606 pinConfig = sPinParams->WakeUpPin | \
607 (sPinParams->PinPolarity << ((POSITION_VAL(sPinParams->WakeUpPin) + PWR_WUCR_WUPP1_Pos) & 0x1FU)) | \
608 (sPinParams->PinPull << (((POSITION_VAL(sPinParams->WakeUpPin) * PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET) \
609 + PWR_WUCR_WUPPUPD1_Pos) & 0x1FU));
610
611 regMask = sPinParams->WakeUpPin | \
612 (PWR_WUCR_WUPP1 << (POSITION_VAL(sPinParams->WakeUpPin) & 0x1FU)) | \
613 (pullMask << ((POSITION_VAL(sPinParams->WakeUpPin) * PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET) & 0x1FU));
614
615 /* Enable and Specify the Wake-Up pin polarity and the pull configuration
616 for the event detection (rising or falling edge) */
617 MODIFY_REG(PWR->WUCR, regMask, pinConfig);
618 }
619
620 /**
621 * @brief Disable the Wake-up PINx functionality.
622 * @param WakeUpPinx : Specifies the Wake-Up pin to be disabled.
623 * This parameter can be one of the following values:
624 * @arg PWR_WAKEUP_PIN1
625 * @arg PWR_WAKEUP_PIN2
626 * @arg PWR_WAKEUP_PIN3
627 * @arg PWR_WAKEUP_PIN4
628 * @arg PWR_WAKEUP_PIN5
629 * @arg PWR_WAKEUP_PIN6
630 * @arg PWR_WAKEUP_PIN7
631 * @arg PWR_WAKEUP_PIN8
632 * @note The PWR_WAKEUP_PIN6, PWR_WAKEUP_PIN7 and PWR_WAKEUP_PIN7 are not available for
633 * STM32H503xx devices.
634 * @retval None
635 */
HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPinx)636 void HAL_PWREx_DisableWakeUpPin(uint32_t WakeUpPinx)
637 {
638 /* Check the parameter */
639 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
640
641 /* Disable the WakeUpPin */
642 CLEAR_BIT(PWR->WUCR, (PWR_WUCR_WUPEN & WakeUpPinx));
643 }
644
645 /**
646 * @}
647 */
648
649 /** @defgroup PWREx_Exported_Functions_Group4 Memories Retention Functions
650 * @brief Memories retention functions
651 *
652 @verbatim
653 ===============================================================================
654 ##### Memories Retention Functions #####
655 ===============================================================================
656 [..]
657 @endverbatim
658 * @{
659 */
660
661 /**
662 * @brief Enable the Flash Power Down in Stop mode.
663 * @note When Flash Power Down is enabled the Flash memory enters low-power
664 * mode. This feature allows to
665 * obtain the best trade-off between low-power consumption and restart
666 * time when exiting from Stop mode.
667 * @retval None.
668 */
HAL_PWREx_EnableFlashPowerDown(void)669 void HAL_PWREx_EnableFlashPowerDown(void)
670 {
671 /* Enable the Flash Power Down */
672 SET_BIT(PWR->PMCR, PWR_PMCR_FLPS);
673 }
674
675 /**
676 * @brief Disable the Flash Power Down in Stop mode.
677 * @note When Flash Power Down is disabled the Flash memory is kept on
678 * normal mode. This feature allows
679 * to obtain the best trade-off between low-power consumption and
680 * restart time when exiting from Stop mode.
681 * @retval None.
682 */
HAL_PWREx_DisableFlashPowerDown(void)683 void HAL_PWREx_DisableFlashPowerDown(void)
684 {
685 /* Disable the Flash Power Down */
686 CLEAR_BIT(PWR->PMCR, PWR_PMCR_FLPS);
687 }
688
689 /**
690 * @brief Enable memory block shut-off in Stop mode
691 * @note In Stop mode, the content of the memory blocks is
692 * maintained. Further power optimization can be obtained by switching
693 * off some memory blocks. This optimization implies loss of the memory
694 * content. The user can select which memory is discarded during STOP
695 * mode by means of xxSO bits.
696 * @param MemoryBlock : Specifies the memory block to shut-off during Stop mode.
697 * This parameter can be one of the following values:
698 * @arg PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO : Ethernet shut-off control in Stop mode
699 * @arg PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO : RAM3 shut-off control in Stop mode
700 * @arg PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO : RAM2 16k byte shut-off control in Stop mode
701 * @arg PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO : RAM2 48k byte shut-off control in Stop mode
702 * @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
703 * @note The PWR_ETHERNET_MEMORY_BLOCK is not available for STM32H503xx devices.
704 * @retval None.
705 */
HAL_PWREx_EnableMemoryShutOff(uint32_t MemoryBlock)706 void HAL_PWREx_EnableMemoryShutOff(uint32_t MemoryBlock)
707 {
708 /* Check the parameter */
709 assert_param(IS_PWR_MEMORY_BLOCK(MemoryBlock));
710
711 /* Enable memory block shut-off */
712 SET_BIT(PWR->PMCR, MemoryBlock);
713 }
714
715 /**
716 * @brief Disable memory block shut-off in Stop mode
717 * @param MemoryBlock : Specifies the memory block to keep content during
718 * Stop mode.
719 * This parameter can be one of the following values:
720 * @arg PWR_ETHERNET_MEMORY_BLOCK PWR_PMCR_ETHERNETSO : Ethernet shut-off control in Stop mode
721 * @arg PWR_RAM3_MEMORY_BLOCK PWR_PMCR_SRAM3SO : RAM3 shut-off control in Stop mode
722 * @arg PWR_RAM2_16_MEMORY_BLOCK PWR_PMCR_SRAM2_16SO : RAM2 16k byte shut-off control in Stop mode
723 * @arg PWR_RAM2_48_MEMORY_BLOCK PWR_PMCR_SRAM2_48SO : RAM2 48k byte shut-off control in Stop mode
724 * @arg PWR_RAM1_MEMORY_BLOCK PWR_PMCR_SRAM1SO : RAM1 shut-off control in Stop mode
725 * @note The PWR_ETHERNET_MEMORY_BLOCK is not available for STM32H503xx devices.
726 * @retval None.
727 */
HAL_PWREx_DisableMemoryShutOff(uint32_t MemoryBlock)728 void HAL_PWREx_DisableMemoryShutOff(uint32_t MemoryBlock)
729 {
730 /* Check the parameter */
731 assert_param(IS_PWR_MEMORY_BLOCK(MemoryBlock));
732
733 /* Disable memory block shut-off */
734 CLEAR_BIT(PWR->PMCR, MemoryBlock);
735 }
736
737 /**
738 * @brief Enable the Backup RAM retention in Standby, Shutdown and VBAT modes.
739 * @note If BREN is reset, the backup RAM can still be used in Run, Sleep and
740 * Stop modes. However, its content is lost in Standby, Shutdown and
741 * VBAT modes. This bit can be writte
742 * @retval None.
743 */
HAL_PWREx_EnableBkupRAMRetention(void)744 HAL_StatusTypeDef HAL_PWREx_EnableBkupRAMRetention(void)
745 {
746 SET_BIT(PWR->BDCR, PWR_BDCR_BREN);
747
748 return HAL_OK;
749 }
750
751 /**
752 * @brief Disable the Backup RAM retention in Standby, Shutdown and VBAT modes.
753 * @note If BREN is reset, the backup RAM can still be used in Run, Sleep and
754 * Stop modes. However, its content is lost in Standby, Shutdown and
755 * VBAT modes. This bit can be write
756 * @retval None.
757 */
HAL_PWREx_DisableBkupRAMRetention(void)758 void HAL_PWREx_DisableBkupRAMRetention(void)
759 {
760 CLEAR_BIT(PWR->BDCR, PWR_BDCR_BREN);
761 }
762 /**
763 * @}
764 */
765
766 /** @defgroup PWREx_Exported_Functions_Group5 IO/JTAG Retention Functions
767 * @brief IO/JTAG Retention Functions
768 *
769 @verbatim
770 ===============================================================================
771 ##### IO/JTAG Retention Functions #####
772 ===============================================================================
773 [..]
774 In the Standby mode, the I/Os are by default in floating state. If the IORETEN bit in the
775 PWR_IORETR register is set, the I/Os output state is retained. IO Retention mode is
776 enabled for all IO except the IO support the standby functionality and JTAG IOs (PA13,
777 PA14, PA15 and PB4). When entering into Standby mode, the state of the output is
778 sampled, and pull-up or pull-down resistor are set to maintain the IO output during Standby
779 mode.
780 If the JTAGIORETEN bit in the PWR_IORETR register is set, the I/Os output state is
781 retained. IO Retention mode is enabled for PA13, PA14, PA15 and PB4 (default JTAG pullup/
782 pull-down after wakeup are not enabled).
783 @endverbatim
784 * @{
785 */
786
787 /**
788 * @brief Enable GPIO state retention in Standby mode.
789 * @note When entering into standby mode, the output is sampled, and applied to the output IO during
790 * the standby power mode
791 * @retval None.
792 */
HAL_PWREx_EnableStandbyIORetention(void)793 void HAL_PWREx_EnableStandbyIORetention(void)
794 {
795 /* Enable the Flash Power Down */
796 SET_BIT(PWR->IORETR, PWR_IORETR_IORETREN);
797 }
798
799 /**
800 * @brief Disable GPIO state retention in Standby mode.
801 * @retval None.
802 */
HAL_PWREx_DisableStandbyIORetention(void)803 void HAL_PWREx_DisableStandbyIORetention(void)
804 {
805 /* Disable the Flash Power Down */
806 CLEAR_BIT(PWR->IORETR, PWR_IORETR_IORETREN);
807 }
808
809 /**
810 * @brief Enable JTAG IOs state retention in Standby mode.
811 * @note when entering into standby mode, the output is sampled, and applied to the output IO during
812 * the standby power mode
813 * @retval None.
814 */
HAL_PWREx_EnableStandbyJTAGIORetention(void)815 void HAL_PWREx_EnableStandbyJTAGIORetention(void)
816 {
817 /* Enable the Flash Power Down */
818 SET_BIT(PWR->IORETR, PWR_IORETR_JTAGIORETEN);
819 }
820
821 /**
822 * @brief Disable JTAG IOs state retention in Standby mode.
823 * @retval None.
824 */
HAL_PWREx_DisableStandbyJTAGIORetention(void)825 void HAL_PWREx_DisableStandbyJTAGIORetention(void)
826 {
827 /* Disable the Flash Power Down */
828 CLEAR_BIT(PWR->IORETR, PWR_IORETR_JTAGIORETEN);
829 }
830
831 /**
832 * @}
833 */
834 #endif /* defined (HAL_PWR_MODULE_ENABLED) */
835
836 /**
837 * @}
838 */
839
840 /**
841 * @}
842 */
843
