1 /* 2 * Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef R_RSPI_H 8 #define R_RSPI_H 9 10 /*******************************************************************************************************************//** 11 * @addtogroup RSPI 12 * @{ 13 **********************************************************************************************************************/ 14 15 /*********************************************************************************************************************** 16 * Includes 17 **********************************************************************************************************************/ 18 #include "r_spi_api.h" 19 20 /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ 21 FSP_HEADER 22 23 /*********************************************************************************************************************** 24 * Macro definitions 25 **********************************************************************************************************************/ 26 27 /************************************************************************************************* 28 * Type defines for the RSPI interface API 29 *************************************************************************************************/ 30 31 /** Slave Select Polarity. */ 32 typedef enum e_rspi_ssl_polarity 33 { 34 RSPI_SSLP_LOW, ///< SSLP signal polarity active low 35 RSPI_SSLP_HIGH ///< SSLP signal polarity active high 36 } rspi_ssl_polarity_t; 37 38 /** MOSI Idle Behavior. */ 39 typedef enum e_rspi_mosi_idle_value_fixing 40 { 41 RSPI_MOSI_IDLE_VALUE_FIXING_DISABLE, ///< MOSI output value=value set in MOIFV bit 42 RSPI_MOSI_IDLE_VALUE_FIXING_LOW, ///< MOSIn level low during MOSI idling 43 RSPI_MOSI_IDLE_VALUE_FIXING_HIGH ///< MOSIn level high during MOSI idling 44 } rspi_mosi_idle_value_fixing_t; 45 46 /** SSL Signal Level Keeping Enable/Disable. */ 47 typedef enum e_rspi_ssl_level_keep 48 { 49 RSPI_SSL_LEVEL_KEEP_DISABLE, ///< Disable SSL Level Keep Mode 50 RSPI_SSL_LEVEL_KEEP_ENABLE ///< Enable SSL Level Keep Mode 51 } rspi_ssl_level_keep_t; 52 53 /** Delay count for SPI delay settings. */ 54 typedef enum e_rspi_delay_count 55 { 56 RSPI_DELAY_COUNT_1, ///< Set RSPCK delay count to 1 RSPCK 57 RSPI_DELAY_COUNT_2, ///< Set RSPCK delay count to 2 RSPCK 58 RSPI_DELAY_COUNT_3, ///< Set RSPCK delay count to 3 RSPCK 59 RSPI_DELAY_COUNT_4, ///< Set RSPCK delay count to 4 RSPCK 60 RSPI_DELAY_COUNT_5, ///< Set RSPCK delay count to 5 RSPCK 61 RSPI_DELAY_COUNT_6, ///< Set RSPCK delay count to 6 RSPCK 62 RSPI_DELAY_COUNT_7, ///< Set RSPCK delay count to 7 RSPCK 63 RSPI_DELAY_COUNT_8 ///< Set RSPCK delay count to 8 RSPCK 64 } rspi_delay_count_t; 65 66 /** Transmitter FIFO trigger level. */ 67 typedef enum 68 { 69 RSPI_TX_TRIGGER_7, ///< Trigger when 7 or less bytes in TX FIFO 70 RSPI_TX_TRIGGER_6, ///< Trigger when 6 or less bytes in TX FIFO 71 RSPI_TX_TRIGGER_4, ///< Trigger when 4 or less bytes in TX FIFO 72 RSPI_TX_TRIGGER_0, ///< Trigger when TX FIFO is empty 73 } rspi_tx_trigger_level_t; 74 75 /** Receiver FIFO trigger level. */ 76 typedef enum 77 { 78 RSPI_RX_TRIGGER_1, ///< Trigger when 1 or more bytes in RX FIFO 79 RSPI_RX_TRIGGER_2, ///< Trigger when 2 or more bytes in RX FIFO 80 RSPI_RX_TRIGGER_4, ///< Trigger when 4 or more bytes in RX FIFO 81 RSPI_RX_TRIGGER_8, ///< Trigger when 8 or more bytes in RX FIFO 82 RSPI_RX_TRIGGER_16, ///< Trigger when 16 or more bytes in RX FIFO 83 RSPI_RX_TRIGGER_24, ///< Trigger when 24 or more bytes in RX FIFO 84 RSPI_RX_TRIGGER_32, ///< Trigger when 32 or more bytes in RX FIFO 85 RSPI_RX_TRIGGER_5, ///< Trigger when 5 or more bytes in RX FIFO 86 } rspi_rx_trigger_level_t; 87 88 /** RSPI Clock Divider settings. */ 89 typedef struct 90 { 91 uint8_t spbr; ///< SPBR register setting 92 uint8_t brdv : 2; ///< BRDV setting in SPCMD0 93 } rspi_rspck_div_setting_t; 94 95 /** Extended RSPI interface configuration */ 96 typedef struct st_rspi_extended_cfg 97 { 98 rspi_ssl_polarity_t ssl_polarity; ///< Select SSLn signal polarity 99 rspi_mosi_idle_value_fixing_t mosi_idle; ///< Select MOSI idle fixed value and selection 100 rspi_rspck_div_setting_t spck_div; ///< Register values for configuring the RSPI Clock Divider. 101 rspi_delay_count_t spck_delay; ///< SPI Clock Delay Register Setting 102 rspi_delay_count_t ssl_negation_delay; ///< SPI Slave Select Negation Delay Register Setting 103 rspi_delay_count_t next_access_delay; ///< SPI Next-Access Delay Register Setting 104 rspi_ssl_level_keep_t ssl_level_keep; ///< Select SSL signal level keep mode 105 rspi_rx_trigger_level_t rx_trigger_level; ///< Receiver FIFO trigger level 106 rspi_tx_trigger_level_t tx_trigger_level; ///< Transmitter FIFO trigger level 107 } rspi_extended_cfg_t; 108 109 /** Channel control block. DO NOT INITIALIZE. Initialization occurs when @ref spi_api_t::open is called. */ 110 typedef struct st_rspi_instance_ctrl 111 { 112 uint32_t open; ///< Indicates whether the open() API has been successfully called. 113 spi_cfg_t const * p_cfg; ///< Pointer to instance configuration 114 rspi_extended_cfg_t * p_ext; ///< Pointer to extended configuration 115 R_RSPI0_Type * p_regs; ///< Base register for this channel 116 void const * p_tx_data; ///< Buffer to transmit 117 void * p_rx_data; ///< Buffer to receive 118 uint32_t tx_count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit) 119 uint32_t rx_count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit) 120 spi_bit_width_t bit_width; ///< Bits per Data frame (8-bit, 16-bit, 32-bit) 121 122 /* Pointer to callback and optional working memory */ 123 void (* p_callback)(spi_callback_args_t *); 124 spi_callback_args_t * p_callback_memory; 125 126 /* Pointer to context to be passed into callback function */ 127 void const * p_context; 128 uint32_t rxfifo_trigger_bytes; ///< Receive buffer data triggering number 129 volatile bool transfer_is_pending; ///< Transfer is pending 130 } rspi_instance_ctrl_t; 131 132 /********************************************************************************************************************** 133 * Exported global variables 134 **********************************************************************************************************************/ 135 136 /** @cond INC_HEADER_DEFS_SEC */ 137 /** Filled in Interface API structure for this Instance. */ 138 extern const spi_api_t g_spi_on_rspi; 139 140 /** @endcond */ 141 142 /*********************************************************************************************************************** 143 * Public APIs 144 **********************************************************************************************************************/ 145 fsp_err_t R_RSPI_Open(spi_ctrl_t * p_api_ctrl, spi_cfg_t const * const p_cfg); 146 147 fsp_err_t R_RSPI_Read(spi_ctrl_t * const p_api_ctrl, 148 void * p_dest, 149 uint32_t const length, 150 spi_bit_width_t const bit_width); 151 152 fsp_err_t R_RSPI_Write(spi_ctrl_t * const p_api_ctrl, 153 void const * p_src, 154 uint32_t const length, 155 spi_bit_width_t const bit_width); 156 157 fsp_err_t R_RSPI_WriteRead(spi_ctrl_t * const p_api_ctrl, 158 void const * p_src, 159 void * p_dest, 160 uint32_t const length, 161 spi_bit_width_t const bit_width); 162 163 fsp_err_t R_RSPI_Close(spi_ctrl_t * const p_api_ctrl); 164 165 fsp_err_t R_RSPI_CalculateBitrate(uint32_t bitrate, rspi_rspck_div_setting_t * spck_div); 166 167 fsp_err_t R_RSPI_CallbackSet(spi_ctrl_t * const p_api_ctrl, 168 void ( * p_callback)(spi_callback_args_t *), 169 void const * const p_context, 170 spi_callback_args_t * const p_callback_memory); 171 172 /*******************************************************************************************************************//** 173 * @} (end ingroup RSPI) 174 **********************************************************************************************************************/ 175 176 /** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ 177 FSP_FOOTER 178 179 #endif /* R_RSPI_H */ 180
