1 /*
2  * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifdef __ZEPHYR__
8 #include <zephyr/kernel.h>
9 #endif
10 
11 #include "regi2c_ctrl.h"
12 #include "esp_attr.h"
13 #include <stdint.h>
14 
15 static unsigned int mux;
16 
regi2c_ctrl_read_reg(uint8_t block,uint8_t host_id,uint8_t reg_add)17 uint8_t IRAM_ATTR regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add)
18 {
19     mux = irq_lock();
20     uint8_t value = i2c_read_reg_raw(block, host_id, reg_add);
21     irq_unlock(mux);
22     return value;
23 }
24 
regi2c_ctrl_read_reg_mask(uint8_t block,uint8_t host_id,uint8_t reg_add,uint8_t msb,uint8_t lsb)25 uint8_t IRAM_ATTR regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb)
26 {
27     mux = irq_lock();
28     uint8_t value = i2c_read_reg_mask_raw(block, host_id, reg_add, msb, lsb);
29     irq_unlock(mux);
30     return value;
31 }
32 
regi2c_ctrl_write_reg(uint8_t block,uint8_t host_id,uint8_t reg_add,uint8_t data)33 void IRAM_ATTR regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data)
34 {
35     mux = irq_lock();
36     i2c_write_reg_raw(block, host_id, reg_add, data);
37     irq_unlock(mux);
38 }
39 
regi2c_ctrl_write_reg_mask(uint8_t block,uint8_t host_id,uint8_t reg_add,uint8_t msb,uint8_t lsb,uint8_t data)40 void IRAM_ATTR regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data)
41 {
42     mux = irq_lock();
43     i2c_write_reg_mask_raw(block, host_id, reg_add, msb, lsb, data);
44     irq_unlock(mux);
45 }
46 
regi2c_enter_critical(void)47 void IRAM_ATTR regi2c_enter_critical(void)
48 {
49     mux = irq_lock();
50 }
51 
regi2c_exit_critical(void)52 void IRAM_ATTR regi2c_exit_critical(void)
53 {
54     irq_unlock(mux);
55 }
56 
57 /**
58  * Restore regi2c analog calibration related configuration registers.
59  * This is a workaround, and is fixed on later chips
60  */
61 #if REGI2C_ANA_CALI_PD_WORKAROUND
62 
63 static DRAM_ATTR uint8_t reg_val[REGI2C_ANA_CALI_BYTE_NUM];
64 
regi2c_analog_cali_reg_read(void)65 void IRAM_ATTR regi2c_analog_cali_reg_read(void)
66 {
67     for (int i = 0; i < REGI2C_ANA_CALI_BYTE_NUM; i++) {
68         reg_val[i] = regi2c_ctrl_read_reg(I2C_SAR_ADC, I2C_SAR_ADC_HOSTID, i);
69     }
70 }
71 
regi2c_analog_cali_reg_write(void)72 void IRAM_ATTR regi2c_analog_cali_reg_write(void)
73 {
74     for (int i = 0; i < REGI2C_ANA_CALI_BYTE_NUM; i++) {
75         regi2c_ctrl_write_reg(I2C_SAR_ADC, I2C_SAR_ADC_HOSTID, i, reg_val[i]);
76     }
77 }
78 
79 #endif   //#if ADC_CALI_PD_WORKAROUND
80