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Searched defs:reg_base (Results 1 – 16 of 16) sorted by relevance

/Zephyr-Core-3.5.0/drivers/i2c/
Di2c_dw.c60 uint32_t reg_base = get_regs(dev); in i2c_dw_enable_idma() local
91 uint32_t reg_base = get_regs(dev); in i2c_dw_set_fifo_th() local
206 uint32_t reg_base = get_regs(dev); in i2c_dw_data_ask() local
266 uint32_t reg_base = get_regs(dev); in i2c_dw_data_read() local
299 uint32_t reg_base = get_regs(dev); in i2c_dw_data_send() local
345 uint32_t reg_base = get_regs(dev); in i2c_dw_transfer_complete() local
365 uint32_t reg_base = get_regs(port); in i2c_dw_isr() local
496 uint32_t reg_base = get_regs(dev); in i2c_dw_setup() local
626 uint32_t reg_base = get_regs(dev); in i2c_dw_transfer() local
740 uint32_t reg_base = get_regs(dev); in i2c_dw_runtime_configure() local
[all …]
/Zephyr-Core-3.5.0/drivers/counter/
Dcounter_dw_timer.c87 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_irq_handler() local
117 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, timer_mmio); in counter_dw_timer_start() local
134 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, timer_mmio); in counter_dw_timer_disable() local
144 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_get_top_value() local
154 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_get_value() local
165 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_set_top_value() local
219 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_set_alarm() local
271 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_cancel_alarm() local
/Zephyr-Core-3.5.0/drivers/serial/
Duart_xlnx_ps.c180 static void xlnx_ps_disable_uart(uintptr_t reg_base) in xlnx_ps_disable_uart()
204 static void xlnx_ps_enable_uart(uintptr_t reg_base) in xlnx_ps_enable_uart()
233 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in set_baudrate() local
291 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_init() local
345 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_poll_in() local
372 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_poll_out() local
604 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_configure() local
809 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_config_get() local
845 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_fifo_fill() local
871 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_fifo_read() local
[all …]
/Zephyr-Core-3.5.0/drivers/gpio/
Dgpio_altera_pio.c24 uintptr_t reg_base; member
44 uintptr_t reg_base = cfg->reg_base; in gpio_pin_direction() local
75 uintptr_t reg_base = cfg->reg_base; in gpio_altera_configure() local
109 uintptr_t reg_base = cfg->reg_base; in gpio_altera_port_get_raw() local
129 uintptr_t reg_base = cfg->reg_base; in gpio_altera_port_set_bits_raw() local
162 uintptr_t reg_base = cfg->reg_base; in gpio_altera_port_clear_bits_raw() local
209 uintptr_t reg_base = cfg->reg_base; in gpio_altera_pin_interrupt_configure() local
262 uintptr_t reg_base = cfg->reg_base; in gpio_altera_irq_handler() local
Dgpio_ite_it8xxx2_v2.c316 volatile uint8_t *reg_base = in gpio_ite_isr() local
363 volatile uint8_t *reg_base = (uint8_t *)gpio_config->wuc_base[pin]; local
/Zephyr-Core-3.5.0/soc/x86/raptor_lake/
Dsoc_gpio.h28 #define GPIO_REG_BASE(reg_base) \ argument
31 #define GPIO_PAD_BASE(reg_base) \ argument
/Zephyr-Core-3.5.0/soc/x86/elkhart_lake/
Dsoc_gpio.h29 #define GPIO_REG_BASE(reg_base) \ argument
32 #define GPIO_PAD_BASE(reg_base) \ argument
/Zephyr-Core-3.5.0/soc/x86/alder_lake/
Dsoc_gpio.h29 #define GPIO_REG_BASE(reg_base) \ argument
32 #define GPIO_PAD_BASE(reg_base) \ argument
/Zephyr-Core-3.5.0/drivers/peci/
Dpeci_ite_it8xxx2.c118 static void peci_it8xxx2_init_vtts(struct peci_it8xxx2_regs *reg_base, in peci_it8xxx2_init_vtts()
124 static void peci_it8xxx2_rst_status(struct peci_it8xxx2_regs *reg_base) in peci_it8xxx2_rst_status()
129 static int peci_it8xxx2_check_host_busy(struct peci_it8xxx2_regs *reg_base) in peci_it8xxx2_check_host_busy()
/Zephyr-Core-3.5.0/drivers/watchdog/
Dwdt_opentitan.c90 volatile uintptr_t reg_base = dev_cfg->regs; in ot_aontimer_install_timeout() local
/Zephyr-Core-3.5.0/drivers/dma/
Ddma_pl330.c262 uint32_t reg_base, int ch, int secure) in dma_pl330_start_dma_ch()
300 static int dma_pl330_wait(uint32_t reg_base, int ch) in dma_pl330_wait()
Ddma_pl330.h163 mem_addr_t reg_base; member
/Zephyr-Core-3.5.0/soc/x86/apollo_lake/
Dsoc_gpio.h293 #define GPIO_REG_BASE(reg_base) reg_base argument
295 #define GPIO_PAD_BASE(reg_base) \ argument
/Zephyr-Core-3.5.0/drivers/dai/intel/dmic/
Ddmic.h174 uint32_t reg_base; member
/Zephyr-Core-3.5.0/drivers/flash/
Dflash_cadence_qspi_nor_ll.h165 uintptr_t reg_base; member
/Zephyr-Core-3.5.0/drivers/espi/
Despi_mchp_xec_host_v2.c84 uint32_t reg_base; /* logical device registers */ member