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Searched defs:reg (Results 1 – 25 of 146) sorted by relevance

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/trusted-firmware-a-latest/drivers/cadence/nand/
Dcdns_nand.c29 uint32_t reg = 0U; in cdns_nand_wait_idle() local
40 uint32_t reg = 0U; in cdns_nand_wait_thread_ready() local
53 uint32_t reg = 0U; in cdns_nand_last_opr_status() local
96 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_set_feature() local
117 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_reset() local
135 uint32_t reg = mmio_read_32(CNF_MINICTRL(DLL_PHY_CTRL)); in cdns_nand_set_opr_mode() local
208 uint32_t reg = 0U; in cdns_nand_update_dev_info() local
251 uint32_t reg = 0U; in cdns_nand_host_init() local
304 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_erase() local
347 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_read_page() local
/trusted-firmware-a-latest/drivers/renesas/rcar/pfc/
Dpfc_init.c40 #define PRR_PRODUCT_ERR(reg) \ argument
47 #define PRR_CUT_ERR(reg) \ argument
56 uint32_t reg; in rcar_pfc_init() local
/trusted-firmware-a-latest/drivers/renesas/rzg/pfc/
Dpfc_init.c31 #define PRR_PRODUCT_ERR(reg) \ argument
38 #define PRR_CUT_ERR(reg) \ argument
47 uint32_t reg; in rzg_pfc_init() local
/trusted-firmware-a-latest/drivers/renesas/rcar/qos/
Dqos_init.c61 #define PRR_PRODUCT_ERR(reg) \ argument
68 #define PRR_CUT_ERR(reg) \ argument
77 uint32_t reg; in rcar_qos_init() local
300 uint32_t reg; in get_refperiod() local
/trusted-firmware-a-latest/lib/extensions/sme/
Dsme.c19 u_register_t reg; in sme_enable() local
33 u_register_t reg; in sme_enable_per_world() local
89 u_register_t reg; in sme_disable() local
103 u_register_t reg; in sme_disable_per_world() local
/trusted-firmware-a-latest/drivers/renesas/rzg/qos/
Dqos_init.c45 #define PRR_PRODUCT_ERR(reg) \ argument
52 #define PRR_CUT_ERR(reg) \ argument
61 uint32_t reg; in rzg_qos_init() local
196 uint32_t reg; in get_refperiod() local
/trusted-firmware-a-latest/plat/imx/common/sci/
Dimx8_mu.c13 uint32_t reg, i; in MU_Resume() local
28 uint32_t reg = mmio_read_32(base + MU_ACR_OFFSET1); in MU_EnableRxFullInt() local
37 uint32_t reg = mmio_read_32(base + MU_ACR_OFFSET1); in MU_EnableGeneralInt() local
66 uint32_t reg; in MU_Init() local
/trusted-firmware-a-latest/include/services/
Ddrtm_svc.h112 #define ARM_DRTM_TPM_FEATURES_SET_PCR_SCHEMA(reg, val) \ argument
120 #define ARM_DRTM_TPM_FEATURES_SET_TPM_HASH(reg, val) \ argument
128 #define ARM_DRTM_TPM_FEATURES_SET_FW_HASH(reg, val) \ argument
136 #define ARM_DRTM_MIN_MEM_REQ_SET_DCE_SIZE(reg, val) \ argument
144 #define ARM_DRTM_MIN_MEM_REQ_SET_MIN_DLME_DATA_SIZE(reg, val) \ argument
153 #define ARM_DRTM_DMA_PROT_FEATURES_SET_MAX_REGIONS(reg, val) \ argument
162 #define ARM_DRTM_DMA_PROT_FEATURES_SET_DMA_SUPPORT(reg, val) \ argument
171 #define ARM_DRTM_TCB_HASH_FEATURES_SET_MAX_NUM_HASHES(reg, val) \ argument
200 #define ARM_DRTM_REGION_SIZE_TYPE_SET_CACHEABILITY(reg, val) \ argument
210 #define ARM_DRTM_REGION_SIZE_TYPE_SET_REGION_TYPE(reg, val) \ argument
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/trusted-firmware-a-latest/drivers/brcm/mdio/
Dmdio.c31 static int mdio_op(uint16_t busid, uint16_t phyid, uint32_t reg, in mdio_op()
67 int mdio_write(uint16_t busid, uint16_t phyid, uint32_t reg, uint16_t val) in mdio_write()
78 int mdio_read(uint16_t busid, uint16_t phyid, uint32_t reg) in mdio_read()
/trusted-firmware-a-latest/plat/mediatek/mt8183/drivers/spmc/
Dmtspmc.c42 uintptr_t reg = per_cpu(cluster, cpu, MCUCFG_SPARK); in spm_enable_cpu_auto_off() local
50 uintptr_t reg = per_cpu(cluster, cpu, MCUCFG_SPARK); in spm_disable_cpu_auto_off() local
75 uintptr_t reg; in mcucfg_set_bootaddr() local
92 uintptr_t reg; in mcucfg_get_bootaddr() local
109 uintptr_t reg; in mcucfg_init_archstate() local
/trusted-firmware-a-latest/drivers/renesas/rcar/cpld/
Dulcb_cpld.c36 uint32_t reg; in gpio_set_value() local
48 uint32_t reg; in gpio_direction_output() local
57 uint32_t reg; in gpio_pfc() local
/trusted-firmware-a-latest/drivers/allwinner/axp/
Dcommon.c32 int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask) in axp_clrsetbits()
79 const struct axp_regulator *reg) in setup_regulator()
166 const struct axp_regulator *reg; in axp_setup_regulators() local
/trusted-firmware-a-latest/plat/hisilicon/hikey/
Dhisi_pwrc.c42 unsigned int reg = 0; in hisi_pwrc_set_cluster_wfi() local
72 unsigned int reg, sec_entrypoint; in hisi_pwrc_setup() local
/trusted-firmware-a-latest/plat/renesas/common/
Dbl2_secure_setting.c18 uint32_t reg; member
263 uint32_t reg; member
/trusted-firmware-a-latest/plat/imx/imx8m/imx8mq/
Dgpc.c58 uint32_t reg = gpc_imr_offset[core_id] + imr_idx * 4; in gpc_save_imr_lpm() local
70 uint32_t reg = gpc_imr_offset[core_id] + imr_idx * 4; in gpc_restore_imr_lpm() local
110 uintptr_t reg; in imx_gpc_hwirq_mask() local
127 uintptr_t reg; in imx_gpc_hwirq_unmask() local
185 uintptr_t reg; in imx_gpc_set_affinity() local
/trusted-firmware-a-latest/plat/nvidia/tegra/drivers/bpmp_ipc/
Dintf.c38 static inline uint32_t hsp_db_read(uint32_t reg) in hsp_db_read()
43 static inline void hsp_db_write(uint32_t reg, uint32_t val) in hsp_db_write()
108 uint32_t reg; in tegra_bpmp_enable_ccplex_doorbell() local
134 uint32_t reg; in tegra_bpmp_can_ccplex_ring_doorbell() local
/trusted-firmware-a-latest/plat/allwinner/sun50i_h6/
Dsunxi_power.c30 int axp_read(uint8_t reg) in axp_read()
35 int axp_write(uint8_t reg, uint8_t val) in axp_write()
/trusted-firmware-a-latest/plat/allwinner/sun50i_h616/
Dsunxi_power.c31 int axp_read(uint8_t reg) in axp_read()
36 int axp_write(uint8_t reg, uint8_t val) in axp_write()
/trusted-firmware-a-latest/drivers/allwinner/
Dsunxi_rsb.c39 uint32_t reg, tries = MAX_TRIES; in rsb_wait_bit() local
54 uint32_t reg; in rsb_wait_stat() local
113 uint32_t reg; in rsb_set_bus_speed() local
/trusted-firmware-a-latest/plat/mediatek/mt8183/drivers/timer/
Dmt_timer.c15 unsigned int reg; in enable_systimer_compensation() local
/trusted-firmware-a-latest/plat/imx/common/
Dimx_caam.c16 uint32_t reg; in imx_caam_init() local
/trusted-firmware-a-latest/drivers/nxp/dcfg/
Ddcfg.c38 uint32_t reg; in get_soc_info() local
70 uint32_t reg; in get_devdisr5_info() local
/trusted-firmware-a-latest/plat/allwinner/common/
Dsunxi_common.c67 uint32_t reg = mmio_read_32(SRAM_VER_REG); in sunxi_read_soc_id() local
184 uint32_t reg = mmio_read_32(SRAM_VER_REG); in plat_get_soc_revision() local
/trusted-firmware-a-latest/drivers/arm/gic/v3/
Dgic600ae_fmu_helpers.c19 #define GIC_FMU_WRITE_32(base, reg, val) \ argument
31 #define GIC_FMU_WRITE_64(base, reg, n, val) \ argument
66 #define GIC_FMU_WRITE_ON_IDLE_32(base, reg, val) \ argument
76 #define GIC_FMU_WRITE_ON_IDLE_64(base, reg, n, val) \ argument
/trusted-firmware-a-latest/plat/allwinner/sun50i_a64/
Dsunxi_power.c115 int axp_read(uint8_t reg) in axp_read()
120 int axp_write(uint8_t reg, uint8_t val) in axp_write()

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