1 /* 2 * Copyright (c) 2014-2016 Wind River Systems, Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @file 9 * @brief Private kernel definitions 10 * 11 * This file contains private kernel structures definitions and various 12 * other definitions for the ARCv2 processor architecture. 13 * 14 * This file is also included by assembly language files which must #define 15 * _ASMLANGUAGE before including this header file. Note that kernel 16 * assembly source files obtains structure offset values via "absolute 17 * symbols" in the offsets.o module. 18 */ 19 20 #ifndef ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_ 21 #define ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_ 22 23 #include <zephyr/toolchain.h> 24 #include <zephyr/linker/sections.h> 25 #include <zephyr/arch/cpu.h> 26 #include <vector_table.h> 27 28 #ifndef _ASMLANGUAGE 29 #include <zephyr/kernel.h> 30 #include <zephyr/types.h> 31 #include <zephyr/sys/util.h> 32 #include <zephyr/sys/dlist.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #ifdef CONFIG_ARC_HAS_SECURE 39 struct _irq_stack_frame { 40 #ifdef CONFIG_ARC_HAS_ZOL 41 uintptr_t lp_end; 42 uintptr_t lp_start; 43 uintptr_t lp_count; 44 #endif /* CONFIG_ARC_HAS_ZOL */ 45 #ifdef CONFIG_CODE_DENSITY 46 /* 47 * Currently unsupported. This is where those registers are 48 * automatically pushed on the stack by the CPU when taking a regular 49 * IRQ. 50 */ 51 uintptr_t ei_base; 52 uintptr_t ldi_base; 53 uintptr_t jli_base; 54 #endif 55 uintptr_t r0; 56 uintptr_t r1; 57 uintptr_t r2; 58 uintptr_t r3; 59 uintptr_t r4; 60 uintptr_t r5; 61 uintptr_t r6; 62 uintptr_t r7; 63 uintptr_t r8; 64 uintptr_t r9; 65 uintptr_t r10; 66 uintptr_t r11; 67 uintptr_t r12; 68 uintptr_t r13; 69 uintptr_t blink; 70 uintptr_t pc; 71 uintptr_t sec_stat; 72 uintptr_t status32; 73 }; 74 #else 75 struct _irq_stack_frame { 76 uintptr_t r0; 77 uintptr_t r1; 78 uintptr_t r2; 79 uintptr_t r3; 80 uintptr_t r4; 81 uintptr_t r5; 82 uintptr_t r6; 83 uintptr_t r7; 84 uintptr_t r8; 85 uintptr_t r9; 86 uintptr_t r10; 87 uintptr_t r11; 88 uintptr_t r12; 89 uintptr_t r13; 90 uintptr_t blink; 91 #ifdef CONFIG_ARC_HAS_ZOL 92 uintptr_t lp_end; 93 uintptr_t lp_start; 94 uintptr_t lp_count; 95 #endif /* CONFIG_ARC_HAS_ZOL */ 96 #ifdef CONFIG_CODE_DENSITY 97 /* 98 * Currently unsupported. This is where those registers are 99 * automatically pushed on the stack by the CPU when taking a regular 100 * IRQ. 101 */ 102 uintptr_t ei_base; 103 uintptr_t ldi_base; 104 uintptr_t jli_base; 105 #endif 106 uintptr_t pc; 107 uintptr_t status32; 108 }; 109 #endif 110 111 typedef struct _irq_stack_frame _isf_t; 112 113 114 115 /* callee-saved registers pushed on the stack, not in k_thread */ 116 struct _callee_saved_stack { 117 uintptr_t r13; 118 uintptr_t r14; 119 uintptr_t r15; 120 uintptr_t r16; 121 uintptr_t r17; 122 uintptr_t r18; 123 uintptr_t r19; 124 uintptr_t r20; 125 uintptr_t r21; 126 uintptr_t r22; 127 uintptr_t r23; 128 uintptr_t r24; 129 uintptr_t r25; 130 uintptr_t r26; 131 uintptr_t fp; /* r27 */ 132 133 #ifdef CONFIG_USERSPACE 134 #ifdef CONFIG_ARC_HAS_SECURE 135 uintptr_t user_sp; 136 uintptr_t kernel_sp; 137 #else 138 uintptr_t user_sp; 139 #endif 140 #endif 141 /* r28 is the stack pointer and saved separately */ 142 /* r29 is ILINK and does not need to be saved */ 143 uintptr_t r30; 144 145 #ifdef CONFIG_ARC_HAS_ACCL_REGS 146 uintptr_t r58; 147 #ifndef CONFIG_64BIT 148 uintptr_t r59; 149 #endif /* !CONFIG_64BIT */ 150 #endif 151 152 #ifdef CONFIG_FPU_SHARING 153 uintptr_t fpu_status; 154 uintptr_t fpu_ctrl; 155 #ifdef CONFIG_FP_FPU_DA 156 uintptr_t dpfp2h; 157 uintptr_t dpfp2l; 158 uintptr_t dpfp1h; 159 uintptr_t dpfp1l; 160 #endif 161 #endif 162 163 #ifdef CONFIG_ARC_DSP_SHARING 164 #ifdef CONFIG_ARC_DSP_BFLY_SHARING 165 uintptr_t dsp_fft_ctrl; 166 uintptr_t dsp_bfly0; 167 #endif 168 uintptr_t acc0_ghi; 169 uintptr_t acc0_glo; 170 uintptr_t dsp_ctrl; 171 #endif 172 173 #ifdef CONFIG_ARC_AGU_SHARING 174 uintptr_t agu_ap0; 175 uintptr_t agu_ap1; 176 uintptr_t agu_ap2; 177 uintptr_t agu_ap3; 178 uintptr_t agu_os0; 179 uintptr_t agu_os1; 180 uintptr_t agu_mod0; 181 uintptr_t agu_mod1; 182 uintptr_t agu_mod2; 183 uintptr_t agu_mod3; 184 #ifdef CONFIG_ARC_AGU_MEDIUM 185 uintptr_t agu_ap4; 186 uintptr_t agu_ap5; 187 uintptr_t agu_ap6; 188 uintptr_t agu_ap7; 189 uintptr_t agu_os2; 190 uintptr_t agu_os3; 191 uintptr_t agu_mod4; 192 uintptr_t agu_mod5; 193 uintptr_t agu_mod6; 194 uintptr_t agu_mod7; 195 uintptr_t agu_mod8; 196 uintptr_t agu_mod9; 197 uintptr_t agu_mod10; 198 uintptr_t agu_mod11; 199 #endif 200 #ifdef CONFIG_ARC_AGU_LARGE 201 uintptr_t agu_ap8; 202 uintptr_t agu_ap9; 203 uintptr_t agu_ap10; 204 uintptr_t agu_ap11; 205 uintptr_t agu_os4; 206 uintptr_t agu_os5; 207 uintptr_t agu_os6; 208 uintptr_t agu_os7; 209 uintptr_t agu_mod12; 210 uintptr_t agu_mod13; 211 uintptr_t agu_mod14; 212 uintptr_t agu_mod15; 213 uintptr_t agu_mod16; 214 uintptr_t agu_mod17; 215 uintptr_t agu_mod18; 216 uintptr_t agu_mod19; 217 uintptr_t agu_mod20; 218 uintptr_t agu_mod21; 219 uintptr_t agu_mod22; 220 uintptr_t agu_mod23; 221 #endif 222 #endif 223 /* 224 * No need to save r31 (blink), it's either already pushed as the pc or 225 * blink on an irq stack frame. 226 */ 227 }; 228 229 typedef struct _callee_saved_stack _callee_saved_stack_t; 230 231 #ifdef __cplusplus 232 } 233 #endif 234 235 #endif /* _ASMLANGUAGE */ 236 237 #endif /* ZEPHYR_ARCH_ARC_INCLUDE_KERNEL_ARCH_DATA_H_ */ 238
