1/* 2 * Copyright (c) 2022 Renesas Electronics Corporation and/or its affiliates 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6#include <arm/armv8-m.dtsi> 7#include <mem.h> 8#include <freq.h> 9#include <zephyr/dt-bindings/gpio/gpio.h> 10#include <zephyr/dt-bindings/adc/smartbond-adc.h> 11#include <zephyr/dt-bindings/pinctrl/smartbond-pinctrl.h> 12 13/ { 14 chosen { 15 zephyr,entropy = &trng; 16 zephyr,flash-controller = &flash_controller; 17 }; 18 19 cpus: cpus { 20 #address-cells = <1>; 21 #size-cells = <0>; 22 23 cpu@0 { 24 compatible = "arm,cortex-m33f"; 25 reg = <0>; 26 clock-frequency = <32000000>; 27 }; 28 }; 29 30 crg { 31 osc: osc { 32 rc32k: rc32k { 33 compatible = "renesas,smartbond-lp-osc"; 34 clock-frequency = <DT_FREQ_K(32)>; 35 calibration-interval = <1>; 36 #clock-cells = <0>; 37 status = "okay"; 38 }; 39 xtal32k: xtal32k { 40 compatible = "renesas,smartbond-lp-osc"; 41 clock-frequency = <32768>; 42 settle-time = <8000>; 43 #clock-cells = <0>; 44 status = "disabled"; 45 }; 46 rcx: rcx { 47 compatible = "renesas,smartbond-lp-osc"; 48 clock-frequency = <DT_FREQ_K(15)>; 49 calibration-interval = <1>; 50 #clock-cells = <0>; 51 status = "disabled"; 52 }; 53 rc32m: rc32m { 54 compatible = "fixed-clock"; 55 clock-frequency = <DT_FREQ_M(32)>; 56 #clock-cells = <0>; 57 status = "okay"; 58 }; 59 xtal32m: xtal32m { 60 compatible = "fixed-clock"; 61 clock-frequency = <DT_FREQ_M(32)>; 62 #clock-cells = <0>; 63 status = "disabled"; 64 }; 65 pll: pll { 66 compatible = "fixed-clock"; 67 clock-frequency = <DT_FREQ_M(96)>; 68 #clock-cells = <0>; 69 status = "disabled"; 70 }; 71 }; 72 divn_clk: divn_clk { 73 compatible = "fixed-clock"; 74 clock-frequency = <DT_FREQ_M(32)>; 75 #clock-cells = <0>; 76 status = "okay"; 77 }; 78 sys_clk: sys_clk { 79 compatible = "renesas,smartbond-sys-clk"; 80 status = "okay"; 81 clock-src = <&rc32m>; 82 status = "okay"; 83 }; 84 lp_clk: lp_clk { 85 compatible = "renesas,smartbond-lp-clk"; 86 clock-src = <&rc32k>; 87 status = "okay"; 88 }; 89 90 regulators { 91 compatible = "renesas,smartbond-regulator"; 92 vdd: VDD { 93 regulator-init-microvolt = <900000>; 94 regulator-boot-on; 95 renesas,regulator-sleep-ldo; 96 renesas,regulator-dcdc-vbat-high; 97 renesas,regulator-dcdc-vbat-low; 98 }; 99 vdd_clamp: VDD_CLAMP { 100 regulator-boot-on; 101 regulator-always-on; 102 regulator-init-microvolt = <706000>; 103 }; 104 vdd_sleep: VDD_SLEEP { 105 regulator-boot-on; 106 regulator-init-microvolt = <750000>; 107 }; 108 v14: V14 { 109 regulator-init-microvolt = <1400000>; 110 regulator-boot-on; 111 renesas,regulator-dcdc-vbat-high; 112 renesas,regulator-dcdc-vbat-low; 113 }; 114 v18: V18 { 115 regulator-init-microvolt = <1800000>; 116 regulator-boot-on; 117 renesas,regulator-dcdc-vbat-high; 118 }; 119 v18p: V18P { 120 regulator-init-microvolt = <1800000>; 121 regulator-boot-on; 122 renesas,regulator-sleep-ldo; 123 renesas,regulator-dcdc-vbat-high; 124 }; 125 v30: V30 { 126 regulator-init-microvolt = <3000000>; 127 regulator-boot-on; 128 renesas,regulator-sleep-ldo; 129 renesas,regulator-v30-vbus; 130 renesas,regulator-v30-vbat; 131 renesas,regulator-v30-clamp; 132 renesas,regulator-v30-ref-bandgap; 133 }; 134 }; 135 }; 136 137 soc { 138 sram0: memory@20000000 { 139 compatible = "mmio-sram"; 140 }; 141 142 qspif: memory@16000000 { 143 compatible = "zephyr,memory-region"; 144 reg = <0x16000000 DT_SIZE_K(32768)>; 145 zephyr,memory-region = "QSPIF"; 146 }; 147 148 flash_controller: flash-controller@38000000 { 149 compatible = "renesas,smartbond-flash-controller"; 150 reg = <0x38000000 0xb0>; 151 152 #address-cells = <1>; 153 #size-cells = <1>; 154 155 read-cs-idle-delay = <50>; 156 erase-cs-idle-delay = <50>; 157 158 flash0: flash@16000000 { 159 compatible = "soc-nv-flash"; 160 erase-block-size = <4096>; 161 write-block-size = <1>; 162 }; 163 }; 164 165 pinctrl: pin-controller@50020a00 { 166 compatible = "renesas,smartbond-pinctrl"; 167 reg = <0x50020a00 0x100>; 168 #address-cells = <1>; 169 #size-cells = <1>; 170 171 gpio0: gpio@50020a00 { 172 compatible = "renesas,smartbond-gpio"; 173 gpio-controller; 174 #gpio-cells = <2>; 175 ngpios = <32>; 176 reg = <0x50020a00 20 177 0x50020a18 128 178 0x50000070 12 179 0x50000114 36>; 180 reg-names = "data", "mode", "latch", "wkup"; 181 interrupts = <38 0>; 182 }; 183 184 gpio1: gpio@50020a04 { 185 compatible = "renesas,smartbond-gpio"; 186 gpio-controller; 187 #gpio-cells = <2>; 188 ngpios = <23>; 189 reg = <0x50020a04 20 190 0x50020a98 92 191 0x5000007c 12 192 0x50000118 36>; 193 reg-names = "data", "mode", "latch", "wkup"; 194 interrupts = <39 0>; 195 }; 196 }; 197 198 rtc: rtc@50000400 { 199 compatible = "renesas,smartbond-rtc"; 200 reg = <0x50000400 0x98>; 201 interrupts = <18 0>; 202 alarms-count = <1>; 203 status = "disabled"; 204 }; 205 206 wdog: watchdog@50000700 { 207 compatible = "renesas,smartbond-watchdog"; 208 reg = <0x50000700 0x8>; 209 status = "okay"; 210 }; 211 212 timer1: timer@50010200 { 213 compatible = "renesas,smartbond-timer"; 214 reg = <0x50010200 0x300>; 215 clock-src = <&lp_clk>; 216 interrupts = <16 0>; 217 prescaler = <1>; 218 status = "disabled"; 219 }; 220 221 timer2: timer@50010300 { 222 compatible = "renesas,smartbond-timer"; 223 reg = <0x50010300 0x300>; 224 clock-src = <&divn_clk>; 225 interrupts = <17 0>; 226 prescaler = <32>; 227 status = "disabled"; 228 }; 229 230 timer3: timer@50040a00 { 231 compatible = "renesas,smartbond-timer"; 232 reg = <0x50040a00 0x300>; 233 clock-src = <&lp_clk>; 234 interrupts = <34 0>; 235 prescaler = <31>; 236 status = "disabled"; 237 }; 238 239 timer4: timer@50040b00 { 240 compatible = "renesas,smartbond-timer"; 241 reg = <0x50040b00 0x300>; 242 clock-src = <&divn_clk>; 243 interrupts = <35 0>; 244 prescaler = <32>; 245 status = "disabled"; 246 }; 247 248 uart: uart@50020000 { 249 compatible = "renesas,smartbond-uart"; 250 reg = <0x50020000 0x100>; 251 periph-clock-config = <0x01>; 252 interrupts = <5 0>; 253 status = "disabled"; 254 }; 255 256 uart2: uart@50020100 { 257 compatible = "renesas,smartbond-uart"; 258 reg = <0x50020100 0x100>; 259 periph-clock-config = <0x02>; 260 interrupts = <6 0>; 261 status = "disabled"; 262 }; 263 264 uart3: uart@50020200 { 265 compatible = "renesas,smartbond-uart"; 266 reg = <0x50020200 0x100>; 267 periph-clock-config = <0x08>; 268 interrupts = <7 0>; 269 status = "disabled"; 270 }; 271 272 adc: adc@50030900 { 273 compatible = "renesas,smartbond-adc"; 274 reg = <0x50030900 0x1C>; 275 interrupts = <27 0>; 276 status = "disabled"; 277 #io-channel-cells = <1>; 278 }; 279 280 sdadc: sdadc@50020800 { 281 compatible = "renesas,smartbond-sdadc"; 282 reg = <0x50020800 0x1C>; 283 interrupts = <28 0>; 284 clock-freq = <2>; 285 status = "disabled"; 286 #io-channel-cells = <1>; 287 }; 288 289 crypto: crypto@30040000 { 290 compatible = "renesas,smartbond-crypto"; 291 reg = <0x30040000 0x200>; 292 interrupts = <29 0>; 293 status = "disabled"; 294 }; 295 296 trng: trng@50040c00 { 297 compatible = "renesas,smartbond-trng"; 298 reg = <0x50040c00 0x0C>; 299 interrupts = <24 0>; 300 status = "okay"; 301 }; 302 303 i2c: i2c@50020600 { 304 compatible = "renesas,smartbond-i2c"; 305 #address-cells = <1>; 306 #size-cells = <0>; 307 reg = <0x50020600 0x100>; 308 periph-clock-config = <0x0200>; 309 interrupts = <8 0>; 310 status = "disabled"; 311 }; 312 313 i2c2: i2c@50020700 { 314 compatible = "renesas,smartbond-i2c"; 315 #address-cells = <1>; 316 #size-cells = <0>; 317 reg = <0x50020700 0x100>; 318 periph-clock-config = <0x0800>; 319 interrupts = <9 0>; 320 }; 321 322 spi: spi@50020300 { 323 compatible = "renesas,smartbond-spi"; 324 #address-cells = <1>; 325 #size-cells = <0>; 326 reg = <0x50020300 0x100>; 327 periph-clock-config = <0x20>; 328 interrupts = <10 0>; 329 status = "disabled"; 330 }; 331 332 spi2: spi@50020400 { 333 compatible = "renesas,smartbond-spi"; 334 #address-cells = <1>; 335 #size-cells = <0>; 336 reg = <0x50020400 0x100>; 337 periph-clock-config = <0x80>; 338 interrupts = <11 0>; 339 status = "disabled"; 340 }; 341 usbd: usb@50040000 { 342 compatible = "renesas,smartbond-usbd"; 343 reg = <0x50040000 0x1B0>; 344 dma-chan-rx = <6>; 345 dma-chan-tx = <7>; 346 dma-min-transfer-size = <65>; 347 fifo-read-threshold = <4>; 348 ep-out-buf-size = <8 64 64 64>; 349 interrupts = <15 0>, <21 0>; 350 status = "disabled"; 351 }; 352 353 dma: dma@50040800 { 354 compatible = "renesas,smartbond-dma"; 355 reg = <0x50040800 0x110>; 356 interrupts = <1 0>; 357 status = "disabled"; 358 dma-channels = <8>; 359 block-count = <1>; 360 #dma-cells = <0>; 361 }; 362 }; 363}; 364 365&nvic { 366 arm,num-irq-priority-bits = <4>; 367}; 368
