1 /***************************************************************************//**
2 * \file cy_ethif.c
3 * \version 1.20
4 *
5 * Provides an API implementation of the ETHIF driver
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2021 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 *     http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24 
25 #include "cy_device.h"
26 
27 #if defined (CY_IP_MXETH)
28 
29 #include "cy_ethif.h"
30 #include <string.h>
31 #include <stdlib.h>
32 #include <stdio.h>
33 #include "cdn_errno.h"
34 #include "cedi.h"
35 #include "edd_int.h"
36 
37 #if defined(__cplusplus)
38 extern "C" {
39 #endif
40 
41 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 18.1', 42, 'Overrunning array expected.')
42 CY_MISRA_DEVIATE_BLOCK_START('OVERRUN', 43, 'Overrunning array expected.')
43 
44 
45 /***************************************
46 *       Local Variables
47 ***************************************/
48 /** Cadence driver instantiation    */
49 static CEDI_OBJ *cyp_ethif_gemgxlobj;
50 
51 /** Ethernet configurations */
52 static CEDI_Config  cy_ethif_cfg[CY_ETH_DEFINE_NUM_IP];
53 
54 /** Cadence driver memory requirements */
55 static CEDI_SysReq  cy_ethif_sysreq;
56 
57 /** Private data structures required for each instance of Ethernet IPs  */
58 static CEDI_PrivateData * cyp_ethif_pd[CY_ETH_DEFINE_NUM_IP];
59 
60 /** Variables holding Statistics register values    */
61 static CEDI_Statistics  * cyp_ethif_statistic[CY_ETH_DEFINE_NUM_IP];
62 
63 /** Private data memory allocation  */
64 static uint8_t cy_ethif_privatedata[CY_ETH_DEFINE_NUM_IP][1800] = {{0,},};
65 
66 /** Tx descriptors */
67 /** CY_ETH_DEFINE_NUM_TXQS * CY_ETH_DEFINE_NUM_IP to avoid race condition in hardware; each BD list for particular queue must have 1 more BD */
68 CY_SECTION_SHAREDMEM
69 CY_ALIGN(32) static uint8_t cy_ethif_tx_desc_list[CY_ETH_DEFINE_NUM_IP][CY_ETH_DEFINE_NUM_TXQS][CY_ETH_DEFINE_TOTAL_BD_PER_TXQUEUE + 1][CY_ETH_BD_SIZE] = {{{{0,},},},};
70 
71 /** Rx descriptors */
72 /** Cadence driver requires another set of buffers to replace the existing
73 * buffers after a frame has been received. so, number of required BDs would not
74 * be same as number of buffers */
75 CY_SECTION_SHAREDMEM
76 CY_ALIGN(32) static uint8_t cy_ethif_rx_desc_list[CY_ETH_DEFINE_NUM_IP][CY_ETH_DEFINE_NUM_RXQS][((CY_ETH_DEFINE_TOTAL_BD_PER_TXQUEUE + 1) * 2)][CY_ETH_BD_SIZE] = {{{{0,},},},};
77 
78 /** Statistics registers    */
79 static uint8_t cy_ethif_statistic[CY_ETH_DEFINE_NUM_IP][160] = {{0,},};
80 
81 static cy_stc_ethif_cb_t stccallbackfunctions[CY_ETH_DEFINE_NUM_IP] = {{NULL, NULL, NULL, NULL, NULL},};
82 static cy_stc_ethif_queue_disablestatus_t stcQueueDisStatus[CY_ETH_DEFINE_NUM_IP] = {{{0,},{0,}},};
83 CY_SECTION_SHAREDMEM
84 CY_ALIGN(32) static volatile uint8_t g_tx_bdcount[CY_ETH_DEFINE_NUM_IP] = {0,};
85 
86 /*****************************************************************************
87 * Local function prototypes ('static')
88 *****************************************************************************/
89 static void Cy_ETHIF_EnableInterrupts(uint8_t u8EthIfInstance, cy_stc_ethif_intr_config_t * pstcInterruptList);
90 static void Cy_ETHIF_PrepareConfiguration(uint8_t u8EthIfInstance, cy_stc_ethif_mac_config_t * pstcEthIfConfig);
91 static void Cy_ETHIF_AssignMemory(uint8_t u8EthIfInstance);
92 static uint8_t Cy_ETHIF_GetEthIfInstance(void *pcy_privatedata);
93 static void Cy_ETHIF_EventTx(void *pcy_privatedata, uint32_t u32event, uint8_t u8qnum);
94 static void Cy_ETHIF_EventTxError(void *pcy_privatedata, uint32_t u32event, uint8_t u8qnum);
95 static void Cy_ETHIF_EventRxFrame(void *pcy_privatedata, uint8_t u8qnum);
96 static void Cy_ETHIF_EventRxError(void *pcy_privatedata, uint32_t a_event, uint8_t a_qnum);
97 static void Cy_ETHIF_EventPhyManComplete(void *pcy_privatedata, uint8_t u8read, uint16_t u16ReadData);
98 static void Cy_ETHIF_EventhrespError(void *pcy_privatedata, uint8_t u8qnum);
99 static void Cy_ETHIF_EventLpPageRx(void* pcy_privatedata, struct CEDI_LpPageRx* pageRx);
100 static void Cy_ETHIF_EventAn(void* pcy_privatedata, struct CEDI_NetAnStatus* netStat);
101 static void Cy_ETHIF_EventLinkChange(void *pcy_privatedata, uint8_t a_linkstate);
102 static void Cy_ETHIF_EventTsu(void *pcy_privatedata, uint32_t u32event);
103 static void Cy_ETHIF_EventPauseFrame(void *pcy_privatedata, uint32_t u32event);
104 static void Cy_ETHIF_EventPtp(void* pcy_privatedata, uint32_t u32type, struct CEDI_1588TimerVal* time);
105 static void Cy_ETHIF_EventExternalInt(void * pcy_privatedata);
106 static void Cy_ETHIF_EventWol(void * pcy_privatedata);
107 static void Cy_ETHIF_EventLpi(void * pcy_privatedata);
108 static void Cy_ETHIF_InitializeBuffers(void);
109 static cy_en_ethif_status_t Cy_ETHIF_WrapperConfig(uint8_t u8EthIfInstance, cy_stc_ethif_wrapper_config_t * pstcWrapperConfig);
110 static void Cy_ETHIF_IPEnable(ETH_Type *base);
111 static void Cy_ETHIF_IPDisable(ETH_Type *base);
112 static cy_en_ethif_status_t Cy_ETHIF_TSUInit(uint8_t u8EthIfInstance, cy_stc_ethif_tsu_config_t * pstcTSUConfig);
113 static cy_en_ethif_status_t Cy_ETHIF_DisableQueues(ETH_Type *base, cy_stc_ethif_mac_config_t * pstcEthIfConfig);
114 
115 /*****************************************************************************
116 * Local Call back function supplied to Cadence driver
117 *****************************************************************************/
118 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 8.4', 1, 'Intentional definition')
119 CEDI_Callbacks Cy_ETHIF_Callbacks = {
120   .phyManComplete = (CEDI_CbPhyManComplete)Cy_ETHIF_EventPhyManComplete,
121   .txEvent        = (CEDI_CbTxEvent)Cy_ETHIF_EventTx,
122   .txError        = (CEDI_CbTxError)Cy_ETHIF_EventTxError,
123   .rxFrame        = (CEDI_CbRxFrame)Cy_ETHIF_EventRxFrame,
124   .rxError        = (CEDI_CbRxError)Cy_ETHIF_EventRxError,
125   .hrespError     = (CEDI_CbHrespError)Cy_ETHIF_EventhrespError,
126   .lpPageRx       = (CEDI_CbLpPageRx)Cy_ETHIF_EventLpPageRx,
127   .anComplete     = (CEDI_CbAnComplete)Cy_ETHIF_EventAn,
128   .linkChange     = (CEDI_CbLinkChange)Cy_ETHIF_EventLinkChange,
129   .tsuEvent       = (CEDI_CbTsuEvent)Cy_ETHIF_EventTsu,
130   .pauseEvent     = (CEDI_CbPauseEvent)Cy_ETHIF_EventPauseFrame,
131   .ptpPriFrameTx  = (CEDI_CbPtpPriFrameTx)Cy_ETHIF_EventPtp,
132   .ptpPeerFrameTx = (CEDI_CbPtpPeerFrameTx)Cy_ETHIF_EventPtp,
133   .ptpPriFrameRx  = (CEDI_CbPtpPriFrameRx)Cy_ETHIF_EventPtp,
134   .ptpPeerFrameRx = (CEDI_CbPtpPeerFrameRx)Cy_ETHIF_EventPtp,
135   .lpiStatus      = (CEDI_CbLpiStatus)Cy_ETHIF_EventLpi,
136   .wolEvent       = (CEDI_CbWolEvent)Cy_ETHIF_EventWol,
137   .extInpIntr     = (CEDI_CbExtInpIntr)Cy_ETHIF_EventExternalInt
138 };
139 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 8.4')
140 
141 /*******************************************************************************
142 * Function Name: Cy_ETHIF_MdioInit
143 ****************************************************************************//**
144 *
145 * \brief Initializes the Ethernet MAC with minimal parameters which is required to
146 *        enable mdio interface.
147 *
148 * \param base
149 * Pointer to register area of Ethernet MAC
150 *
151 * \param pstcEthIfConfig
152 * Pointer to Ethernet configuration parameters
153 *
154 * \return CY_ETHIF_SUCCESS      Ethernet MAC has been initialized along with
155 *                               Cadence driver and external PHY
156 * \return CY_ETHIF_BAD_PARAM    If following conditions are met:
157 *                               pstcEth == NULL
158 *                               pstcEthIfConfig == NULL
159 *                               GEM_GXL Object could not be created.
160 *
161 * \note
162 * This function Initializes the Ethernet MAC partially. This function is only
163 * required if user wants to access PHY registers before \ref Cy_ETHIF_Init().
164 *******************************************************************************/
Cy_ETHIF_MdioInit(ETH_Type * base,cy_stc_ethif_mac_config_t * pstcEthIfConfig)165 cy_en_ethif_status_t Cy_ETHIF_MdioInit(ETH_Type *base, cy_stc_ethif_mac_config_t * pstcEthIfConfig)
166 {
167     uint8_t u8EthIfInstance;
168     uint32_t u32RetValue;
169     cy_en_ethif_status_t status = CY_ETHIF_SUCCESS;
170 
171     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base) || (pstcEthIfConfig == NULL))
172     {
173         return CY_ETHIF_BAD_PARAM;
174     }
175     else if (pstcEthIfConfig->pstcWrapperConfig == NULL)
176     {
177         return CY_ETHIF_BAD_PARAM;
178     }
179     else
180     {
181         /**/
182     }
183 
184     cyp_ethif_gemgxlobj = CEDI_GetInstance();
185     if (cyp_ethif_gemgxlobj == NULL)
186     {
187         status = CY_ETHIF_BAD_PARAM;
188     }
189 
190     if (status == CY_ETHIF_SUCCESS)
191     {
192         /** Load the Ethernet instance */
193         u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
194 
195         /* Load Init parameter */
196         Cy_ETHIF_PrepareConfiguration(u8EthIfInstance, pstcEthIfConfig);
197 
198         /* Initialize ENET MAC Wrapper */
199         if (CY_ETHIF_BAD_PARAM == Cy_ETHIF_WrapperConfig(u8EthIfInstance, pstcEthIfConfig->pstcWrapperConfig))
200         {
201             Cy_ETHIF_IPDisable(base);
202             return CY_ETHIF_BAD_PARAM;
203         }
204 
205         /* Enable the IP to access EMAC registers set */
206         Cy_ETHIF_IPEnable(base);
207 
208         /* assign starting addresses to local variable */
209         Cy_ETHIF_AssignMemory(u8EthIfInstance);
210 
211         /* Initialization EMAC registers */
212         u32RetValue = cyp_ethif_gemgxlobj->init((void *)cyp_ethif_pd[u8EthIfInstance], &cy_ethif_cfg[u8EthIfInstance], &Cy_ETHIF_Callbacks);
213         if (u32RetValue == ((uint32_t)EINVAL) || u32RetValue == ((uint32_t)ENOTSUP))
214         {
215             Cy_ETHIF_IPDisable(base);
216             return CY_ETHIF_BAD_PARAM;
217         }
218 
219         /* Enable MDIO */
220         cyp_ethif_gemgxlobj->setMdioEnable((void *)(void *)cyp_ethif_pd[u8EthIfInstance], CY_ETH_ENABLE_1);
221     }
222     return status;
223 }
224 
225 
226 
227 /*******************************************************************************
228 * Function Name: Cy_ETHIF_Init
229 ****************************************************************************//**
230 *
231 * \brief Initializes the Ethernet MAC, Cadence Driver, EthIf and PHY
232 *
233 * \param base
234 * Pointer to register area of Ethernet MAC
235 *
236 * \param pstcEthIfConfig
237 * Pointer to Ethernet configuration parameters
238 *
239 * \param pstcInterruptList
240 * List of Interrupts to enable
241 *
242 * \return CY_ETHIF_SUCCESS      Ethernet MAC has been initialized along with
243 *                               Cadence driver and external PHY
244 * \return CY_ETHIF_BAD_PARAM    If following conditions are met:
245 *                               pstcEth == NULL
246 *                               pstcEthIfConfig == NULL
247 *                               pstcInterruptList == NULL
248 *                               GEM_GXL Object could not be created
249 *                               Memory assigned by Interface layer is not enough
250 *                               Cadence driver could not initialize Ethernet MAC
251 * \return CY_ETHIF_MEMORY_NOT_ENOUGH
252 *                               Assigned memory for BDs or for Private data is
253 *                               not enough
254 *
255 * \note
256 * This function Initializes the Ethernet MAC, Cadence driver, EthIf layer and
257 * external PHY with the provided parameters. Port init for the Ethernet must be
258 * done before calling Cy_ETHIF_Init function. Buffer configuration parameters
259 * shall be done in cy_ethif.h file
260 *******************************************************************************/
Cy_ETHIF_Init(ETH_Type * base,cy_stc_ethif_mac_config_t * pstcEthIfConfig,cy_stc_ethif_intr_config_t * pstcInterruptList)261 cy_en_ethif_status_t Cy_ETHIF_Init(ETH_Type *base, cy_stc_ethif_mac_config_t * pstcEthIfConfig, cy_stc_ethif_intr_config_t * pstcInterruptList)
262 {
263     // local variable declaration
264     uint32_t u32RetValue = 0;
265     uint8_t u8EthIfInstance = 255;
266     uint8_t u8tmpcounter = 0;
267     uint8_t u8tmpintrcntr = 0;
268     uint16_t u16SysReqTxBDLength = 0;
269     uint16_t u16SysReqRxBDLength = 0;
270     static bool bBufferInitialized = false;
271     CEDI_BuffAddr rx_buff_addr;
272 
273     /* Parameter checks */
274     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base) || (pstcEthIfConfig == NULL) || (pstcInterruptList == NULL))
275     {
276         return CY_ETHIF_BAD_PARAM;
277     }
278     else if (pstcEthIfConfig->pstcWrapperConfig == NULL)
279     {
280         return CY_ETHIF_BAD_PARAM;
281     }
282     else
283     {
284         /**/
285     }
286 
287     if (bBufferInitialized == false)
288     {
289         /* Create GEM_GXL object  */
290         cyp_ethif_gemgxlobj = CEDI_GetInstance();
291         if (cyp_ethif_gemgxlobj == NULL)
292         {
293             return CY_ETHIF_BAD_PARAM;
294         }
295     }
296 
297     /** Load the Ethernet instance */
298     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
299 
300     /* Load Init parameter */
301     Cy_ETHIF_PrepareConfiguration(u8EthIfInstance, pstcEthIfConfig);
302 
303     if (pstcEthIfConfig->bintrEnable == true)
304     {
305         /* Configure Interrupts */
306         Cy_ETHIF_EnableInterrupts(u8EthIfInstance, pstcInterruptList);
307 
308         /* Init Callback functions */
309         stccallbackfunctions[u8EthIfInstance].rxframecb       = NULL;
310         stccallbackfunctions[u8EthIfInstance].txerrorcb       = NULL;
311         stccallbackfunctions[u8EthIfInstance].txcompletecb    = NULL;
312         stccallbackfunctions[u8EthIfInstance].tsuSecondInccb  = NULL;
313         stccallbackfunctions[u8EthIfInstance].rxgetbuff  = NULL;
314     }
315 
316     /* Initialize ENET MAC Wrapper */
317     if (CY_ETHIF_BAD_PARAM == Cy_ETHIF_WrapperConfig(u8EthIfInstance, pstcEthIfConfig->pstcWrapperConfig))
318     {
319         Cy_ETHIF_IPDisable(base);
320         return CY_ETHIF_BAD_PARAM;
321     }
322 
323     /* Enable the IP to access EMAC registers set */
324     Cy_ETHIF_IPEnable(base);
325 
326     /* Probe for checking configuration parameters and calculating memory size */
327     (void)cyp_ethif_gemgxlobj->probe(&cy_ethif_cfg[u8EthIfInstance], &cy_ethif_sysreq);
328 
329     /* Check for assigned memory and required memory match */
330     u16SysReqTxBDLength = (uint16_t)((cy_ethif_sysreq.txDescListSize /  CY_ETH_DEFINE_NUM_TXQS)/(CY_ETH_DEFINE_TOTAL_BD_PER_TXQUEUE + 1U));
331     u16SysReqRxBDLength = (uint16_t)((cy_ethif_sysreq.rxDescListSize /  CY_ETH_DEFINE_NUM_RXQS)/(CY_ETH_DEFINE_TOTAL_BD_PER_RXQUEUE + 1U));
332 
333     if ((u16SysReqTxBDLength != CY_ETH_BD_SIZE) || (u16SysReqRxBDLength != CY_ETH_BD_SIZE))
334     {
335         /* Memory not enough */
336         return CY_ETHIF_MEMORY_NOT_ENOUGH;
337     }
338 
339     /* assign starting addresses to local variable */
340     Cy_ETHIF_AssignMemory(u8EthIfInstance);
341 
342     if (sizeof(cy_ethif_privatedata[u8EthIfInstance])< cy_ethif_sysreq.privDataSize)
343     {
344         /* Memory not enough */
345         return CY_ETHIF_MEMORY_NOT_ENOUGH;
346     }
347 
348 
349     /* Initialization EMAC registers */
350     u32RetValue = cyp_ethif_gemgxlobj->init((void *)cyp_ethif_pd[u8EthIfInstance], &cy_ethif_cfg[u8EthIfInstance], &Cy_ETHIF_Callbacks);
351     if (u32RetValue == ((uint32_t)EINVAL) || u32RetValue == ((uint32_t)ENOTSUP))
352     {
353         Cy_ETHIF_IPDisable(base);
354         return CY_ETHIF_BAD_PARAM;
355     }
356 
357     /* Disable Transmit and Receive Queues */
358     (void)Cy_ETHIF_DisableQueues(base, pstcEthIfConfig);
359 
360     /* TSU Initialization */
361     if (NULL != pstcEthIfConfig->pstcTSUConfig)
362     {
363         if (CY_ETHIF_BAD_PARAM == Cy_ETHIF_TSUInit(u8EthIfInstance, pstcEthIfConfig->pstcTSUConfig))
364         {
365             Cy_ETHIF_IPDisable(base);
366             return CY_ETHIF_BAD_PARAM;
367         }
368     }
369 
370     /* Initialize Buffer status */
371     if (bBufferInitialized == false)
372     {
373         Cy_ETHIF_InitializeBuffers();
374         bBufferInitialized = true;
375     }
376 
377     for (u8tmpcounter = 0; u8tmpcounter < cy_ethif_cfg[u8EthIfInstance].rxQs; u8tmpcounter++)
378     {
379         if (pstcEthIfConfig->pRxQbuffPool[u8tmpcounter] != NULL)
380         {
381             for (u8tmpintrcntr = 0; u8tmpintrcntr < cy_ethif_cfg[u8EthIfInstance].rxQLen[u8tmpcounter]; u8tmpintrcntr++)
382             {
383                 rx_buff_addr.vAddr = (uintptr_t)((*pstcEthIfConfig->pRxQbuffPool)[u8tmpcounter][u8tmpintrcntr]);
384                 rx_buff_addr.pAddr = rx_buff_addr.vAddr;
385                 (void)cyp_ethif_gemgxlobj->addRxBuf((void *)cyp_ethif_pd[u8EthIfInstance],
386                                                 u8tmpcounter,
387                                             (CEDI_BuffAddr *)&rx_buff_addr,
388                                                 0);
389             }
390         }
391     }
392 
393 
394     /* additional Receive configurations */
395     cyp_ethif_gemgxlobj->setCopyAllFrames((void *)cyp_ethif_pd[u8EthIfInstance], CY_ETH_ENABLE_1);
396     cyp_ethif_gemgxlobj->setRxBadPreamble((void *)cyp_ethif_pd[u8EthIfInstance], CY_ETH_ENABLE_1);
397 
398     /* Do not drop frames with CRC error */
399     cyp_ethif_gemgxlobj->setIgnoreFcsRx((void *)cyp_ethif_pd[u8EthIfInstance], CY_ETH_ENABLE_1);
400 
401     // Optional: Setting Filter configuration
402     // Optional: setting screen registers
403 
404     /* Enable MDIO */
405     cyp_ethif_gemgxlobj->setMdioEnable((void *)(void *)cyp_ethif_pd[u8EthIfInstance], CY_ETH_ENABLE_1);
406     /* driver start */
407     cyp_ethif_gemgxlobj->start((void *)cyp_ethif_pd[u8EthIfInstance]);
408 
409     return CY_ETHIF_SUCCESS;
410 }
411 
412 /*******************************************************************************
413 * Function Name: Cy_ETHIF_RegisterCallbacks
414 ****************************************************************************//**
415 *
416 * \brief Function loads callback functions to its local data structures.
417 *        The callback functions are called from ISR context.
418 *
419 * \param base
420 * Pointer to register area of Ethernet MAC
421 *
422 * \param cbFuncsList pointer to callback function list
423 *
424 *******************************************************************************/
Cy_ETHIF_RegisterCallbacks(ETH_Type * base,cy_stc_ethif_cb_t * cbFuncsList)425 void Cy_ETHIF_RegisterCallbacks(ETH_Type *base, cy_stc_ethif_cb_t *cbFuncsList)
426 {
427     uint8_t u8EthIfInstance;
428     /* Load the Ethernet instance */
429     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
430 
431     /* Load Callback functions */
432     stccallbackfunctions[u8EthIfInstance].rxframecb       = cbFuncsList->rxframecb;
433     stccallbackfunctions[u8EthIfInstance].txerrorcb       = cbFuncsList->txerrorcb;
434     stccallbackfunctions[u8EthIfInstance].txcompletecb    = cbFuncsList->txcompletecb;
435     stccallbackfunctions[u8EthIfInstance].tsuSecondInccb  = cbFuncsList->tsuSecondInccb;
436     stccallbackfunctions[u8EthIfInstance].rxgetbuff       = cbFuncsList->rxgetbuff;
437 }
438 
439 /*******************************************************************************
440 * Function Name: Cy_ETHIF_TransmitFrame
441 ****************************************************************************//**
442 *
443 * \brief Function initiates transmission of frame data
444 *
445 * \param base
446 * Pointer to register area of Ethernet MAC
447 *
448 * \param pu8TxBuffer pointer to Transmit source buffer. Its caller's responsibility to
449 *                    make sure this buffer is not overwritten until transmit is not
450 *                    completed. \ref Cy_ETHIF_RegisterCallbacks for Tx completion callback.
451 * \param u16Length Length of data to transmit from source buffer, Length should include source
452 *                  and destination buffer address. CRC bytes shall not be included in the length
453 * \param u8QueueIndex Queue to be used to transmit the frame
454 * \param bEndBuffer True - Last buffer of the frame to be transmitted.
455 *                   False - Other Buffers to be provided after function call
456 *                           IP will not start transmitting until it gets EndBuffer True.
457 *
458 * \return CY_ETHIF_SUCCESS Frame transmission started
459 * \return CY_ETHIF_BAD_PARAM Parameter passed contains invalid values
460 * \return CY_ETHIF_BUFFER_NOT_AVAILABLE Buffer not available to load the source data
461 *
462 *******************************************************************************/
Cy_ETHIF_TransmitFrame(ETH_Type * base,uint8_t * pu8TxBuffer,uint16_t u16Length,uint8_t u8QueueIndex,bool bEndBuffer)463 cy_en_ethif_status_t Cy_ETHIF_TransmitFrame(ETH_Type *base, uint8_t * pu8TxBuffer, uint16_t u16Length, uint8_t u8QueueIndex, bool bEndBuffer)
464 {
465     uint8_t u8EthIfInstance;
466     uint8_t u8flags = 0;
467     uint32_t u32result = 0;
468     CEDI_BuffAddr tmpBuffAdd;
469 
470     /* Check for arguments */
471     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
472     {
473         return CY_ETHIF_BAD_PARAM;
474     }
475 
476     /* Check for arguments */
477     if ((pu8TxBuffer == NULL) || (u16Length > CY_ETH_SIZE_MAX_FRAME) || (u8QueueIndex > CY_ETH_QS2_2))
478     {
479         return CY_ETHIF_BAD_PARAM;
480     }
481 
482     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
483 
484     /* Check requested queue enabled or not */
485     if (stcQueueDisStatus[u8EthIfInstance].bTxQueueDisable[u8QueueIndex] == true)
486     {
487         /* Requested Queue is disabled */
488         return CY_ETHIF_BAD_PARAM;
489     }
490 
491     tmpBuffAdd.pAddr = (uintptr_t)pu8TxBuffer;
492     tmpBuffAdd.vAddr = tmpBuffAdd.pAddr;
493 
494 #if ((CY_CPU_CORTEX_M7) && defined (ENABLE_CM7_DATA_CACHE)) || (CY_CPU_CORTEX_M55)
495     SCB_CleanDCache_by_Addr((void*) (tmpBuffAdd.pAddr), (int32_t)u16Length);
496 #endif /* (CY_CPU_CORTEX_M7) && defined (ENABLE_CM7_DATA_CACHE) */
497 
498     /* Typecast bEndBuffer to Flag type    */
499     // TODO: adapt function for CEDI_TXB_NO_AUTO_CRC and CEDI_TXB_NO_AUTO_START
500     if (bEndBuffer == true)
501     {
502         u8flags = CEDI_TXB_LAST_BUFF;
503     }
504 
505     /* Clear transmit status register before begin to transmit */
506     cyp_ethif_gemgxlobj->clearTxStatus((void *)cyp_ethif_pd[u8EthIfInstance], CY_ETHIF_TX_STATUS_CLEAR);
507 
508     g_tx_bdcount[u8EthIfInstance]++;
509 
510     /* wait until tx done successfully */
511     while (g_tx_bdcount[u8EthIfInstance] > CY_ETH_DEFINE_TOTAL_BD_PER_TXQUEUE)
512     {
513         /* Do Nothing */
514         //Cy_SysLib_DelayUs(1);
515     }
516 
517     CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 11.3', 1, 'Intentional typecast of &tmpBuffAdd to CEDI_BuffAddr* struct type.')
518     /* Trigger Internal transmit function  */
519     u32result = cyp_ethif_gemgxlobj->queueTxBuf((void *)cyp_ethif_pd[u8EthIfInstance],
520                                        u8QueueIndex,
521                                        (CEDI_BuffAddr*)&tmpBuffAdd,
522                                        u16Length,
523                                        u8flags);
524     CY_MISRA_BLOCK_END('MISRA C-2012 Rule 11.3')
525 
526     if (0UL != u32result)
527     {
528         /* error   */
529         return CY_ETHIF_BAD_PARAM;
530     }
531 
532     return CY_ETHIF_SUCCESS;
533 }
534 
535 /*******************************************************************************
536 * Function Name: Cy_ETHIF_TxPauseFrame
537 ****************************************************************************//**
538 *
539 * \brief Transmits IEEE 802.3X standard Pause Frame
540 *
541 * \param base
542 * Pointer to register area of Ethernet MAC
543 *
544 * \param bZeroTQ  True - Zero Time Quanta
545 *        bZeroTQ  False - Transmit pause frame with set time quanta
546 *
547 * \return CY_ETHIF_SUCCESS for success
548 * \return CY_ETHIF_BAD_PARAM for wrong input parameters
549 * \note If interrupt enabled, interrupt will be triggered at the end of the transmission
550 *
551 *******************************************************************************/
Cy_ETHIF_TxPauseFrame(ETH_Type * base,bool bZeroTQ)552 cy_en_ethif_status_t Cy_ETHIF_TxPauseFrame(ETH_Type *base, bool bZeroTQ)
553 {
554     uint8_t u8EthIfInstance;
555     /* check for arguments */
556     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
557     {
558         return CY_ETHIF_BAD_PARAM;
559     }
560 
561     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
562 
563     if (bZeroTQ == true)
564     {
565         /* trigger Pause frame with Zero Time Quanta */
566         cyp_ethif_gemgxlobj->txZeroQPause((void *)cyp_ethif_pd[u8EthIfInstance]);
567     }
568     else
569     {
570         cyp_ethif_gemgxlobj->txPauseFrame((void *)cyp_ethif_pd[u8EthIfInstance]);
571     }
572 
573     return CY_ETHIF_SUCCESS;
574 }
575 
576 /*******************************************************************************
577 * Function Name: Cy_ETHIF_ConfigPause
578 ****************************************************************************//**
579 *
580 * \brief Configures the Pause Frame transmission according to IEEE 802.3X standard
581 *
582 * \param base
583 * Pointer to register area of Ethernet MAC
584 * \param u16PauseQuanta Time Quanta
585 *
586 * \return CY_ETHIF_SUCCESS for success
587 * \return CY_ETHIF_BAD_PARAM for wrong input parameters
588 *
589 *******************************************************************************/
Cy_ETHIF_ConfigPause(ETH_Type * base,uint16_t u16PauseQuanta)590 cy_en_ethif_status_t Cy_ETHIF_ConfigPause(ETH_Type *base, uint16_t u16PauseQuanta)
591 {
592     uint8_t u8EthIfInstance;
593     /* check for arguments */
594     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
595     {
596         return CY_ETHIF_BAD_PARAM;
597     }
598 
599     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
600 
601     /* Set Tx Pause Quanta for Priority 0   */
602     if (((uint32_t)EOK) != cyp_ethif_gemgxlobj->setTxPauseQuantum((void *)cyp_ethif_pd[u8EthIfInstance], u16PauseQuanta, CY_ETHIF_PAUSE_P0))
603     {
604         return CY_ETHIF_BAD_PARAM;
605     }
606 
607     /* Enable Receive Pause Frames */
608     cyp_ethif_gemgxlobj->setCopyPauseDisable((void *)cyp_ethif_pd[u8EthIfInstance], CY_ETH_DISABLE_0);
609 
610     /* Enable Pause Frames */
611     cyp_ethif_gemgxlobj->setPauseEnable((void *)cyp_ethif_pd[u8EthIfInstance], CY_ETH_ENABLE_1);
612 
613     return CY_ETHIF_SUCCESS;
614 }
615 
616 /*******************************************************************************
617 * Function Name: Cy_ETHIF_SetNoBroadCast
618 ****************************************************************************//**
619 *
620 * \brief Enable/Disable receive of broadcast frames
621 *
622 * \param base
623 * Pointer to register area of Ethernet MAC
624 *
625 * \param rejectBC if =0 broadcasts are accepted, if =1 they are rejected.
626 *
627 *******************************************************************************/
Cy_ETHIF_SetNoBroadCast(ETH_Type * base,bool rejectBC)628 void Cy_ETHIF_SetNoBroadCast(ETH_Type *base, bool rejectBC)
629 {
630     uint8_t u8EthIfInstance;
631     /* check for arguments */
632     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
633     {
634         CY_ASSERT(0UL);
635     }
636     else
637     {
638         u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
639 
640         cyp_ethif_gemgxlobj->setNoBroadcast((void *)cyp_ethif_pd[u8EthIfInstance],rejectBC);
641     }
642 }
643 
644 
645 /*******************************************************************************
646 * Function Name: Cy_ETHIF_SetPromiscuousMode
647 ****************************************************************************//**
648 *
649 * \brief Enable/Disable to capture all frames
650 *
651 * \param  base Pointer to register area of Ethernet MAC
652 * \param  toBeEnabled if =1 enables copy all frames mode, if =0 then this is disabled
653 *
654 *******************************************************************************/
Cy_ETHIF_SetPromiscuousMode(ETH_Type * base,bool toBeEnabled)655 void Cy_ETHIF_SetPromiscuousMode(ETH_Type *base, bool toBeEnabled)
656 {
657     uint8_t u8EthIfInstance;
658     /* check for arguments */
659     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
660     {
661         CY_ASSERT(0UL);
662     }
663     else
664     {
665         u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
666 
667         cyp_ethif_gemgxlobj->setCopyAllFrames((void *)cyp_ethif_pd[u8EthIfInstance],toBeEnabled);
668     }
669 }
670 
671 /*******************************************************************************
672 * Function : Cy_ETHIF_SetFilterAddress
673 ****************************************************************************//**
674 *
675 * \brief Set Filter Address with specific filter number
676 *
677 * \param base Pointer to register area of Ethernet MAC
678 *
679 * \param  filterNo Filter number
680 *         config Filter configuration for Ethernet MAC
681 *
682 * \param  config config
683 *
684 * \return CY_ETHIF_SUCCESS Filter is set
685 * \return CY_ETHIF_BAD_PARAM Parameter passed contains invalid values
686 *
687 * \note
688 * Maximum 4 filters can be set
689 *
690 *******************************************************************************/
Cy_ETHIF_SetFilterAddress(ETH_Type * base,cy_en_ethif_filter_num_t filterNo,const cy_stc_ethif_filter_config_t * config)691 cy_en_ethif_status_t Cy_ETHIF_SetFilterAddress(ETH_Type *base, cy_en_ethif_filter_num_t filterNo, const cy_stc_ethif_filter_config_t* config)
692 {
693     uint8_t u8EthIfInstance;
694     /* check for arguments */
695     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
696     {
697         return CY_ETHIF_BAD_PARAM;
698     }
699 
700     if(filterNo >= CY_ETHIF_FILTER_NUM_INV)
701     {
702         return CY_ETHIF_BAD_PARAM;
703     }
704 
705     if(config == NULL)
706     {
707         return CY_ETHIF_BAD_PARAM;
708     }
709 
710     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
711 
712     /* add some address filters */
713 
714     CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 11.3', 1, 'Intentional typecast of &config->filterAddr to CEDI_MacAddress* struct type.')
715     (void)cyp_ethif_gemgxlobj->setSpecificAddr((void *)cyp_ethif_pd[u8EthIfInstance],
716                                         filterNo,
717                                         (CEDI_MacAddress*)&config->filterAddr,
718                                         config->typeFilter,
719                                         config->ignoreBytes);
720     CY_MISRA_BLOCK_END('MISRA C-2012 Rule 11.3')
721 
722     return CY_ETHIF_SUCCESS;
723 }
724 
725 /*******************************************************************************
726 * Function Name: Cy_ETHIF_PhyRegRead
727 ****************************************************************************//**
728 *
729 * \brief Local function used by other APIs to read the PHY register.
730 *
731 * \param base
732 * Pointer to register area of Ethernet MAC
733 *
734 * \param u8RegNo Register to read
735 *
736 * \param u8PHYAddr u8PHYAddr
737 *
738 * \return read data from the register
739 *
740 * \note
741 * CY_ETH_PHY_ADDR must match with PHY.
742 * PHY data-sheet and hardware schematic shall be checked
743 *
744 *******************************************************************************/
Cy_ETHIF_PhyRegRead(ETH_Type * base,uint8_t u8RegNo,uint8_t u8PHYAddr)745 uint32_t Cy_ETHIF_PhyRegRead(ETH_Type *base, uint8_t u8RegNo, uint8_t u8PHYAddr)
746 {
747     uint32_t    u32result;
748     uint16_t    u16ReadData;
749     uint8_t u8EthIfInstance;
750 
751     /* check for arguments */
752     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
753     {
754         return (uint32_t)CY_ETHIF_BAD_PARAM;
755     }
756 
757     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
758 
759     cyp_ethif_gemgxlobj->phyStartMdioRead( (void *)cyp_ethif_pd[u8EthIfInstance], CY_ETHIF_PHY_FLAG, u8PHYAddr, u8RegNo);
760 
761     while(cyp_ethif_gemgxlobj->getMdioIdle((void *)cyp_ethif_pd[u8EthIfInstance]) != CY_ETH_MDIO_BUSY_0)
762     {
763         /* poll till operation completes */
764     }
765 
766     /* additional wait before read data */
767     Cy_SysLib_DelayUs(800);
768 
769     u32result = cyp_ethif_gemgxlobj->getMdioReadData((void *)cyp_ethif_pd[u8EthIfInstance], &u16ReadData);
770     if (0UL != u32result)
771     {
772         u16ReadData = 0;
773         CY_ASSERT(0UL);
774     }
775 
776     return (uint32_t)u16ReadData;
777 }
778 
779 /*******************************************************************************
780 * Function Name: Cy_ETHIF_PhyRegWrite
781 ****************************************************************************//**
782 *
783 * \brief Local function used by other APIs to write the PHY register
784 *
785 * \param base Pointer to register area of Ethernet MAC
786 * \param u8RegNo Register to write
787 * \param u16Data data to write
788 * \param u8PHYAddr u8PHYAddr
789 *
790 * \return CY_ETHIF_SUCCESS PHY write is successful
791 * \return CY_ETHIF_BAD_PARAM Parameter passed contains invalid values
792 *
793 * \note
794 * u8PHYAddr must match with PHY.
795 * PHY data-sheet and hardware schematic shall be checked
796 *
797 *******************************************************************************/
Cy_ETHIF_PhyRegWrite(ETH_Type * base,uint8_t u8RegNo,uint16_t u16Data,uint8_t u8PHYAddr)798 cy_en_ethif_status_t Cy_ETHIF_PhyRegWrite(ETH_Type *base, uint8_t u8RegNo, uint16_t u16Data, uint8_t u8PHYAddr)
799 {
800     uint8_t u8EthIfInstance;
801 
802     /* check for arguments */
803     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
804     {
805         return CY_ETHIF_BAD_PARAM;
806     }
807 
808     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
809 
810     cyp_ethif_gemgxlobj->phyStartMdioWrite( (void *)cyp_ethif_pd[u8EthIfInstance], CY_ETHIF_PHY_FLAG, u8PHYAddr, u8RegNo, u16Data );
811     /* poll till operation completes */
812     while (cyp_ethif_gemgxlobj->getMdioIdle((void *)cyp_ethif_pd[u8EthIfInstance]) != CY_ETH_MDIO_BUSY_0)
813     {
814         /* */
815     }
816 
817     /* additional wait */
818     Cy_SysLib_DelayUs(200);
819     return CY_ETHIF_SUCCESS;
820 }
821 
822 
823 /*******************************************************************************
824 * Function Name: Cy_ETHIF_GetTimerValue
825 ****************************************************************************//**
826 *
827 * \brief Returns the current timer value from TSU register
828 *
829 * \param base Pointer to register area of Ethernet MAC
830 * \param stcRetTmrValue [out] pointer to data structure to return the values
831 *
832 * \return CY_ETHIF_SUCCESS Timer value is successfully retrieved
833 * \return CY_ETHIF_BAD_PARAM Parameter passed contains invalid values
834 *
835 *******************************************************************************/
Cy_ETHIF_Get1588TimerValue(ETH_Type * base,cy_stc_ethif_1588_timer_val_t * stcRetTmrValue)836 cy_en_ethif_status_t Cy_ETHIF_Get1588TimerValue(ETH_Type *base, cy_stc_ethif_1588_timer_val_t *stcRetTmrValue)
837 {
838     uint8_t u8EthIfInstance;
839 
840     /* check for arguments */
841     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
842     {
843         return CY_ETHIF_BAD_PARAM;
844     }
845 
846     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
847 
848     if (stcRetTmrValue == NULL)
849     {
850         return CY_ETHIF_BAD_PARAM;
851     }
852 
853     CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 11.3','Intentional typecast of stcRetTmrValue to CEDI_1588TimerVal* struct type.');
854     (void)cyp_ethif_gemgxlobj->get1588Timer((void *)cyp_ethif_pd[u8EthIfInstance], (CEDI_1588TimerVal*)stcRetTmrValue);
855 
856     return CY_ETHIF_SUCCESS;
857 }
858 
859 /*******************************************************************************
860 * Function Name: Cy_ETHIF_SetTimerValue
861 ****************************************************************************//**
862 *
863 * \brief Setting the current timer value in TSU register
864 *
865 * \param base Pointer to register area of Ethernet MAC
866 * \param pstcTmrValue pointer to data structure to configure register with
867 *
868 * \return CY_ETHIF_SUCCESS Timer value is set
869 * \return CY_ETHIF_BAD_PARAM Parameter passed contains invalid values
870 *
871 *******************************************************************************/
Cy_ETHIF_Set1588TimerValue(ETH_Type * base,cy_stc_ethif_1588_timer_val_t * pstcTmrValue)872 cy_en_ethif_status_t Cy_ETHIF_Set1588TimerValue(ETH_Type *base, cy_stc_ethif_1588_timer_val_t *pstcTmrValue)
873 {
874     uint8_t u8EthIfInstance;
875 
876     /* check for arguments */
877     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
878     {
879         return CY_ETHIF_BAD_PARAM;
880     }
881 
882     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
883 
884     if (pstcTmrValue == NULL)
885     {
886         return CY_ETHIF_BAD_PARAM;
887     }
888 
889     CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 11.3','Intentional typecast of stcRetTmrValue to CEDI_1588TimerVal* struct type.');
890     if (((uint32_t)EOK) != cyp_ethif_gemgxlobj->set1588Timer((void *)cyp_ethif_pd[u8EthIfInstance], (CEDI_1588TimerVal*)pstcTmrValue))
891     {
892         /* Reason could be Null pointer, hardware does not support TSU or pstcTimerValue.nanosecs>0x3FFFFFFF */
893         return CY_ETHIF_BAD_PARAM;
894     }
895 
896     return CY_ETHIF_SUCCESS;
897 }
898 
899 /*******************************************************************************
900 * Function Name: Cy_ETHIF_DecodeEvent
901 ****************************************************************************//**
902 *
903 * \brief Interrupt handler for a particular Ethernet instance. It decodes the
904 * interrupt cause and calls the appropriate registered callback functions.
905 *
906 * \param base Pointer to register area of Ethernet MAC
907 *
908 *******************************************************************************/
Cy_ETHIF_DecodeEvent(ETH_Type * base)909 void Cy_ETHIF_DecodeEvent(ETH_Type *base)
910 {
911     uint8_t u8EthIfInstance;
912 
913     /* check for arguments */
914     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
915     {
916         CY_ASSERT(0UL);
917     }
918     else
919     {
920         u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
921 
922         (void)cyp_ethif_gemgxlobj->isr((void *)cyp_ethif_pd[u8EthIfInstance]);
923     }
924 }
925 
926 
927 /*******************************************************************************
928 * Function Name: Cy_ETHIF_DiscardNonVLANFrames
929 ****************************************************************************//**
930 *
931 * \brief With VLAN tagged frame processing setup, this function configure
932 * MAC to receive only VLAN tagged frames and discard all.
933 *
934 * \param base Pointer to Ethernet Instance
935 * \param enable if =1 reject non-VLAN-tagged frames, if =0 then accept
936 *
937 *******************************************************************************/
Cy_ETHIF_DiscardNonVLANFrames(ETH_Type * base,bool enable)938 void Cy_ETHIF_DiscardNonVLANFrames(ETH_Type *base, bool enable)
939 {
940     uint8_t u8EthIfInstance;
941 
942     /* check for arguments */
943     if (!CY_ETHIF_IS_IP_INSTANCE_VALID(base))
944     {
945         CY_ASSERT(0UL);
946     }
947     else
948     {
949         u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
950 
951         cyp_ethif_gemgxlobj->setVlanOnly((void *)cyp_ethif_pd[u8EthIfInstance], (uint8_t)(enable ? 1 : 0));
952     }
953 
954 }
955 
956 
957 /*##############################################################################
958  *      Internal Functions
959  *############################################################################*/
960 
961 
962 /*******************************************************************************
963 * Function Name: Cy_ETHIF_EnableInterrupts
964 ****************************************************************************//**
965 *
966 * \brief Function initializes enabled Interrupt
967 *
968 * \param u8EthIfInstance Ethernet Instance
969 * \param pstcInterruptList pointer to structure list
970 *
971 *******************************************************************************/
Cy_ETHIF_EnableInterrupts(uint8_t u8EthIfInstance,cy_stc_ethif_intr_config_t * pstcInterruptList)972 static void Cy_ETHIF_EnableInterrupts (uint8_t u8EthIfInstance, cy_stc_ethif_intr_config_t * pstcInterruptList)
973 {
974     uint32_t u32InterruptEn = 0;
975 
976     if (pstcInterruptList->btsu_time_match == true)
977     {
978         u32InterruptEn |= ((uint32_t)CEDI_EV_TSU_TIME_MATCH);
979     }
980     if (pstcInterruptList->bwol_rx == true)
981     {
982         u32InterruptEn |= ((uint32_t)CEDI_EV_WOL_RX);
983     }
984     if (pstcInterruptList->blpi_ch_rx == true)
985     {
986         u32InterruptEn |= ((uint32_t)CEDI_EV_LPI_CH_RX);
987     }
988     if (pstcInterruptList->btsu_sec_inc == true)
989     {
990         u32InterruptEn |= ((uint32_t)CEDI_EV_TSU_SEC_INC);
991     }
992     if (pstcInterruptList->bptp_tx_pdly_rsp == true)
993     {
994         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_TX_PDLY_RSP);
995     }
996     if (pstcInterruptList->bptp_tx_pdly_req == true)
997     {
998         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_TX_PDLY_REQ);
999     }
1000     if (pstcInterruptList->bptp_rx_pdly_rsp == true)
1001     {
1002         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_RX_PDLY_RSP);
1003     }
1004     if (pstcInterruptList->bptp_rx_pdly_req == true)
1005     {
1006         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_RX_PDLY_REQ);
1007     }
1008     if (pstcInterruptList->bptp_tx_sync == true)
1009     {
1010         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_TX_SYNC);
1011     }
1012     if (pstcInterruptList->bptp_tx_dly_req == true)
1013     {
1014         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_TX_DLY_REQ);
1015     }
1016     if (pstcInterruptList->bptp_rx_sync == true)
1017     {
1018         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_RX_SYNC);
1019     }
1020     if (pstcInterruptList->bptp_rx_dly_req == true)
1021     {
1022         u32InterruptEn |= ((uint32_t)CEDI_EV_PTP_RX_DLY_REQ);
1023     }
1024     if (pstcInterruptList->bpause_frame_tx == true)
1025     {
1026         u32InterruptEn |= ((uint32_t)CEDI_EV_PAUSE_FRAME_TX);
1027     }
1028     if (pstcInterruptList->bpause_time_zero == true)
1029     {
1030         u32InterruptEn |= ((uint32_t)CEDI_EV_PAUSE_TIME_ZERO);
1031     }
1032     if (pstcInterruptList->bpause_nz_qu_rx == true)
1033     {
1034         u32InterruptEn |= ((uint32_t)CEDI_EV_PAUSE_NZ_QU_RX);
1035     }
1036     if (pstcInterruptList->bhresp_not_ok == true)
1037     {
1038         u32InterruptEn |= ((uint32_t)CEDI_EV_HRESP_NOT_OK);
1039     }
1040     if (pstcInterruptList->brx_overrun == true)
1041     {
1042         u32InterruptEn |= ((uint32_t)CEDI_EV_RX_OVERRUN);
1043     }
1044     if (pstcInterruptList->btx_complete == true)
1045     {
1046         u32InterruptEn |= ((uint32_t)CEDI_EV_TX_COMPLETE);
1047     }
1048     if (pstcInterruptList->btx_fr_corrupt == true)
1049     {
1050         u32InterruptEn |= ((uint32_t)CEDI_EV_TX_FR_CORRUPT);
1051     }
1052     if (pstcInterruptList->btx_retry_ex_late_coll == true)
1053     {
1054         u32InterruptEn |=((uint32_t)CEDI_EV_TX_RETRY_EX_LATE_COLL);
1055     }
1056     if (pstcInterruptList->btx_underrun == true)
1057     {
1058         u32InterruptEn |= ((uint32_t)CEDI_EV_TX_UNDERRUN);
1059     }
1060     if (pstcInterruptList->btx_used_read == true)
1061     {
1062         u32InterruptEn |= ((uint32_t)CEDI_EV_TX_USED_READ);
1063     }
1064     if (pstcInterruptList->brx_used_read == true)
1065     {
1066         u32InterruptEn |= ((uint32_t)CEDI_EV_RX_USED_READ);
1067     }
1068     if (pstcInterruptList->brx_complete == true)
1069     {
1070         u32InterruptEn |= ((uint32_t)CEDI_EV_RX_COMPLETE);
1071     }
1072     if (pstcInterruptList->bman_frame == true)
1073     {
1074         u32InterruptEn |= ((uint32_t)CEDI_EV_MAN_FRAME);
1075     }
1076 
1077     cy_ethif_cfg[u8EthIfInstance].intrEnable = u32InterruptEn;
1078 }
1079 
1080 /*******************************************************************************
1081 * Function Name: Cy_ETHIF_PrepareConfiguration
1082 ****************************************************************************//**
1083 *
1084 * \brief prepares configuration based on the parameter passed to Cy_ETHIF_Init
1085 * function. This prepared configuration which is dedicated for specific Ethernet
1086 * instance would be used to initialize Ethernet MAC
1087 *
1088 * \param u8EthIfInstance Ethernet Instance
1089 * \param config Pointer to Ethernet configuration passed from Application layer
1090 *
1091 *******************************************************************************/
Cy_ETHIF_PrepareConfiguration(uint8_t u8EthIfInstance,cy_stc_ethif_mac_config_t * pstcEthIfConfig)1092 static void Cy_ETHIF_PrepareConfiguration(uint8_t u8EthIfInstance, cy_stc_ethif_mac_config_t * pstcEthIfConfig )
1093 {
1094     uint8_t u8QueueCounter = 0u;
1095 
1096     #if defined(CY_IP_MXETH_INSTANCES) && (CY_IP_MXETH_INSTANCES > 1u)
1097     CY_ASSERT(u8EthIfInstance <= 1u);
1098     #else
1099     CY_ASSERT(u8EthIfInstance == 0u);
1100     #endif
1101 
1102     /** Clear configuration table   */
1103     (void)memset((void *)&cy_ethif_cfg[u8EthIfInstance], 0, sizeof(cy_ethif_cfg[u8EthIfInstance]));
1104 
1105     /** Load GEM_GXL register base address  */
1106     cy_ethif_cfg[u8EthIfInstance].regBase = CY_ETHIF_GEMGXL_ADDR_REGBASE(u8EthIfInstance);
1107      //(u8EthIfInstance == CY_ETHIF_INSTANCE_0) ? CY_ETH0_GEMGXL_ADDR_REGBASE : CY_ETH1_GEMGXL_ADDR_REGBASE;
1108 
1109     /** Prepare Queues  */
1110     cy_ethif_cfg[u8EthIfInstance].rxQs = CY_ETH_DEFINE_NUM_RXQS;
1111     cy_ethif_cfg[u8EthIfInstance].txQs = CY_ETH_DEFINE_NUM_TXQS;
1112 
1113     for (u8QueueCounter=0; u8QueueCounter<cy_ethif_cfg[u8EthIfInstance].rxQs; u8QueueCounter++) {
1114         cy_ethif_cfg[u8EthIfInstance].rxQLen[u8QueueCounter] = CY_ETH_DEFINE_TOTAL_BD_PER_RXQUEUE;
1115     }
1116 
1117     for (u8QueueCounter=0; u8QueueCounter<cy_ethif_cfg[u8EthIfInstance].txQs; u8QueueCounter++) {
1118         cy_ethif_cfg[u8EthIfInstance].txQLen[u8QueueCounter] = CY_ETH_DEFINE_TOTAL_BD_PER_TXQUEUE;
1119     }
1120 
1121     /** Prepare Network control Register    */
1122     cy_ethif_cfg[u8EthIfInstance].pfcMultiQuantum    = 0;                                       /* bit25    pfc_ctrl              */
1123     cy_ethif_cfg[u8EthIfInstance].enExtTsuPort       = 0;                                       /* bit23    ext_tsu_port_enable, Not supported by hardware  */
1124     cy_ethif_cfg[u8EthIfInstance].storeUdpTcpOffset  = 0;                                       /* bit22    store_udp_offset      */
1125     cy_ethif_cfg[u8EthIfInstance].altSgmiiEn         = 0;                                       /* bit21    alt_sgmii_mode, Not supported by hardware       */
1126     cy_ethif_cfg[u8EthIfInstance].enableMdio         = 0;                                       /* bit4     man_port_en, Bit is separately enabled during MDIO operation  */
1127 
1128     /** Prepare Network Configuration Register    */
1129     cy_ethif_cfg[u8EthIfInstance].uniDirEnable       = 0;                                       /* bit31    uni_direction_enable, Not supported by hardware    */
1130     cy_ethif_cfg[u8EthIfInstance].ignoreIpgRxEr      = 0;                                       /* bit30    ignore_ipg_rx_er, Not supported by hardware        */
1131     cy_ethif_cfg[u8EthIfInstance].enRxBadPreamble    = pstcEthIfConfig->u8enRxBadPreamble;      /* bit29    nsp_change           */
1132     // cy_ethif_cfg[u8EthIfInstance].ifTypeSel          = pstcEthIfConfig->ifTypeSel;              /* bit27    sgmii_mode_enable  (reserved)  */
1133                                                                                                 /*          (see the following)  */
1134     // don't care                                                                               /* bit26    ignore_rx_fcs        */
1135     cy_ethif_cfg[u8EthIfInstance].enRxHalfDupTx      = 0;                                       /* bit25    en_half_duplex_rx, not supported by hardware    */
1136     cy_ethif_cfg[u8EthIfInstance].chkSumOffEn        = pstcEthIfConfig->u8chkSumOffEn;          /* bit24    receive_checksum_offload_enable */
1137     cy_ethif_cfg[u8EthIfInstance].disCopyPause       = pstcEthIfConfig->u8disCopyPause;         /* bit23    disable_copy_of_pause_frames */
1138     #if defined(ETH_AXI_MASTER_PRESENT) && (ETH_AXI_MASTER_PRESENT == 1U)
1139         cy_ethif_cfg[u8EthIfInstance].dmaBusWidth    = CEDI_DMA_BUS_WIDTH_64;                   /* bit22:21 data bus with        */
1140     #else
1141         cy_ethif_cfg[u8EthIfInstance].dmaBusWidth    = CEDI_DMA_BUS_WIDTH_32;                   /* bit22:21 data bus with        */
1142     #endif
1143                                                                                                 /* 00:32bit 01:64bit    */
1144     cy_ethif_cfg[u8EthIfInstance].mdcPclkDiv         = (CEDI_MdcClkDiv)pstcEthIfConfig->mdcPclkDiv;             /* bit20:18 mdc_clock_division   */
1145                                                                                                 /*          010: Divide 32       */
1146                                                                                                 /*          011: Divide 48       */
1147     // don't care                                                                               /* bit17    fcs_remove           */
1148     cy_ethif_cfg[u8EthIfInstance].rxLenErrDisc       = pstcEthIfConfig->u8rxLenErrDisc;         /* bit16    length_field_error_frame_discard */
1149     cy_ethif_cfg[u8EthIfInstance].rxBufOffset        = 0;                                       /* bit15:14 receive_buffer_offset */
1150     // don't care                                                                               /* bit13    pause_enable         */
1151     // don't care                                                                               /* bit12    retry_test           */
1152     //cy_ethif_cfg[u8EthIfInstance].ifTypeSel        = pstcEthIfConfig->ifTypeSel               /* bit11    pcs_select (reserved)*/
1153                                                                                                 /*          (see the following)  */
1154     //cy_ethif_cfg[u8EthIfInstance].ifTypeSel        = pstcEthIfConfig->ifTypeSel               /* bit10    gigabit_mode_enable  */
1155                                                                                                 /*          (see the following)  */
1156     cy_ethif_cfg[u8EthIfInstance].extAddrMatch       = 0;                                       /* bit9     external_address_match_enable, not supported by hardware */
1157     cy_ethif_cfg[u8EthIfInstance].rx1536ByteEn       = pstcEthIfConfig->u8rx1536ByteEn;         /* bit8     receive_1536_byte_frames */
1158     // don't care                                                                               /* bit7     unicast_hash_enable  */
1159     // don't care                                                                               /* bit6     multicast_hash_enable  */
1160     // don't care                                                                               /* bit5     no_broadcast         */
1161     // don't care                                                                               /* bit4     copy_all_frames      */
1162     cy_ethif_cfg[u8EthIfInstance].rxJumboFrEn        = pstcEthIfConfig->u8rxJumboFrEn;          /* bit3     jumbo_frames         */
1163     // don't care                                                                               /* bit2     discard_non_vlan_frames */
1164     cy_ethif_cfg[u8EthIfInstance].fullDuplex         = 1;                                       /* bit1     full_duplex          */
1165     //cy_ethif_cfg[u8EthIfInstance].ifTypeSel        = pstcEthIfConfig->ifTypeSel               /* bit0     speed                */
1166 
1167     /** configuration for cy_ethif_cfg[u8EthIfInstance].ifTypeSel    */
1168     if ((pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_MII_10) ||
1169        (pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RGMII_10) ||
1170        (pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RMII_10))
1171     {
1172        cy_ethif_cfg[u8EthIfInstance].ifTypeSel = CEDI_IFSP_10M_MII;
1173     }
1174     else if ((pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_MII_100) ||
1175         (pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RMII_100) ||
1176         (pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RGMII_100))
1177     {
1178         cy_ethif_cfg[u8EthIfInstance].ifTypeSel = CEDI_IFSP_100M_MII;
1179     }
1180     else
1181     {
1182         if ((pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_GMII_1000) ||
1183             (pstcEthIfConfig->pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RGMII_1000))
1184         {
1185             cy_ethif_cfg[u8EthIfInstance].ifTypeSel = CEDI_IFSP_1000M_GMII;
1186         }
1187         else
1188         {
1189             /* */
1190         }
1191     }
1192 
1193     /*=================================================================================================*/
1194     /* CTL.ETH_MODE   |	Network_config[0] |  Network_config[10]   |	    PHY mode                       */
1195     /*                |     (speed)       | (gigabit_mode_enable) |                                    */
1196     /*=================================================================================================*/
1197     /*       2’d0	  |          0	      |          0       	  |   MII - 10Mbps                     */
1198     /*       2’d0	  |          1	      |          0       	  |   MII – 100Mbps                    */
1199     /*       2’d1	  |          0	      |          1       	  |   GMII – 1000Mbps                  */
1200     /*       2’d2	  |          0	      |          0       	  |   RGMII – 10Mbps (4bits/Cycle)     */
1201     /*       2’d2	  |          1	      |          0       	  |   RGMII – 100Mbps (4bits/Cycle)    */
1202     /*       2’d2	  |          0	      |          1       	  |   RGMII – 1000Mbps (8bits/Cycle)   */
1203     /*       2’d3	  |          0	      |          0       	  |   RMII – 10Mbps                    */
1204     /*       2’d3	  |          1	      |          0       	  |   RMII – 100Mbps                   */
1205     /*=================================================================================================*/
1206 
1207     /** Prepare DMA Config register */
1208     cy_ethif_cfg[u8EthIfInstance].dmaAddrBusWidth    = 0;                                       /* bit30  DMA address bus width. 0 =32b , 1=64b    */
1209                                                                                                 /* 0:32bit 1:64bit         */
1210     cy_ethif_cfg[u8EthIfInstance].enTxExtBD          = CY_ETH_DEFINE_BD;                               /* bit29  tx_bd_extended_mode_en  */
1211     cy_ethif_cfg[u8EthIfInstance].enRxExtBD          = CY_ETH_DEFINE_BD;                               /* bit28  rx_bd_extended_mode_en  */
1212     cy_ethif_cfg[u8EthIfInstance].dmaCfgFlags        = pstcEthIfConfig->u8dmaCfgFlags;          /* bit26  force_max_amba_burst_tx */
1213                                                                                                 /* bit25  force_max_amba_burst_rx */
1214                                                                                                 /* bit24  force_discard_on_err    */
1215     for (u8QueueCounter=0; u8QueueCounter<cy_ethif_cfg[u8EthIfInstance].rxQs; u8QueueCounter++) {
1216         cy_ethif_cfg[u8EthIfInstance].rxBufLength[u8QueueCounter] = CY_ETH_SIZE_BUF_TXQ_RXQ >> 6;            /* bit23:16 rx_buf_size       */
1217     }
1218 
1219     cy_ethif_cfg[u8EthIfInstance].txPktBufSize       = CY_ETH_TX_PBUF_SIZE;                     /* bit10  tx_pbuf_size            */
1220     cy_ethif_cfg[u8EthIfInstance].rxPktBufSize       = CY_ETH_RX_PBUF_SIZE;                     /* bit9:8 rx_pbuf_size            */
1221     cy_ethif_cfg[u8EthIfInstance].dmaEndianism       = 0;                                       /* bit7   endian_swap_packet  */
1222                                                                                                 /*        0: little endian mode */
1223                                                                                                 /*        1: endian swap mode enable for packet data (CEDI_END_SWAP_DATA) */
1224                                                                                                 /* bit6   endian_swap_management   */
1225                                                                                                 /*        0: little endian mode    */
1226                                                                                                 /*        1: endian swap mode enable for management descriptor (CEDI_END_SWAP_DESC) */
1227     cy_ethif_cfg[u8EthIfInstance].dmaDataBurstLen    = (CEDI_DmaDatBLen)pstcEthIfConfig->dmaDataBurstLen;        /* bit4:0   amba_burst_length                                         */
1228                                                                                                 /* 1xxxx: attempt use burst up to 16 (CEDI_DMA_DBUR_LEN_16)  */
1229                                                                                                 /* 01xxx: attempt use burst up to  8 (CEDI_DMA_DBUR_LEN_8)   */
1230                                                                                                 /* 001xx: attempt use burst up to  4 (CEDI_DMA_DBUR_LEN_4)   */
1231                                                                                                 /* 0001x: always use single burst                            */
1232                                                                                                 /* 00001: always use single burst    (CEDI_AMBD_BURST_LEN_1) */
1233                                                                                                 /* 00000: best AXI burst up to 256 beats                     */
1234 
1235     /** Prepare upper_tx_q_base_addr and upper_rx_q_base_addr register (0x4c8, 0x4D4)   */
1236     cy_ethif_cfg[u8EthIfInstance].upper32BuffTxQAddr = 0;                                       /* bit31:0  not used              */
1237     cy_ethif_cfg[u8EthIfInstance].upper32BuffRxQAddr = 0;                                       /* bit31:0  not used              */
1238 
1239     /** axi_max_pipeline register    */
1240     cy_ethif_cfg[u8EthIfInstance].aw2wMaxPipeline    = pstcEthIfConfig->u8aw2wMaxPipeline;      /* bit15:8  aw2w_max_pipeline     */
1241     cy_ethif_cfg[u8EthIfInstance].ar2rMaxPipeline    = pstcEthIfConfig->u8ar2rMaxPipeline;      /* bit 7:0  ar2r_max_pipeline     */
1242 }
1243 
1244 
1245 /*******************************************************************************
1246 * Function Name: Cy_ETHIF_WrapperConfig
1247 ****************************************************************************//**
1248 *
1249 * \brief Function initializes Ethernet Wrapper to configure Interface mode, reference clock/divider etc
1250 *
1251 * \param u8EthIfInstance Ethernet Instance
1252 * \param pstcInterruptList pointer to structure list
1253 *
1254 * \return CY_ETHIF_SUCCESS Configuration is done
1255 * \return CY_ETHIF_BAD_PARAM Parameter passed contains invalid values
1256 *
1257 *******************************************************************************/
Cy_ETHIF_WrapperConfig(uint8_t u8EthIfInstance,cy_stc_ethif_wrapper_config_t * pstcWrapperConfig)1258 static cy_en_ethif_status_t Cy_ETHIF_WrapperConfig(uint8_t u8EthIfInstance, cy_stc_ethif_wrapper_config_t * pstcWrapperConfig )
1259 {
1260     ETH_Type *base;
1261     uint32_t mode, srcSel, clkDiv;
1262 
1263     if (pstcWrapperConfig->stcInterfaceSel > CY_ETHIF_CTL_RMII_100)
1264     {
1265         return CY_ETHIF_BAD_PARAM;
1266     }
1267 
1268     //pstcEthConfig = (u8EthIfInstance == CY_ETHIF_INSTANCE_0) ? (stc_ETH_t*)CY_ETH0_ADDR_REG_BASE : (stc_ETH_t*)CY_ETH1_ADDR_REG_BASE;
1269     base = CY_ETHIF_IP_ADDR_REGBASE(u8EthIfInstance);
1270 
1271     if ((pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_MII_10) ||
1272        (pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_MII_100))
1273     {
1274        mode = 0;
1275     }
1276     else if (pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_GMII_1000)
1277     {
1278         mode = 1;
1279     }
1280     else if ((pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RGMII_10) ||
1281             (pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RGMII_100) ||
1282             (pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RGMII_1000))
1283     {
1284         mode = 2;
1285     }
1286     else if ((pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RMII_10) ||
1287             (pstcWrapperConfig->stcInterfaceSel == CY_ETHIF_CTL_RMII_100))
1288     {
1289         mode = 3;
1290     }
1291     else
1292     {
1293         return CY_ETHIF_BAD_PARAM;
1294     }
1295 
1296     srcSel =  (uint32_t)(pstcWrapperConfig->bRefClockSource);
1297     clkDiv = (((uint32_t)pstcWrapperConfig->u8RefClkDiv) - 1U);        /** NOTE: This bits are not part of eth header file as of now   */
1298 
1299     //pstcEthConfig->unCTL.u32Register = unEthCtl.u32Register;
1300     ETH_CTL(base) = _VAL2FLD(ETH_CTL_ETH_MODE, mode) |
1301                     _VAL2FLD(ETH_CTL_REFCLK_SRC_SEL, srcSel) |
1302                     _VAL2FLD(ETH_CTL_REFCLK_DIV, clkDiv);
1303 
1304     return CY_ETHIF_SUCCESS;
1305 }
1306 
1307 /*******************************************************************************
1308 * Function Name: Cy_ETHIF_IPEnable
1309 ****************************************************************************//**
1310 *
1311 * \brief Function enables Ethernet MAC
1312 *
1313 * \param base Ethernet Instance
1314 *
1315 *******************************************************************************/
Cy_ETHIF_IPEnable(ETH_Type * base)1316 static void Cy_ETHIF_IPEnable(ETH_Type *base)
1317 {
1318     ETH_CTL(base) |=_VAL2FLD(ETH_CTL_ENABLED, CY_ETH_ENABLE_1);
1319 }
1320 
1321 /*******************************************************************************
1322 * Function Name: Cy_ETHIF_IPDisable
1323 ****************************************************************************//**
1324 *
1325 * \brief Function Disables Ethernet MAC
1326 *
1327 * \param base Ethernet Instance
1328 *
1329 *******************************************************************************/
Cy_ETHIF_IPDisable(ETH_Type * base)1330 static void Cy_ETHIF_IPDisable(ETH_Type *base)
1331 {
1332     ETH_CTL(base) &= (uint32_t)~(ETH_CTL_ENABLED_Msk);
1333 }
1334 
1335 /*******************************************************************************
1336 * Function Name: Cy_ETHIF_AssignMemory
1337 ****************************************************************************//**
1338 *
1339 * \brief Local function is used to initialize private data structure, tx and rx queue start address
1340 *
1341 * \param u8EthIfInstance Ethernet Instance number
1342 *
1343 *******************************************************************************/
Cy_ETHIF_AssignMemory(uint8_t u8EthIfInstance)1344 static void Cy_ETHIF_AssignMemory(uint8_t u8EthIfInstance)
1345 {
1346     CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 11.3','Intentional typecast of cy_ethif_privatedata[u8EthIfInstance] to CEDI_PrivateData* struct type.');
1347     cyp_ethif_pd[u8EthIfInstance] = (CEDI_PrivateData *)cy_ethif_privatedata[u8EthIfInstance];
1348     cy_ethif_cfg[u8EthIfInstance].rxQAddr   = (uintptr_t)cy_ethif_rx_desc_list[u8EthIfInstance];
1349     cy_ethif_cfg[u8EthIfInstance].txQAddr   = (uintptr_t)cy_ethif_tx_desc_list[u8EthIfInstance];
1350     CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 11.3','Intentional typecast of cy_ethif_statistic[u8EthIfInstance] to CEDI_Statistics* struct type.');
1351     cyp_ethif_statistic[u8EthIfInstance] = (CEDI_Statistics *)cy_ethif_statistic[u8EthIfInstance];
1352     cy_ethif_cfg[u8EthIfInstance].statsRegs = (uintptr_t)cyp_ethif_statistic[u8EthIfInstance];
1353     /** get the physical address */
1354     cy_ethif_cfg[u8EthIfInstance].rxQPhyAddr = cy_ethif_cfg[u8EthIfInstance].rxQAddr;
1355     /** get the physical address */
1356     cy_ethif_cfg[u8EthIfInstance].txQPhyAddr = cy_ethif_cfg[u8EthIfInstance].txQAddr;
1357 }
1358 
1359 /*******************************************************************************
1360 * Function Name: Cy_ETHIF_DisableQueues
1361 ****************************************************************************//**
1362 * \brief By default all activated queues in the IP are enabled. However, only required
1363 * queues for tx and rx shall be enabled to make internal process faster.
1364 *
1365 * \brief Function Disables Ethernet MAC
1366 *
1367 * \param base Ethernet Instance
1368 *
1369 *******************************************************************************/
Cy_ETHIF_DisableQueues(ETH_Type * base,cy_stc_ethif_mac_config_t * pstcEthIfConfig)1370 static cy_en_ethif_status_t Cy_ETHIF_DisableQueues (ETH_Type *base, cy_stc_ethif_mac_config_t * pstcEthIfConfig)
1371 {
1372     uint8_t u8EthIfInstance;
1373 
1374     u8EthIfInstance = CY_ETHIF_IP_INSTANCE(base);
1375 
1376     /* Transmit Queue 0 */
1377     if (pstcEthIfConfig->btxq0enable == false)
1378     {
1379         /* Disable the queue pointer */
1380         ETH_TX_Q_PTR(base) = (ETH_TX_Q_PTR(base) & (uint32_t)~(ETH_TRANSMIT_Q_PTR_DMA_TX_DIS_Q_Msk)) | _VAL2FLD(ETH_TRANSMIT_Q_PTR_DMA_TX_DIS_Q, 1UL);
1381         stcQueueDisStatus[u8EthIfInstance].bTxQueueDisable[0] = true;
1382     }
1383 
1384     /* Transmit Queue 1 */
1385     if (pstcEthIfConfig->btxq1enable == false)
1386     {
1387         /* Disable the queue pointer */
1388         ETH_TX_Q1_PTR(base) = (ETH_TX_Q1_PTR(base) & (uint32_t)~(ETH_TRANSMIT_Q1_PTR_DMA_TX_DIS_Q_Msk)) | _VAL2FLD(ETH_TRANSMIT_Q1_PTR_DMA_TX_DIS_Q, 1UL);
1389         stcQueueDisStatus[u8EthIfInstance].bTxQueueDisable[1] = true;
1390     }
1391 
1392     /* Transmit Queue 2 */
1393     if (pstcEthIfConfig->btxq2enable == false)
1394     {
1395         /* Disable the queue pointer */
1396         ETH_TX_Q2_PTR(base) = (ETH_TX_Q2_PTR(base) & (uint32_t)~(ETH_TRANSMIT_Q2_PTR_DMA_TX_DIS_Q_Msk)) | _VAL2FLD(ETH_TRANSMIT_Q2_PTR_DMA_TX_DIS_Q, 1UL);
1397         stcQueueDisStatus[u8EthIfInstance].bTxQueueDisable[2] = true;
1398     }
1399 
1400     /* Receive Queue 0 */
1401     if (pstcEthIfConfig->brxq0enable == false)
1402     {
1403         /* Disable the queue pointer */
1404         ETH_RX_Q_PTR(base) = (ETH_RX_Q_PTR(base) & (uint32_t)~(ETH_RECEIVE_Q_PTR_DMA_RX_DIS_Q_Msk)) | _VAL2FLD(ETH_RECEIVE_Q_PTR_DMA_RX_DIS_Q, 1UL);
1405         stcQueueDisStatus[u8EthIfInstance].bRxQueueDisable[0] = true;
1406     }
1407 
1408     /* Receive Queue 1 */
1409     if (pstcEthIfConfig->brxq1enable == false)
1410     {
1411         /* Disable the queue pointer */
1412         ETH_RX_Q1_PTR(base) = (ETH_RX_Q1_PTR(base) & (uint32_t)~(ETH_RECEIVE_Q1_PTR_DMA_RX_DIS_Q_Msk)) | _VAL2FLD(ETH_RECEIVE_Q1_PTR_DMA_RX_DIS_Q, 1UL);
1413         stcQueueDisStatus[u8EthIfInstance].bRxQueueDisable[1] = true;
1414     }
1415 
1416     /* Receive Queue 2 */
1417     if (pstcEthIfConfig->brxq2enable == false)
1418     {
1419         /* Disable the queue pointer */
1420         ETH_RX_Q2_PTR(base) = (ETH_RX_Q2_PTR(base) & (uint32_t)~(ETH_RECEIVE_Q2_PTR_DMA_RX_DIS_Q_Msk)) | _VAL2FLD(ETH_RECEIVE_Q2_PTR_DMA_RX_DIS_Q, 1UL);
1421         stcQueueDisStatus[u8EthIfInstance].bRxQueueDisable[2] = true;
1422     }
1423 
1424     /* TODO: Temporarily in the driver. MUST be removed once IP is updated || Q3 for both Transmit and Receive has been removed from the IP
1425         Changes will apply to bitfile after 0513 release */
1426 
1427     /* TODO: Idea of cross checking BD memory vs enabled queues */
1428 
1429     return CY_ETHIF_SUCCESS;
1430 }
1431 
1432 /*******************************************************************************
1433 * Function Name: Cy_ETHIF_TSUInit
1434 ****************************************************************************//**
1435 *
1436 * \brief Function enables Time stamp unit in EMAC
1437 *
1438 * \param pstcTSUConfig Pointer to TSU parameters
1439 *
1440 * \return CY_ETHIF_SUCCESS TSU initialization is done
1441 * \return CY_ETHIF_BAD_PARAM Parameter passed contains invalid values
1442 *
1443 *******************************************************************************/
Cy_ETHIF_TSUInit(uint8_t u8EthIfInstance,cy_stc_ethif_tsu_config_t * pstcTSUConfig)1444 static cy_en_ethif_status_t Cy_ETHIF_TSUInit (uint8_t u8EthIfInstance, cy_stc_ethif_tsu_config_t * pstcTSUConfig)
1445 {
1446     /* set 1588 timer value */
1447     /* Load Timer Value */
1448 
1449     CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 11.3','Intentional typecast of pstcTSUConfig->pstcTimerValue to CEDI_1588TimerVal* struct type.');
1450     if (((uint32_t)EOK) != cyp_ethif_gemgxlobj->set1588Timer((void *)cyp_ethif_pd[u8EthIfInstance], (CEDI_1588TimerVal*)pstcTSUConfig->pstcTimerValue))
1451     {
1452         /* Reason could be Null pointer, hardware does not support TSU or pstcTimerValue.nanosecs>0x3FFFFFFF */
1453         return CY_ETHIF_BAD_PARAM;
1454     }
1455 
1456     /* Timer increment register to achieve 1 second as precise as possible */
1457     CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 11.3','Intentional typecast of pstcTSUConfig->pstcTimerIncValue to CEDI_TimerIncrement* struct type.');
1458     if (((uint32_t)EOK) != cyp_ethif_gemgxlobj->set1588TimerInc((void *)cyp_ethif_pd[u8EthIfInstance], (CEDI_TimerIncrement*)pstcTSUConfig->pstcTimerIncValue))
1459     {
1460         /* Reason could be Null pointer, hardware does not support TSU */
1461         return CY_ETHIF_BAD_PARAM;
1462     }
1463 
1464     /* one step sync enabled    */
1465     if (((uint32_t)EOK) != cyp_ethif_gemgxlobj->set1588OneStepTxSyncEnable((void *)cyp_ethif_pd[u8EthIfInstance], (uint8_t) pstcTSUConfig->bOneStepTxSyncEnable))
1466     {
1467         /* Reason could be Null pointer, hardware does not support TSU or bOneStepTxSyncEnable > 1 */
1468         return CY_ETHIF_BAD_PARAM;
1469     }
1470 
1471     /* Set the descriptor time stamp Mode */
1472     if (((uint32_t)EOK) != cyp_ethif_gemgxlobj->setDescTimeStampMode((void *)cyp_ethif_pd[u8EthIfInstance],
1473                (CEDI_TxTsMode)pstcTSUConfig->enTxDescStoreTimeStamp, (CEDI_RxTsMode)pstcTSUConfig->enRxDescStoreTimeStamp))
1474     {
1475         /** Reason could be Null pointer, hardware does not support TSU, enTxDescStoreTimeStamp > CEDI_TX_TS_ALL, enRxDescStoreTimeStamp > CEDI_RX_TS_ALL  */
1476         return CY_ETHIF_BAD_PARAM;
1477     }
1478 
1479     /* disabled storing nanosecond in CRC field of received frame */
1480     if (((uint32_t)EOK) != cyp_ethif_gemgxlobj->setStoreRxTimeStamp((void *)cyp_ethif_pd[u8EthIfInstance], (uint8_t) pstcTSUConfig->bStoreNSinRxDesc))
1481     {
1482         /* Reason could be Null pointer, hardware does not support TSU or bStoreNSinRxDesc > 1 */
1483         return CY_ETHIF_BAD_PARAM;
1484     }
1485 
1486     return CY_ETHIF_SUCCESS;
1487 }
1488 
1489 /*******************************************************************************
1490 * Function Name: Cy_ETHIF_InitializeBuffers
1491 ****************************************************************************//**
1492 *
1493 * \brief Function initializes the buffer status and clears the memory with
1494 *        CY_EHTIF_EMPTYVALUE value.
1495 *
1496 * \param none
1497 *
1498 *******************************************************************************/
Cy_ETHIF_InitializeBuffers(void)1499 static void Cy_ETHIF_InitializeBuffers (void)
1500 {
1501     for (uint32_t index=0; index<CY_ETH_DEFINE_NUM_IP; index++)
1502     {
1503         g_tx_bdcount[index] = 0;
1504     }
1505 }
1506 
1507 
1508 /*******************************************************************************
1509 * Function Name: Cy_ETHIF_GetEthIfInstance
1510 ****************************************************************************//**
1511 *
1512 * \brief To derive the instance number.
1513 *
1514 * \param pcy_privatedata     Instance specific private data
1515 * \return Ethernet instance (ETH0=0 or ETH1=1)
1516 *
1517 *******************************************************************************/
Cy_ETHIF_GetEthIfInstance(void * pcy_privatedata)1518 static uint8_t Cy_ETHIF_GetEthIfInstance(void *pcy_privatedata)
1519 {
1520     uint8_t u8EthIfInstance = 0U;
1521 
1522     if (pcy_privatedata == cyp_ethif_pd[0])
1523     {
1524         u8EthIfInstance = CY_ETHIF_INSTANCE_0;
1525     }
1526     else
1527     {
1528         #if defined(CY_IP_MXETH_INSTANCES) && (CY_IP_MXETH_INSTANCES > 1u)
1529             if(pcy_privatedata == cyp_ethif_pd[1])
1530             {
1531                 u8EthIfInstance = CY_ETHIF_INSTANCE_1;
1532             }
1533             else
1534             {
1535                 CY_ASSERT(0UL);
1536             }
1537         #else
1538         CY_ASSERT(0UL);
1539         #endif
1540     }
1541     return u8EthIfInstance;
1542 }
1543 
1544 /*******************************************************************************
1545 * Function Name: Cy_ETHIF_EventTx
1546 ****************************************************************************//**
1547 *
1548 * \brief Function called by cadence driver upon getting Tx Event
1549 *
1550 * \param pcy_privatedata    Instance specific private data
1551 * \param u32event occurred event
1552 * \param u8qnum Queue number
1553 *
1554 *******************************************************************************/
Cy_ETHIF_EventTx(void * pcy_privatedata,uint32_t u32event,uint8_t u8qnum)1555 static void Cy_ETHIF_EventTx(void *pcy_privatedata, uint32_t u32event, uint8_t u8qnum)
1556 {
1557     CEDI_TxDescData Tx_DescData;
1558     ETH_Type *base;
1559     uint8_t u8EthIfInstance;
1560 
1561     /** derive the instance */
1562     u8EthIfInstance = Cy_ETHIF_GetEthIfInstance(pcy_privatedata);
1563 
1564     base = CY_ETHIF_IP_ADDR_REGBASE(u8EthIfInstance);
1565 
1566     if (0UL != (u32event & ((uint32_t)CEDI_EV_TX_COMPLETE)))
1567     {
1568         (void)cyp_ethif_gemgxlobj->freeTxDesc((void *)cyp_ethif_pd[u8EthIfInstance], u8qnum, &Tx_DescData);
1569 
1570         g_tx_bdcount[u8EthIfInstance]--;
1571 
1572         /* application callback function */
1573         if (stccallbackfunctions[u8EthIfInstance].txcompletecb != NULL)
1574         {
1575             stccallbackfunctions[u8EthIfInstance].txcompletecb(base, u8qnum);
1576         }
1577 
1578     }
1579 
1580     return;
1581 }
1582 
1583 /*******************************************************************************
1584 * Function Name: Cy_ETHIF_EventTxError
1585 ****************************************************************************//**
1586 *
1587 * \brief Function called by cadence driver upon getting Tx Error Event
1588 *
1589 * \param pcy_privatedata    Instance specific private data
1590 * \param u32event occurred event
1591 * \param u8qnum Queue number
1592 *
1593 *******************************************************************************/
Cy_ETHIF_EventTxError(void * pcy_privatedata,uint32_t u32event,uint8_t u8qnum)1594 static void Cy_ETHIF_EventTxError(void *pcy_privatedata, uint32_t u32event, uint8_t u8qnum)
1595 {
1596     CEDI_TxDescData Tx_DescData;
1597     uint8_t u8EthIfInstance;
1598     ETH_Type *base;
1599 
1600     /** derive the instance */
1601     u8EthIfInstance = Cy_ETHIF_GetEthIfInstance(pcy_privatedata);
1602 
1603     base = CY_ETHIF_IP_ADDR_REGBASE(u8EthIfInstance);
1604 
1605     (void)cyp_ethif_gemgxlobj->freeTxDesc((void *)cyp_ethif_pd[u8EthIfInstance], u8qnum, &Tx_DescData);
1606 
1607     /** application callback function */
1608     if (stccallbackfunctions[u8EthIfInstance].txerrorcb != NULL)
1609     {
1610         stccallbackfunctions[u8EthIfInstance].txerrorcb(base, u8qnum);
1611     }
1612 
1613     g_tx_bdcount[u8EthIfInstance]--;
1614 
1615     CY_UNUSED_PARAMETER(u32event); /* Suppress a compiler warning about unused variables */
1616 
1617     return;
1618 }
1619 
1620 /*******************************************************************************
1621 * Function Name: Cy_ETHIF_EventRxFrame
1622 ****************************************************************************//**
1623 *
1624 * \brief Function called by cadence driver upon getting Rx Event
1625 *
1626 * \param pcy_privatedata    Instance specific private data
1627 * \param u8qnum Queue number
1628 *
1629 *******************************************************************************/
Cy_ETHIF_EventRxFrame(void * pcy_privatedata,uint8_t u8qnum)1630 static void Cy_ETHIF_EventRxFrame(void *pcy_privatedata, uint8_t u8qnum)
1631 {
1632     uint32_t        u32RxNum;
1633     CEDI_BuffAddr   tmpBufAddr;
1634     CEDI_RxDescData Rx_DescData;
1635     CEDI_RxDescStat Rx_DescStat;
1636     uint8_t u8EthIfInstance = 255;
1637     ETH_Type *base;
1638     uint32_t bufLen;
1639     bool noData = false;
1640     uint8_t *rxBufAddr;
1641 
1642     /* derive the instance */
1643     u8EthIfInstance = Cy_ETHIF_GetEthIfInstance(pcy_privatedata);
1644 
1645     base = CY_ETHIF_IP_ADDR_REGBASE(u8EthIfInstance);
1646     /* number of used buffers */
1647     u32RxNum = cyp_ethif_gemgxlobj->numRxUsed((void *)cyp_ethif_pd[u8EthIfInstance], u8qnum);
1648 
1649     /** read receive queue */
1650     while (0UL != u32RxNum)
1651     {
1652         tmpBufAddr.pAddr = 0;
1653         tmpBufAddr.vAddr = tmpBufAddr.pAddr;
1654         bufLen = 0;
1655         if (stccallbackfunctions[u8EthIfInstance].rxgetbuff != NULL)
1656         {
1657             stccallbackfunctions[u8EthIfInstance].rxgetbuff(base, (uint8_t**)&rxBufAddr, &bufLen);
1658             tmpBufAddr.pAddr = (uintptr_t)rxBufAddr;
1659             tmpBufAddr.vAddr = tmpBufAddr.pAddr;
1660         }
1661 
1662         (void)cyp_ethif_gemgxlobj->readRxBuf((void *)cyp_ethif_pd[u8EthIfInstance],
1663                                           u8qnum,
1664                                           &tmpBufAddr,
1665                                           CY_ETHIF_BUFFER_CLEARED_0,
1666                                           &Rx_DescData);
1667 
1668         switch ((CEDI_RxRdStat)Rx_DescData.status)
1669         {
1670           case CEDI_RXDATA_SOF_EOF:     // 0
1671             /* receive start and end frame */
1672             cyp_ethif_gemgxlobj->getRxDescStat((void *)cyp_ethif_pd[u8EthIfInstance],
1673                                          Rx_DescData.rxDescStat,
1674                                          &Rx_DescStat);
1675 
1676             /* application callback function */
1677             if (stccallbackfunctions[u8EthIfInstance].rxframecb != NULL)
1678             {
1679                 stccallbackfunctions[u8EthIfInstance].rxframecb(base, (uint8_t*)tmpBufAddr.pAddr, Rx_DescStat.bufLen);
1680             }
1681             break;
1682           case CEDI_RXDATA_SOF_ONLY:    // 1
1683             /* fragment start */
1684             // debug_printf("[ETH] (SOF)Don't use fragment yet...\r\n");
1685             break; //return;
1686           case CEDI_RXDATA_NO_FLAG:     // 2
1687             /* fragment */
1688             // debug_printf("[ETH] (NOF)Don't use fragment yet...\r\n");
1689             break; //return;
1690           case CEDI_RXDATA_EOF_ONLY:    // 3
1691             /* fragment end */
1692             // debug_printf("[ETH] (EOF)Don't use fragment yet...\r\n");
1693             break;
1694           case CEDI_RXDATA_NODATA:      // 4
1695             /* normal leaving */
1696             // debug_printf("[ETH] NG5 RXDATA_NODATA\r\n");
1697             noData = true;
1698             break;
1699           default:
1700             /* Unknown status */
1701             break;
1702         }
1703         if(noData)
1704         {
1705             break;/* from here it breaks while loop   */
1706         }
1707         u32RxNum--;
1708     }
1709 }
1710 
1711 /*******************************************************************************
1712 * Function Name: Cy_ETHIF_EventRxError
1713 ****************************************************************************//**
1714 *
1715 * \brief Function called by cadence driver upon getting Rx Error Event
1716 *
1717 * \param pcy_privatedata    Instance specific private data
1718 * \param u32event occurred event
1719 * \param u8qnum Queue number
1720 *
1721 *******************************************************************************/
Cy_ETHIF_EventRxError(void * pcy_privatedata,uint32_t a_event,uint8_t a_qnum)1722 static void Cy_ETHIF_EventRxError(void *pcy_privatedata, uint32_t a_event, uint8_t a_qnum)
1723 {
1724     //printf("[ETH] (Event) RxError received.\r\n");
1725     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1726     CY_UNUSED_PARAMETER(a_event); /* Suppress a compiler warning about unused variables */
1727     CY_UNUSED_PARAMETER(a_qnum); /* Suppress a compiler warning about unused variables */
1728 
1729     return;
1730 }
1731 
1732 /*******************************************************************************
1733 * Function Name: Cy_ETHIF_EventPhyManComplete
1734 ****************************************************************************//**
1735 *
1736 * \brief
1737 *
1738 * \param
1739 *
1740 *
1741 *******************************************************************************/
Cy_ETHIF_EventPhyManComplete(void * pcy_privatedata,uint8_t u8read,uint16_t u16ReadData)1742 static void Cy_ETHIF_EventPhyManComplete(void *pcy_privatedata, uint8_t u8read, uint16_t u16ReadData)
1743 {
1744     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1745     CY_UNUSED_PARAMETER(u8read); /* Suppress a compiler warning about unused variables */
1746     CY_UNUSED_PARAMETER(u16ReadData); /* Suppress a compiler warning about unused variables */
1747 
1748     return;
1749 }
1750 
1751 /*******************************************************************************
1752 * Function Name: Cy_ETHIF_EventhrespError
1753 ****************************************************************************//**
1754 *
1755 * \brief
1756 *
1757 * \param
1758 *
1759 *
1760 *******************************************************************************/
Cy_ETHIF_EventhrespError(void * pcy_privatedata,uint8_t u8qnum)1761 static void Cy_ETHIF_EventhrespError(void *pcy_privatedata, uint8_t u8qnum)
1762 {
1763     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1764     CY_UNUSED_PARAMETER(u8qnum); /* Suppress a compiler warning about unused variables */
1765 
1766     return;
1767 }
1768 
1769 /*******************************************************************************
1770 * Function Name: Cy_ETHIF_EventLpPageRx
1771 ****************************************************************************//**
1772 *
1773 * \brief
1774 *
1775 * \param
1776 *
1777 *
1778 *******************************************************************************/
Cy_ETHIF_EventLpPageRx(void * pcy_privatedata,struct CEDI_LpPageRx * pageRx)1779 static void Cy_ETHIF_EventLpPageRx(void* pcy_privatedata, struct CEDI_LpPageRx* pageRx)
1780 {
1781     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1782     CY_UNUSED_PARAMETER(pageRx); /* Suppress a compiler warning about unused variables */
1783 }
1784 
1785 /*******************************************************************************
1786 * Function Name: Cy_ETHIF_EventAn
1787 ****************************************************************************//**
1788 *
1789 * \brief
1790 *
1791 * \param
1792 *
1793 *
1794 *******************************************************************************/
Cy_ETHIF_EventAn(void * pcy_privatedata,struct CEDI_NetAnStatus * netStat)1795 static void Cy_ETHIF_EventAn(void* pcy_privatedata, struct CEDI_NetAnStatus* netStat)
1796 {
1797     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1798     CY_UNUSED_PARAMETER(netStat); /* Suppress a compiler warning about unused variables */
1799 }
1800 
1801 /*******************************************************************************
1802 * Function Name: Cy_ETHIF_EventLinkChange
1803 ****************************************************************************//**
1804 *
1805 * \brief
1806 *
1807 * \param
1808 *
1809 *
1810 *******************************************************************************/
Cy_ETHIF_EventLinkChange(void * pcy_privatedata,uint8_t a_linkstate)1811 static void Cy_ETHIF_EventLinkChange(void *pcy_privatedata, uint8_t a_linkstate)
1812 {
1813     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1814     CY_UNUSED_PARAMETER(a_linkstate); /* Suppress a compiler warning about unused variables */
1815 
1816     return;
1817 }
1818 /*******************************************************************************
1819 * Function Name: Cy_ETHIF_EventTsu
1820 ****************************************************************************//**
1821 *
1822 * \brief
1823 *
1824 * \param
1825 *
1826 *
1827 *******************************************************************************/
Cy_ETHIF_EventTsu(void * pcy_privatedata,uint32_t u32event)1828 static void Cy_ETHIF_EventTsu (void *pcy_privatedata, uint32_t u32event)
1829 {
1830     uint8_t u8EthIfInstance = 255;
1831     ETH_Type *base = NULL;
1832 
1833     /* derive the instance */
1834     u8EthIfInstance = Cy_ETHIF_GetEthIfInstance(pcy_privatedata);
1835 
1836     base = CY_ETHIF_IP_ADDR_REGBASE(u8EthIfInstance);
1837 
1838     /* Event generated if second count of the timer has incremented */
1839     if (0UL != (u32event & ((uint32_t)CEDI_EV_TSU_SEC_INC)))
1840     {
1841         /* application callback function     */
1842         if (stccallbackfunctions[u8EthIfInstance].tsuSecondInccb != NULL)
1843         {
1844             stccallbackfunctions[u8EthIfInstance].tsuSecondInccb(base);
1845         }
1846     }
1847 }
1848 /*******************************************************************************
1849 * Function Name: Cy_ETHIF_EventPauseFrame
1850 ****************************************************************************//**
1851 *
1852 * \brief
1853 *
1854 * \param
1855 *
1856 *
1857 *******************************************************************************/
Cy_ETHIF_EventPauseFrame(void * pcy_privatedata,uint32_t u32event)1858 static void Cy_ETHIF_EventPauseFrame(void *pcy_privatedata, uint32_t u32event)
1859 {
1860     if (0UL != (u32event & ((uint32_t)CEDI_EV_PAUSE_FRAME_TX)))
1861     {
1862         // debug_printf("Pause frame transmitted");
1863     }
1864 
1865     if (0UL != (u32event & ((uint32_t)CEDI_EV_PAUSE_NZ_QU_RX)))
1866     {
1867         // debug_printf("Pause frame received");
1868     }
1869     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1870 }
1871 /*******************************************************************************
1872 * Function Name: Cy_ETHIF_EventPtp
1873 ********************************************************************************
1874 *
1875 * \brief
1876 *
1877 * \param
1878 *
1879 *
1880 *******************************************************************************/
Cy_ETHIF_EventPtp(void * pcy_privatedata,uint32_t u32type,struct CEDI_1588TimerVal * time)1881 static void Cy_ETHIF_EventPtp (void* pcy_privatedata, uint32_t u32type, struct CEDI_1588TimerVal* time)
1882 {
1883     if (0UL != (u32type & ((uint32_t)CEDI_EV_PTP_TX_SYNC)))
1884     {
1885         // printf("Sync frame transmitted");
1886     }
1887 
1888     if (0UL != (u32type & ((uint32_t)CEDI_EV_PTP_TX_PDLY_REQ)))
1889     {
1890         // printf("PTP PDelay Req frame transmitted");
1891     }
1892 
1893     if (0UL != (u32type & ((uint32_t)CEDI_EV_PTP_TX_PDLY_RSP)))
1894     {
1895         // printf("PTP PDelay Resp frame transmitted");
1896     }
1897 
1898     if (0UL != (u32type & ((uint32_t)CEDI_EV_PTP_RX_SYNC)))
1899     {
1900         // printf("Sync frame received");
1901     }
1902 
1903     if (0UL != (u32type & ((uint32_t)CEDI_EV_PTP_RX_PDLY_REQ)))
1904     {
1905         // printf("PTP PDelay Req frame received");
1906     }
1907 
1908     if (0UL != (u32type & ((uint32_t)CEDI_EV_PTP_RX_PDLY_RSP)))
1909     {
1910         // printf("PTP PDelay Resp frame received");
1911     }
1912     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1913     CY_UNUSED_PARAMETER(time); /* Suppress a compiler warning about unused variables */
1914 }
1915 
1916 /*******************************************************************************
1917 * Function Name: Cy_ETHIF_EventExternalInt
1918 ********************************************************************************
1919 *
1920 * \brief
1921 *
1922 * \param
1923 *
1924 *
1925 *******************************************************************************/
Cy_ETHIF_EventExternalInt(void * pcy_privatedata)1926 static void Cy_ETHIF_EventExternalInt(void * pcy_privatedata)
1927 {
1928     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1929 }
1930 
1931 /*******************************************************************************
1932 * Function Name: Cy_ETHIF_EventWol
1933 ********************************************************************************
1934 *
1935 * \brief
1936 *
1937 * \param
1938 *
1939 *
1940 *******************************************************************************/
Cy_ETHIF_EventWol(void * pcy_privatedata)1941 static void Cy_ETHIF_EventWol(void * pcy_privatedata)
1942 {
1943     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1944 }
1945 /*******************************************************************************
1946 * Function Name: Cy_ETHIF_EventLpi
1947 ********************************************************************************
1948 *
1949 * \brief
1950 *
1951 * \param
1952 *
1953 *
1954 *******************************************************************************/
Cy_ETHIF_EventLpi(void * pcy_privatedata)1955 static void Cy_ETHIF_EventLpi(void * pcy_privatedata)
1956 {
1957     CY_UNUSED_PARAMETER(pcy_privatedata); /* Suppress a compiler warning about unused variables */
1958 }
1959 
1960 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 18.1')
1961 CY_MISRA_BLOCK_END('OVERRUN')
1962 
1963 #if defined(__cplusplus)
1964 }
1965 #endif
1966 
1967 #endif /* CY_IP_MXETH */
1968 /* [] END OF FILE */
1969