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Searched defs:postDivider (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/
Dfsl_clock.h1253 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
1263 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/drivers/
Dfsl_clock.h1227 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
1237 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/drivers/
Dfsl_clock.h1217 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
1227 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/drivers/
Dfsl_clock.h1228 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
1238 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/drivers/
Dfsl_clock.h1217 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
1227 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/
Dfsl_clock.h1254 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
1264 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/drivers/
Dfsl_clock.h1254 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
1264 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_clock.h1286 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1330 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_clock.h1286 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1330 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_clock.h1286 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1330 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_clock.h1286 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1330 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/drivers/sai/
Dfsl_sai.c197 uint32_t postDivider = sourceFreq / targetFreq; in SAI_SetMasterClockDivider() local
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_clock.h1777 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1821 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_clock.h1777 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1821 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_clock.h1745 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1789 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_clock.h1777 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1821 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_clock.h1777 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1821 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_clock.h1777 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1821 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_clock.h1745 clock_pll_post_div_t postDivider; /*!< Post divider. */ member
1789 …uint8_t postDivider; /*!< Divider after the PLL, 0x0=divided by 1, 0x1=divided by 2, 0x2=div… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/drivers/
Dfsl_clock.h872 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/drivers/
Dfsl_clock.h937 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/drivers/
Dfsl_clock.h1082 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/drivers/
Dfsl_clock.h1076 uint8_t postDivider; /*!< Divider after the PLL, should only be 1, 2, 4, 8, 16. */ member