1 /* 2 * Copyright 2021-2022 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NETC_ETHSWT_IP_TYPES_H 8 #define NETC_ETHSWT_IP_TYPES_H 9 10 /** 11 * @file Netc_EthSwt_Ip_Types.h 12 * @addtogroup NETC_ETHSWT_IP NETC_ETHSWT Driver 13 * @{ 14 */ 15 16 #ifdef __cplusplus 17 extern "C"{ 18 #endif 19 20 21 /*================================================================================================== 22 * INCLUDE FILES 23 * 1) system and project includes 24 * 2) needed interfaces from external units 25 * 3) internal and external interfaces from this unit 26 ==================================================================================================*/ 27 #include "Netc_EthSwt_Ip_Cfg.h" 28 #include "Netc_EthSwt_Ip_Cfg_Defines.h" 29 #include "Eth_GeneralTypes.h" 30 #include "StandardTypes.h" 31 32 /*================================================================================================== 33 * SOURCE FILE VERSION INFORMATION 34 ==================================================================================================*/ 35 #define NETC_ETHSWT_IP_TYPES_VENDOR_ID 43 36 #define NETC_ETHSWT_IP_TYPES_MODULE_ID 89 37 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION 4 38 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION 7 39 #define NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION 0 40 #define NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION 0 41 #define NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION 9 42 #define NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION 0 43 44 /*================================================================================================== 45 * FILE VERSION CHECKS 46 ==================================================================================================*/ 47 48 /* Checks against Netc_EthSwt_Ip_Cfg.h */ 49 #if (NETC_ETHSWT_IP_TYPES_VENDOR_ID != NETC_ETHSWT_IP_CFG_VENDOR_ID) 50 #error "Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h have different vendor ids" 51 #endif 52 #if (( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \ 53 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_MINOR_VERSION) || \ 54 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETHSWT_IP_CFG_AR_RELEASE_REVISION_VERSION)) 55 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h are different" 56 #endif 57 #if (( NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_SW_MAJOR_VERSION) || \ 58 ( NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION != NETC_ETHSWT_IP_CFG_SW_MINOR_VERSION) || \ 59 ( NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION != NETC_ETHSWT_IP_CFG_SW_PATCH_VERSION)) 60 #error "Software Version Numbers of Netc_EthSwt_Ip_Types.h and Netc_EthSwt_Ip_Cfg.h are different" 61 #endif 62 63 /* Checks against Netc_EthSwt_Ip_Cfg_Defines.h */ 64 #if (NETC_ETHSWT_IP_TYPES_VENDOR_ID != NETC_ETHSWT_IP_CFG_DEFINES_VENDOR_ID) 65 #error "Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h have different vendor ids" 66 #endif 67 #if (( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_MAJOR_VERSION) || \ 68 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_MINOR_VERSION) || \ 69 ( NETC_ETHSWT_IP_TYPES_AR_RELEASE_REVISION_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_AR_RELEASE_REVISION_VERSION)) 70 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h are different" 71 #endif 72 #if (( NETC_ETHSWT_IP_TYPES_SW_MAJOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_MAJOR_VERSION) || \ 73 ( NETC_ETHSWT_IP_TYPES_SW_MINOR_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_MINOR_VERSION) || \ 74 ( NETC_ETHSWT_IP_TYPES_SW_PATCH_VERSION != NETC_ETHSWT_IP_CFG_DEFINES_SW_PATCH_VERSION)) 75 #error "Software Version Numbers of Netc_EthSwt_Ip_Types.c and Netc_EthSwt_Ip_Cfg_Defines.h are different" 76 #endif 77 78 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 79 #if ((NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != ETH_GENERALTYPES_AR_RELEASE_MAJOR_VERSION) || \ 80 (NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != ETH_GENERALTYPES_AR_RELEASE_MINOR_VERSION) \ 81 ) 82 #error "AutoSar Version Numbers of Netc_EthSwt_Ip_Types.h and Eth_GeneralTypes.h are different" 83 #endif 84 /* Check if header file and StandardTypes.h are of the same AUTOSAR version */ 85 #if ((NETC_ETHSWT_IP_TYPES_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \ 86 (NETC_ETHSWT_IP_TYPES_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)) 87 #error "AUTOSAR Version Numbers of Netc_EthSwt_Ip_Types.h and StandardTypes.h are different" 88 #endif 89 #endif 90 /*================================================================================================== 91 * CONSTANTS 92 ==================================================================================================*/ 93 94 #define NETC_ETHSWT_NUMBER_OF_PSEUDO_PORT (1U) /*!< number of pseudoport */ 95 #define NETC_ETHSWT_NUMBER_OF_PORTS 3 /*!< number of ports */ 96 #define NETC_ETHSWT_NUMBER_OF_MAC_PORTS (2U) /*!< number of mac ports*/ 97 #define NETC_ETHSWT_NUMBER_OF_VID_PER_PORT (255U) /*!< 3 number of vid per port */ 98 99 #define NETC_ETHSWT_IP_FDB_KEYE_DATA_ITEMS (3U) /*!< 3 uint32 items of FDB table KEYE DATA Format */ 100 #define NETC_ETHSWT_IP_FDB_SEARCH_CRITERIA_DATA_ITEMS (8U) /*!< 8 uint32 items of FDB table SEARCH CRITERIA Format */ 101 102 #define NETC_ETHSWT_TABLE_CFGEDATA_ITEMS (4U) /*!< 4 uint32 items of CFGE_DATA Format for Tables */ 103 104 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_KEYE_DATA_LEN (53U) /*!< 53 uint32 items of Ingress Port Filter Table KEYE_DATA Format */ 105 106 #define NETC_ETHSWT_NUMBER_OF_PROFILES (2U) 107 #define NETC_ETHSWT_NUMBER_OF_PCP_DEI (16U) 108 #define NETC_ETHSWT_NUMBER_OF_PCP (8U) 109 #define NETC_ETHSWT_NUMBER_OF_IPV (8U) 110 #define NETC_ETHSWT_NUMBER_OF_DR (4U) 111 112 #define NETC_ETHSWT_EFMEID_FOR_MIRRORING (0U) /* Default egress frame modification entry id for mirroring */ 113 #define NETC_ETHSWT_EFM_LEN_CHANGE_FOR_MIRRORING (4U) /* EFM_LEN_CHANGE value for double tagging when modifying mirrored egress frames */ 114 /*================================================================================================== 115 * DEFINES AND MACROS 116 ==================================================================================================*/ 117 118 /*================================================================================================== 119 * ENUMS 120 ==================================================================================================*/ 121 122 123 /*! 124 * @brief Ingress congestion management priority. Used for congestion management. 125 */ 126 typedef enum 127 { 128 NETC_ETHSWT_IP_ICM_LOW_PRIORITY = 0U, /*!< ICM low priority */ 129 NETC_ETHSWT_IP_ICM_HIGH_PRIORITY = 1U /*!< ICM high priority */ 130 } Netc_EthSwt_Ip_ICMType; 131 132 /*! 133 * @brief Callback function invoked when a general event is encountered 134 */ 135 typedef void (*Netc_EthSwt_Ip_CallbackType)(uint8 Instance); 136 137 /*! 138 * @brief Callback function invoked when a channel event is encountered 139 */ 140 typedef void (*Netc_EthSwt_Ip_ChCallbackType)(uint8 Instance, uint8 Channel); 141 142 /*================================================================================================== 143 * STRUCTURES AND OTHER TYPEDEFS 144 ==================================================================================================*/ 145 /*! 146 * @brief Query action enum types for tables in Switch. 147 */ 148 typedef enum { 149 NETC_ETHSWT_TABLES_FULL_QUERY = 0x0U, /*!< Full Query */ 150 NETC_ETHSWT_TABLES_ENTRY_ID_QUERY = 0x1U /*!< Entry_Id query only */ 151 } Netc_EthSwt_Ip_TablesQueryActionType; 152 153 /*! 154 * @brief defines FDB entries. 155 */ 156 typedef struct 157 { 158 uint8 MacAddr[6]; /*!< MAC Address */ 159 uint16 FID; /*!< Filtering ID */ 160 uint32 SwitchPortEgressBitMask; /*!< Port Bitmap */ 161 uint32 ET_EID; /*!< Egress Treatment Table Entry ID */ 162 uint8 CutThroughDisable; /*!< CTD */ 163 uint8 OverridETEID; /*!< OETEID */ 164 uint8 EgressPort; /*!< EPORT */ 165 boolean IngressMirroringEnable; /*!< IMIRE */ 166 boolean DynamicEntry; /*!< 0b = Static entry, 1b = Dynamic entry */ 167 boolean TimeStampCapture; /*!< TIMECAPE */ 168 } Netc_EthSwt_Ip_FdbEntryDataType; 169 170 /*! 171 * @brief defines Vlan Filter entries. 172 */ 173 typedef struct 174 { 175 uint32 PortMembershipBitmap; /*!< Port Membership Bitmap */ 176 uint32 VlanID; /*!< Vlan ID */ 177 uint16 FID; /*!< Filtering ID */ 178 uint32 EgressTreatmentApplicabilityPortBitmap; /*!< Egress Treatment Applicability Port Bitmap */ 179 uint32 BaseEgressTreatmentEntryID; /*!< Base Egress Treatment Entry ID */ 180 uint8 SpanningTreeGroupMemberId; /*!< STG_ID */ 181 uint8 MacForwardingOptions; /*!< MFO */ 182 uint8 MacLearningOptions; /*!< MLO */ 183 boolean IpMulticastFloodingEnable; /*!< IP Multicast Flooding Enable */ 184 boolean IpMulticastFilteringEnable; /*!< IP Multicast Filtering Enable */ 185 } Netc_EthSwt_Ip_VlanFilterEntryDataType; 186 187 /****************************************************************************** 188 * Definitions 189 *****************************************************************************/ 190 #define NETC_ETHSWT_IP_FDB_TABLE_ID (15U) /*!< FDB table id */ 191 #define NETC_ETHSWT_IP_VLAN_FILTER_TABLE_ID (18U) /*!< Vlan filter table id */ 192 #define NETC_ETHSWT_IP_EGRESS_COUNT_TABLE_ID (39U) /*!< Egress Count table id */ 193 #define NETC_ETHSWT_IP_EGRESS_TREATMENT_TABLE_ID (33U) /*!< Egress Treatment table id */ 194 #define NETC_ETHSWT_IP_FRM_MODIFICATION_TABLE_ID (40U) /*!< Frame Modification table id */ 195 #define NETC_ETHSWT_IP_INGRESS_PORT_FILTER_TABLE_ID (13U) /*!< Ingress Port Filter table id */ 196 #define NETC_ETHSWT_IP_TIME_GATE_SCHEDULING_TABLE_ID (5U) /*!< Ingress Port Filter table id */ 197 198 #define NETC_ETHSWT_IP_BD_ENTRY_EXIST (1U) /*!< BD entry exist */ 199 #define NETC_ETHSWT_IP_BD_ENTRY_NOT_EXIST (0U) /*!< BD entry not exist*/ 200 201 #define NETC_ETHSWT_IP_BD_NULL_ENTRY_ID (0xFFFFFFFFUL) /*!< BD null entry */ 202 203 /*! 204 * @brief defines CBDR status type. 205 */ 206 typedef uint32 Netc_EthSwt_Ip_CBDRStatusType; 207 #define NETC_ETHSWT_CBDRSTATUS_SUCCES (0x0UL) /*!< cbdr status success */ 208 #define NETC_ETHSWT_CBDRSTATUS_INDEX_ERROR (0x1UL) /*!< index of ring should be 0 or 1 */ 209 #define NETC_ETHSWT_CBDRSTATUS_RINGFULL (0x2UL) /*!< Ring is full */ 210 #define NETC_ETHSWT_CBDRSTATUS_RR_ERROR (0x3UL) /*!< The hardware does not consume the command, or the operation has not finished by hardware. */ 211 #define NETC_ETHSWT_CBDRSTATUS_NUMMATCHED_ERROR (0x4UL) /*!< The NUM_MATCHED field should be 1 when the entry exists for any commands */ 212 #define NETC_ETHSWT_CBDRSTATUS_ACCESSMETHOD_ERROR (0x5UL) /*!< Access_method should be 0, 1, or 2, or the command is not supported by this access method */ 213 #define NETC_ETHSWT_CBDRSTATUS_INVALID_TABLE_ID (0x080UL) /*!< Invalid table ID */ 214 #define NETC_ETHSWT_CBDRSTATUS_NOT_SUPPORTED_ACCESS_METHOD (0x081UL) /*!< Access method specified is not supported */ 215 #define NETC_ETHSWT_CBDRSTATUS_TABLE_INDEX_OUTOFRANGE (0x082UL) /*!< Table index out of range */ 216 #define NETC_ETHSWT_CBDRSTATUS_BUFFER_NOT_SUFFICIENT (0x083UL) /*!< Request data buffer size or response data buffer size is not sufficient */ 217 #define NETC_ETHSWT_CBDRSTATUS_INVALID_CMD (0x084UL) /*!< Invalid command */ 218 #define NETC_ETHSWT_CBDRSTATUS_REQUEST_DATA_BUFFER_ERROR (0x085UL) /*!< Request Data buffer error */ 219 #define NETC_ETHSWT_CBDRSTATUS_ECC_OR_PARITY_ERROR (0x086UL) /*!< Multi-bit ECC or parity error observed during command processing */ 220 #define NETC_ETHSWT_CBDRSTATUS_EXCEEDED_HASH_ENTRY_LIMIT (0x087UL) /*!< Exceeded hash entry limit */ 221 #define NETC_ETHSWT_CBDRSTATUS_EXCEEDED_MAXIMUM_HASH_COLLISION_CHAIN_LIMIT (0x088UL) /*!< Exceeded maximum hash collision chain limit */ 222 #define NETC_ETHSWT_CBDRSTATUS_INVALID_ENTRY_ID (0x089UL) /*!< Invalid ENTRY_ID for HW Managed tables (hash, TCAM) */ 223 #define NETC_ETHSWT_CBDRSTATUS_SEARCH_CMD_FILLED_THE_RESPONSE_DATA_BUFFER (0x08AUL) /*!< Search command filled the response data buffer before completing the command */ 224 #define NETC_ETHSWT_CBDRSTATUS_CMD_FOR_INDEX_TABLE_BEFORE_OSR (0x08BUL) /*!< Command for index table before OSR[ITM_STATE]=0 */ 225 #define NETC_ETHSWT_CBDRSTATUS_INVALID_QUERRY_ACTION (0x08CUL) /*!< Query action specifed is invalid */ 226 #define NETC_ETHSWT_CBDRSTATUS_INVALID_TABLE_ACCESS_PRIVILEGE (0x08DUL) /*!< Invalid table access privilege */ 227 #define NETC_ETHSWT_CBDRSTATUS_SYSTEM_BUS_READ_ERROR (0x08EUL) /*!< System Bus Read Error encountered while processing the command. */ 228 #define NETC_ETHSWT_CBDRSTATUS_SYSTEM_BUS_WRITE_ERROR (0x08FUL) /*!< System Bus Write Error encountered while processing the command. */ 229 #define NETC_ETHSWT_CBDRSTATUS_CLIENT_FAULT (0x090UL) /*!< Client encountered a fault while processing the command. */ 230 #define NETC_ETHSWT_CBDRSTATUS_RESERVED_ERROR (0x091UL) /*!< 0x091 to 0x0FF = reserved */ 231 #define NETC_ETHSWT_CBDRSTATUS_TABLE_SPECIFIC_ERROR (0x100UL) /*!< 0x100 to 0xFFF = Table specific error codes */ 232 #define NETC_ETHSWT_CBDRSTATUS_UPTATE_EXISTING_ADMIN_GATE_CONTROL (0x0D1UL) /* Update action attempted on an existing admin gate control. An existing admin gate control list cannot be modified, Delete admin gate control list first before creating a new admin list. (Use update action with ADMIN_CONTROL_LIST_LENGTH =0 to perform delete). */ 233 #define NETC_ETHSWT_CBDRSTATUS_UPDATE_ACTION_EXCEED_MAX_GCL_LEN (0x0D2UL) /* Update action attempted exceeds TGSTCAPR[MAX_GCL_LEN]. */ 234 #define NETC_ETHSWT_CBDRSTATUS_UPDATE_ACTION_EXCEED_NUM_WORDS (0x0D3UL) /* Update action attempted exceeds TGSTCAPR[NUM_WORDS]. */ 235 #define NETC_ETHSWT_CBDRSTATUS_INSUFFICIENT_RESOURCES (0x0D4UL) /* Insufficient resources to perform the requested operation (not enough free time gate list entries) */ 236 #define NETC_ETHSWT_CBDRSTATUS_TRANSMITTING_TIME_NOT_SUFFICIENT (0x0D5UL) /* Update action attempted with ADMIN_CYCLE_TIME, ADMIN_TIME_INTERVAL_GE_i or truncated ADMIN_TIME_INTERVAL_GE_n due ADMIN_CYCLE_TIME specified is not sufficient to transmit 64 byte of frame data + header overhead. Where header overhead = PTXSDUOR[PTXSDUOR] + PTXSDUOR[PPDU_BCO]. */ 237 #define NETC_ETHSWT_CBDRSTATUS_ADMIN_BASE_TIME_IS_MORE_THAN_1S (0x0D6UL) /* Update action attempted with ADMIN_BASE_TIME specified is more than one second in the past from tcs advance time. */ 238 #define NETC_ETHSWT_CBDRSTATUS_ADMIN_CYCLE_TIME_OVERFLOW (0x0D7UL) /* Update action attempted with ADMIN_CYCLE_TIME + ADMIN_CYCLE_TIME_EXT is greater than 2^32-1. */ 239 #define NETC_ETHSWT_CBDRSTATUS_RETRY_QUERY (0x0D8UL) /* Query action issued when config change occurred. Retry query. */ 240 #define NETC_ETHSWT_CBDRSTATUS_INVALID_ADMIN_HR_CB_GE (0x0D9UL) /* Update action attempted with ADMIN_HR_CB_GE_i set to an invalid value. */ 241 242 /*! 243 * @brief defines access method type. 244 */ 245 typedef enum { 246 NETC_ETHSWT_ENTRY_ID_MATCH = 0x0U, /*!< if entry id match */ 247 NETC_ETHSWT_EXACT_MATCH_KEY_ELEMENT_MATCH, /*!< if exact match key element match */ 248 NETC_ETHSWT_SEARCH_METHOD, /*!< search method */ 249 NETC_ETHSWT_TERNARY_MATCH_KEY_ELEMENT_MATCH /*!< if ternary match key element */ 250 } Netc_EthSwt_Ip_AccessMethodType; 251 252 /*! 253 * @brief defines commands type. 254 */ 255 typedef enum { 256 NETC_ETHSWT_DELETE_CMD = 0x1U, /*!< delete command */ 257 NETC_ETHSWT_UPDATE_CMD = 0x2U, /*!< update command */ 258 NETC_ETHSWT_QUERY_CMD = 0x4U, /*!< query command*/ 259 NETC_ETHSWT_QUERY_FOLLOWEDBY_DELETE_CMD = 0x5U, /*!< query followed by delete command */ 260 NETC_ETHSWT_QUERY_FOLLOWEDBY_UPDATE_CMD = 0x6U, /*!< query followed by update command */ 261 NETC_ETHSWT_ADD_CMD = 0x8U, /*!< add a command */ 262 NETC_ETHSWT_ADD_OR_UPDATE_CMD = 0xAU, /*!< add or update a command */ 263 NETC_ETHSWT_ADD_FOLLOWEDBY_QUERY_CMD = 0xCU, /*!< add followed by query command */ 264 NETC_ETHSWT_ADD_FOLLOWEDBY_QUERY_FOLLOWEDBY_UPDATE_CMD = 0xEU /*!< add followed by query followed by update command */ 265 } Netc_EthSwt_Ip_CommandsType; 266 267 /*! 268 * @brief CMBDR requeste length field. 269 */ 270 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT (20U) 271 /*! 272 * @brief CMBDR requeste length field mask. 273 */ 274 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK (0xFFF00000UL) 275 /*! 276 * @brief CMBDR requeste lengtht. 277 */ 278 #define NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_REQUEST_LENGTH_MASK) 279 280 /*! 281 * @brief CMBDR response length field. 282 */ 283 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT (0U) 284 /*! 285 * @brief CMBDR response length field mask. 286 */ 287 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK (0x000FFFFFUL) 288 /*! 289 * @brief CMBDR response length. 290 */ 291 #define NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_RESPONSE_LENGTH_MASK) 292 293 /** @brief CMD field */ 294 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT (0U) 295 /** @brief CMD field mask */ 296 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK (0x0000000FUL) 297 /** @brief CMD field set */ 298 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CMD_MASK) 299 300 /*! 301 * @brief CMBDR request config access method field. 302 */ 303 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT (12U) 304 /*! 305 * @brief CMBDR request config access method field mask. 306 */ 307 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK (0x00003000UL) 308 /*! 309 * @brief CMBDR request config field access method. 310 */ 311 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_ACCESS_METHOD_MASK) 312 313 /*! 314 * @brief CMBDR request config field table id. 315 */ 316 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT (16U) 317 /*! 318 * @brief CMBDR request config field table id mask. 319 */ 320 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK (0x00FF0000UL) 321 /*! 322 * @brief CMBDR request config table id. 323 */ 324 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_TABLE_ID_MASK) 325 326 /*! 327 * @brief CMBDR request version field. 328 */ 329 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT (24U) 330 /*! 331 * @brief CMBDR request version field mask. 332 */ 333 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK (0x3F000000UL) 334 /*! 335 * @brief CMBDR request version. 336 */ 337 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_VERSION_MASK) 338 339 /*! 340 * @brief CMBDR request config field. 341 */ 342 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT (30U) 343 /*! 344 * @brief CMBDR request config field mask. 345 */ 346 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK (0x4F000000UL) 347 /*! 348 * @brief CMBDR request config. 349 */ 350 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_CCI_MASK) 351 352 /*! 353 * @brief CMBDR request RR field. 354 */ 355 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT (31U) 356 /*! 357 * @brief CMBDR request RR field mask. 358 */ 359 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK (0x80000000UL) 360 /*! 361 * @brief CMBDR request RR. 362 */ 363 #define NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_CONFIG_FIELD_RR_MASK) 364 365 /*! 366 * @brief CMBDR request NPF field. 367 */ 368 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT (15U) 369 /*! 370 * @brief CMBDR request NPF field mask. 371 */ 372 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_MASK (0x00008000UL) 373 /*! 374 * @brief CMBDR request NPF. 375 */ 376 #define NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_SHIFT)) & NETC_ETHSWT_IP_CMDBD_REQFMT_NPF_FIELD_MASK) 377 378 /*! 379 * @brief NTMP request and response message header format for buffer descriptors of command rings. 380 */ 381 typedef struct { 382 uint32 MessageHeaderDataField[8U]; /*!< used for both request and response message header data format */ 383 } Netc_EthSwt_Ip_NTMPMessageHeaderFormatType; 384 385 /*! 386 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 387 */ 388 typedef enum { 389 NETC_ETHSWT_IP_REQHEADER_ADDR_L = 0x0U, /*!< a 16-byte aligned low part of memory address for a table, offset: 0x0 */ 390 NETC_ETHSWT_IP_REQHEADER_ADDR_H = 0x1U, /*!< a 16-byte aligned high part of memory address for a table, offset: 0x1 */ 391 NETC_ETHSWT_IP_REQHEADER_LENGTHFIELD = 0x2U, /*!< request and response buffer length in Request Header, offset: 0x2 */ 392 NETC_ETHSWT_IP_REQHEADER_CONFIGFIELD = 0x3U, /*!< config field includes Table id, access method, command etc. in Request Header, offset: 0x3 */ 393 NETC_ETHSWT_IP_REQHEADER_NPFFIELD = 0x7U /*!< NPF field in Request Header, offsext: 0x7 */ 394 } Netc_EthSwt_Ip_NTMPReqHeaderFormatIndexType; 395 396 #define NETC_ETHSWT_IP_RSPHEADER_STATUS_FIELD_INDEX (0x3U) /*!< status field includes RR bit, ERROR field and NUM_MATCHED field in Response Header Format */ 397 398 /*! 399 * @brief NTMP request message header format index enum for buffer descriptors of command rings. 400 */ 401 typedef struct { 402 uint16 ReqBuffLength; /*!< Table Request data buffer length field of NTMP Request Message Header Data Format */ 403 uint16 RspBuffLength; /*!< Table Response data buffer length field of NTMP Request Message Header Data Format */ 404 uint8 CmdCompletionInt; /*!< CCI (Command Completion Interrupt) in config field of Request Message Header Data Format */ 405 uint8 Version; /*!< Protocol Version in config field of Request Message Header Data Format */ 406 uint8 TableId; /*!< TABLE_ID in config field of Request Message Header Data Format */ 407 Netc_EthSwt_Ip_AccessMethodType AccessMethod; /*!< ACCESS_METHOD in config field of Request Message Header Data Format */ 408 Netc_EthSwt_Ip_CommandsType Cmd; /*!< COMMAND in config field of Request Message Header Data Format */ 409 } NetcEthSwt_Ip_ReqHeaderTableOperationDataType; 410 411 /*! 412 * @brief buffer descriptors of command rings. 413 */ 414 typedef struct { 415 Netc_EthSwt_Ip_NTMPMessageHeaderFormatType *CmdBDAddr; /*!< Address where command buffer descriptor will be saved. The address must be 128 byte aligned. */ 416 uint8 lengthCBDR; /*!< the length of command ring. */ 417 } Netc_EthSwt_Ip_CmdBDType; 418 /* ---bits field for NTMP request message--- */ 419 420 /* +++bits field for NTMP response message+++ */ 421 /*! 422 * @brief CMBDR RR status field. 423 */ 424 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_SHIFT (31U) 425 /*! 426 * @brief CMBDR RR status field mask. 427 */ 428 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_RR_MASK (0x80000000UL) 429 430 /*! 431 * @brief CMBDR error status field. 432 */ 433 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_SHIFT (16U) 434 /*! 435 * @brief CMBDR error status field mask. 436 */ 437 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_ERROR_MASK (0x0FFF0000UL) 438 439 /*! 440 * @brief CMBDR status field num matched. 441 */ 442 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_SHIFT (0U) 443 /*! 444 * @brief CMBDR status field num matched mask. 445 */ 446 #define NETC_ETHSWT_IP_CMDBD_RSPFMT_STATUS_FIELD_NUMMATCHED_MASK (0x0000FFFFUL) 447 /* ---bits field for NTMP response message--- */ 448 449 /* +++bits field and structure for CFGE_DATA format+++ */ 450 /*! 451 * @brief FDB table config port bitmap field. 452 */ 453 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_SHIFT (0U) 454 /*! 455 * @brief FDB table config port bitmap map mask. 456 */ 457 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_MASK (0x00FFFFFFUL) 458 /*! 459 * @brief FDB table config port bitmap. 460 */ 461 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_MASK) 462 463 /*! 464 * @brief FDB table config port OETEID field. 465 */ 466 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_SHIFT (0U) 467 /*! 468 * @brief FDB table config port OETEID field mask. 469 */ 470 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_MASK (0x00000003UL) 471 /*! 472 * @brief FDB table config port OETEID. 473 */ 474 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_OETEID_MASK) 475 476 /*! 477 * @brief FDB table config port EPORT field. 478 */ 479 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_SHIFT (2U) 480 /*! 481 * @brief FDB table config port EPORT field mask. 482 */ 483 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_MASK (0x0000007CUL) 484 /*! 485 * @brief FDB table config port EPORT. 486 */ 487 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_EPORT_MASK) 488 489 /*! 490 * @brief FDB table config port IMIRE field. 491 */ 492 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_SHIFT (7U) 493 /*! 494 * @brief FDB table config port IMIRE field mask. 495 */ 496 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_MASK (0x00000080UL) 497 /*! 498 * @brief FDB table config port IMIRE. 499 */ 500 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_IMIRE_MASK) 501 502 /*! 503 * @brief FDB table config port CTD field. 504 */ 505 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_SHIFT (9U) 506 /*! 507 * @brief FDB table config port CTD field mask. 508 */ 509 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_MASK (0x00000600UL) 510 /*! 511 * @brief FDB table config port CTD. 512 */ 513 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_CTD_MASK) 514 515 /*! 516 * @brief FDB table config port DYNAMIC field. 517 */ 518 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_SHIFT (11U) 519 /*! 520 * @brief FDB table config port DYNAMIC field mask. 521 */ 522 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_MASK (0x00000800UL) 523 /*! 524 * @brief FDB table config port DYNAMIC. 525 */ 526 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_DYNAMIC_MASK) 527 528 /*! 529 * @brief FDB table config port TIMECAPE field. 530 */ 531 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_SHIFT (12U) 532 /*! 533 * @brief FDB table config port TIMECAPE field mask. 534 */ 535 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_MASK (0x00001000UL) 536 /*! 537 * @brief FDB table config port TIMECAPE field. 538 */ 539 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD_TIMECAPE_MASK) 540 541 /*! 542 * @brief FDB Table CFGE_DATA format. 543 */ 544 typedef struct { 545 uint32 Cfge_PortBitmap; /*!< FDB table config port bitmap */ 546 uint32 Cfge_ConfigField; /*!< FDB table config field */ 547 uint32 Cfge_EtEid; /*!< FDB table eid */ 548 } Netc_EthSwt_Ip_FDBTableCFGEDataType; 549 550 /*! 551 * @brief FDB Table CFGE_DATA format enum type. 552 */ 553 typedef enum { 554 NETC_ETHSWT_IP_FDBTABLE_CFGE_PORT_BITMAP_FIELD = 9U, /*!< PORT_BITMAP field in FDB Table CFGE_DATA Format */ 555 NETC_ETHSWT_IP_FDBTABLE_CFGE_CONFIG_FIELD = 10U, /*!< CONFIG field includes TIMECAPE, DYNAMIC etc in FDB Table CFGE_DATA Format */ 556 NETC_ETHSWT_IP_FDBTABLE_CFGE_ETEID_FIELD = 11U /*!< ET_EID field in FDB Table CFGE_DATA Format */ 557 } Netc_EthSwt_Ip_FDBTableCFGEDataIndexType; 558 /* +++bits field and structure for CFGE_DATA format+++ */ 559 560 /* +++bits field for KEYE_DATA format+++ */ 561 /*! 562 * @brief FDB table config MACC_ADDR_L field. 563 */ 564 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_SHIFT (0U) 565 /*! 566 * @brief FDB table config MACC_ADDR_L field mask. 567 */ 568 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_MASK (0xFFFFFFFFUL) 569 /*! 570 * @brief FDB table config MACC_ADDR_L. 571 */ 572 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_L_MASK) 573 574 /*! 575 * @brief FDB table config MACC_ADDR_H field. 576 */ 577 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_SHIFT (0U) 578 /*! 579 * @brief FDB table config MACC_ADDR_H field mask. 580 */ 581 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_MASK (0x0000FFFFUL) 582 /*! 583 * @brief FDB table config MACC_ADDR_H. 584 */ 585 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_MAC_ADDR_H_MASK) 586 587 /*! 588 * @brief FDB table config FID field. 589 */ 590 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_SHIFT (0U) 591 /*! 592 * @brief FDB table config FID field mask. 593 */ 594 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_MASK (0x00000FFFUL) 595 /*! 596 * @brief FDB table config FID. 597 */ 598 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_KEYE_DATA_FID_MASK) 599 600 /*! 601 * @brief FDB Table KEYE_DATA format. Netc_EthSwt_Ip_FDBTableKEYEDataType 602 */ 603 typedef struct { 604 uint32 MacAddrL; /*!< FDB Mac addr L where the most significant byte of the MAC address is stored */ 605 uint32 MacAddrH; /*!< FDB Mac addr H */ /* [notice]: just 16 bits */ 606 uint32 Fid; /*!< FDB Fid */ /* [notice]: just 12 bits */ 607 } Netc_EthSwt_Ip_FDBTableKEYEDataType; 608 /* ---bits field for KEYE_DATA format--- */ 609 610 /* +++bits field for SEARCH_CRITERIA format+++ */ 611 /*! 612 * @brief FDB table search criteria ACTE_MC field. 613 */ 614 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_SHIFT (24U) 615 /*! 616 * @brief FDB table search criteria ACTE_MC field mask. 617 */ 618 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_MASK (0x01000000UL) 619 /*! 620 * @brief FDB table search criteria ACTE_MC. 621 */ 622 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTEMC_MASK) 623 624 /*! 625 * @brief FDB table search criteria CFGE_MC field. 626 */ 627 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_SHIFT (16U) 628 /*! 629 * @brief FDB table search criteria CFGE_MC field mask. 630 */ 631 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_MASK (0x00070000UL) 632 /*! 633 * @brief FDB table search criteria CFGE_MC. 634 */ 635 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGEMC_MASK) 636 637 /*! 638 * @brief FDB table search criteria KEYE_MC field. 639 */ 640 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_SHIFT (8U) 641 /*! 642 * @brief FDB table search criteria KEYE_MC field mask. 643 */ 644 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_MASK (0x00000300UL) 645 /*! 646 * @brief FDB table search criteria KEYE_MC. 647 */ 648 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_KEYEMC_MASK) 649 650 /*! 651 * @brief FDB table search criteria ACTF_LAG field. 652 */ 653 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_SHIFT (7U) 654 /*! 655 * @brief FDB table search criteria ACTF_LAG field mask. 656 */ 657 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_MASK (0x00000080UL) 658 /*! 659 * @brief FDB table search criteria ACTF_LAG. 660 */ 661 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTFLAG_MASK) 662 663 /*! 664 * @brief FDB table search criteria ACT_CNT field. 665 */ 666 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_SHIFT (0U) 667 /*! 668 * @brief FDB table search criteria ACT_CNT field mask. 669 */ 670 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_MASK (0x0000007FUL) 671 /*! 672 * @brief FDB table search criteria ACT_CNT. 673 */ 674 #define NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ACTCNT_MASK) 675 676 /*! 677 * @brief FDB Table Match Criteria field data type enumeration. Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType 678 */ 679 typedef enum { 680 NETC_ETHSWT_IP_FDBTABLE_MATCH_ANY_CRITERIA = 0U, /*!< 0x0 = Match Any Criteria. */ 681 NETC_ETHSWT_IP_FDBTABLE_MATCH_ACTE_DATA_FIELD, /*!< 0x1 = Exact match with ACTE_DATA. */ 682 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_DYNAMIC_FIELD, /*!< 0x2: Match CFGE_DATA[DYNAMIC] field, will be remapped to 0x1 */ 683 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_PORTBITMSP_FIELD, /*!< 0x3: Match CFGE_DATA[PORT_BITMAP] field, will be remapped to 0x2 */ 684 NETC_ETHSWT_IP_FDBTABLE_MATCH_CFGE_DYNAMIC_AND_PORTBITMAP_FIELD, /*!< 0x4: Match CFGE_DATA[DYNAMIC & PORT_BITMAP] field, will be remapped to 0x3 */ 685 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_FID_FIELD, /*!< 0x5: Match KEYE_DATA[FID] provided, will be remapped to 0x1 */ 686 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_MULTICAST_BIT_OF_MACADDR, /*!< 0x6: Match KEYE_DATA[MAC_ADDR][MULTICAST], will be remapped to 0x2. 687 Where the MAC Multicast bit is least significant bit of the most significant byte of the destination MAC address. 688 KEYE_DATA[MAC_ADDR][MULTICAST] = 0b1, matching entries with multicast mac address 689 KEYE_DATA[MAC_ADDR][MULTICAST] = 0b0, matching entries with unicast mac address */ 690 NETC_ETHSWT_IP_FDBTABLE_MATCH_KEYE_FID_AND_MULTICAST_BIT_OF_MACADDR /*!< 0x7: Match KEYE_DATA[FID] and KEYE_DATA[MAC_ADDR][MULTICAST], will be remapped to 0x3. */ 691 } Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType; 692 693 #define NETC_ETHSWT_IP_FDBTABLE_CFGE_MATCH_CRITERIA_ADJUSTING_FACTOR (1U) /*!< for remapping CFGE match criteria flag */ 694 #define NETC_ETHSWT_IP_FDBTABLE_KEYE_MATCH_CRITERIA_ADJUSTING_FACTOR (4U) /*!< for remapping KEYE match criteria flag */ 695 696 /*! 697 * @brief Multicast bit of Mac Address field. 698 */ 699 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_SHIFT (0U) 700 /*! 701 * @brief Multicast bit of Mac Address field mask. 702 */ 703 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_MASK (0x00000001UL) 704 /*! 705 * @brief Multicast bit of Mac Address. 706 */ 707 #define NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_SHIFT)) & NETC_ETHSWT_IP_MULTICASTBIT_OF_MAC_ADDRESS_MASK) 708 709 /*! 710 * @brief FDB Table CFGE Match Criteria format in SEARCH_CRITERIA. Netc_EthSwt_Ip_FDBTableCFGEMatchDataType 711 */ 712 typedef struct { 713 uint32 SearchPortBitMap; /*!< Fdb table search port bitmap data */ 714 boolean SearchDynamicEntry; /*!< Fdb table search dynamic field in CFGE_DATA */ 715 } Netc_EthSwt_Ip_FDBTableCFGEMatchDataType; 716 717 /*! 718 * @brief FDB Table KEYE Match Criteria format in SEARCH_CRITERIA. Netc_EthSwt_Ip_FDBTableKEYEMatchDataType 719 */ 720 typedef struct { 721 uint32 SearchFid; /*!< Fdb table search FID data */ 722 boolean SearchMulticastMacAddr; /*!< TRUE: search Multicast Mac Address Entries 723 FALSE: search Unicast Mac Address Entries */ 724 } Netc_EthSwt_Ip_FDBTableKEYEMatchDataType; 725 726 /*! 727 * @brief FDB Table ACTE_DATA (Activity Element Data) format. Netc_EthSwt_Ip_FDBTableACTEDataType 728 */ 729 typedef struct { 730 uint8 ActivityCounter; /*!< Activity Counter data in ACTE_DATA format */ 731 boolean ActivityFlag; /*!< Activity Flag data in ACTE_DATA format */ 732 } Netc_EthSwt_Ip_FDBTableACTEDataType; 733 734 /*! 735 * @brief FDB Table SEARCH_CRITERIA format. Netc_EthSwt_Ip_FDBTableSearchCriteriaDataType 736 */ 737 typedef struct { 738 uint32 SearchResumeEntryId; /*!< Fdb table search criteria resume entry id */ 739 Netc_EthSwt_Ip_FDBTableMatchCriteriaDataType SearchMatchCriteria; /*!< Fdb table search Match Criteria */ 740 Netc_EthSwt_Ip_FDBTableACTEDataType SearchActeData; /*!< Fdb table search ACTE data */ 741 Netc_EthSwt_Ip_FDBTableCFGEMatchDataType SearchCfgeData; /*!< Fdb table search CFGE data */ 742 Netc_EthSwt_Ip_FDBTableKEYEMatchDataType SearchKeyeData; /*!< Fdb table search KEYE data */ 743 } Netc_EthSwt_Ip_FDBTableSearchCriteriaDataType; 744 745 /*! 746 * @brief FDB Table SEARCH_CRITERIA format enum type. 747 * [notes:] the enum starts from 1U because it is the second item in FDB table request data buffer format 748 */ 749 typedef enum { 750 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_RESUMEENTRYID = 1U, /*!< RESUME_ENTRY_ID field in Search Criteria Format */ 751 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MACADDRESS_L, /*!< Low part of Mac Address Field of KEYE DATA in Search Criteria Format */ 752 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MACADDRESS_H, /*!< High part of Mac Address Field of KEYE DATA in Search Criteria Format */ 753 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_FID, /*!< FID Field of KEYE DATA in Search Criteria Format */ 754 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_PORTBITMAP, /*!< Port_Bitmap Field of CFGE DATA in Search Criteria Format */ 755 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_CFGECONFIG, /*!< Config Field of CFGE DATA in Search Criteria Format */ 756 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_ETEID, /*!< ET_EID Field of CFGE DATA in Search Criteria Format */ 757 NETC_ETHSWT_IP_FDBTABLE_SEARCH_CRITERIA_MATCHCRITERIA /*!< Match Criteria Field includes ACTE_MC, CFGE_MC etc in Search Criteria Format */ 758 } Netc_EthSwt_Ip_FDBTableSearchCriteriaDataIndexType; 759 /* ---bits field for SEARCH_CRITERIA format--- */ 760 761 /* +++bits field and structure for FDB Table Request Data Buffer Format+++ */ 762 /*! 763 * @brief Switch Tables Request Data Buffer CFGEU field. 764 */ 765 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT (0U) 766 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK (0x00000001UL) 767 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_CFGEU_MASK) 768 /*! 769 * @brief FDB table Request Data Buffer ACTEU field. 770 */ 771 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_SHIFT (1U) 772 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_MASK (0x00000002UL) 773 #define NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_SHIFT)) & NETC_ETHSWT_IP_FDBTABLE_REQFMT_ACTIONS_FIELD_ACTEU_MASK) 774 /*! 775 * @brief Switch Tables Request Data Buffer DEBUG_OPTIONS field. 776 */ 777 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_SHIFT (16U) 778 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_MASK (0x00FF0000UL) 779 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_DEBUG_OPTIONS_MASK) 780 /*! 781 * @brief Switch Tables Request Data Buffer QUERY_ACTIONS field. 782 */ 783 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT (24U) 784 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK (0x0F000000UL) 785 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_QUERY_ACTIONS_MASK) 786 787 /*! 788 * @brief Switch Tables Request Data Buffer TABLE_VERSION field. 789 */ 790 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT (28U) 791 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK (0xF0000000UL) 792 #define NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSIONS(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_SHIFT)) & NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD_TABLE_VERSION_MASK) 793 794 /*! 795 * @brief Request and Response Data Buffer Format of Tables supported by Switch. 796 */ 797 typedef struct { 798 uint32 TableDataField[NETC_ETHSWT_IP_TABLEDATA_BUFFER_LENGTH]; /*!< the request and response data buffer share the same memory */ 799 } Netc_EthSwt_Ip_SwitchTableDataType; 800 801 802 /*! 803 * @brief FDB Table response data type enumeration. Netc_EthSwt_Ip_FDBTable_ResponsDataIndexType 804 */ 805 typedef enum { 806 NETC_ETHSWT_FDBTABLE_RSPDATA_STATUS = 0x0U, /*!< Status Field In FDB Table Response Data Buffer */ 807 NETC_ETHSWT_FDBTABLE_RSPDATA_ENTRYID, /*!< Entry_ID Field In FDB Table Response Data Buffer */ 808 NETC_ETHSWT_FDBTABLE_RSPDATA_MACADDRESS_L, /*!< Low part of Mac Address Field of KEYE DATA In FDB Table Response Data Buffer */ 809 NETC_ETHSWT_FDBTABLE_RSPDATA_MACADDRESS_H, /*!< High part of Mac Address Field of KEYE DATA In FDB Table Response Data Buffer */ 810 NETC_ETHSWT_FDBTABLE_RSPDATA_FID, /*!< FID Field of KEYE DATA In FDB Table Response Data Buffer */ 811 NETC_ETHSWT_FDBTABLE_RSPDATA_PORTBITMAP, /*!< Port_Bitmap Field of CFGE DATA In FDB Table Response Data Buffer */ 812 NETC_ETHSWT_FDBTABLE_RSPDATA_CFGECONFIG, /*!< Config Field of CFGE DATA In FDB Table Response Data Buffer */ 813 NETC_ETHSWT_FDBTABLE_RSPDATA_ETEID, /*!< ET_EID Field of CFGE DATA In FDB Table Response Data Buffer */ 814 NETC_ETHSWT_FDBTABLE_RSPDATA_ACTEDATA /*!< ACTE Data Field In FDB Table Response Data Buffer */ 815 } Netc_EthSwt_Ip_FDBTable_ResponsDataIndexType; 816 /* ---bits field and structure for FDB Table Request Data Buffer Format--- */ 817 818 /* index of Egress Count Table Request Data Buffer Format */ 819 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD (0U) /*!< first uint32 item of Egress Count Table Request Data Buffer Format */ 820 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACCESSKEY_FIELD (1U) /*!< second uint32 item of Egress Count Table Request Data Buffer Format */ 821 822 /*! 823 * @brief Data fields in Egress Count Table Request Data Buffer Format. 824 */ 825 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (0U) 826 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000001UL) 827 #define NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_EGRESSCOUNTTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 828 829 /*! 830 * @brief Egress Count Table update actions data type enumeration. Netc_EthSwt_Ip_ECTableUpdateActionsDataType 831 */ 832 typedef enum { 833 NETC_ETHSWT_EGRESSCOUNTTABLE_NO_UPDATE_STATISTICS_ELEMENT = 0U, /*!< No update performed to the Statistics Element */ 834 NETC_ETHSWT_EGRESSCOUNTTABLE_RESET_STATISTICS_ELEMENT /*!< All counters within the Statistics Element are reset */ 835 } Netc_EthSwt_Ip_ECTableUpdateActionsDataType; 836 837 /*! 838 * @brief Statistics data of Egress Count Table in response data buffer. Netc_EthSwt_Ip_ECTableStatisticsDataType 839 */ 840 typedef struct { 841 uint64 EnqueuedFrmCnt; /*!< Enqueued Frame Count data, the number of frames enqueued on egress class queues */ 842 uint64 RejectedFrmCnt; /*!< Rejected Frame Count data, he number of frames rejected in egress class queues, due to tail drop */ 843 } Netc_EthSwt_Ip_ECTableStatisticsDataType; 844 845 /*! 846 * @brief Egress Count Table response data type enumeration. Netc_EthSwt_Ip_EgressCountTable_RspDataIndexType 847 */ 848 typedef enum { 849 NETC_ETHSWT_ECTABLE_RSPDATA_ENTRYID = 0x0U, /*!< Entry Id Field In Egress Count Table Response Data Buffer */ 850 NETC_ETHSWT_ECTABLE_RSPDATA_ENQFRMCNT_L, /*!< Lower 32bits of Enqueued Frame Count Field In Egress Count Table Response Data Buffer */ 851 NETC_ETHSWT_ECTABLE_RSPDATA_ENQFRMCNT_H, /*!< Higher 32bits of Enqueued Frame Count Field In Egress Count Table Response Data Buffer */ 852 NETC_ETHSWT_ECTABLE_RSPDATA_REJFRMCNT_L, /*!< Lower 32bits of Rejected Frame Count Field In Egress Count Table Response Data Buffer */ 853 NETC_ETHSWT_ECTABLE_RSPDATA_REJFRMCNT_H /*!< Higher 32bits of Rejected Frame Count Field In Egress Count Table Response Data Buffer */ 854 } Netc_EthSwt_Ip_EgressCountTable_RspDataIndexType; 855 856 /*! 857 * @brief EFM_DATA_LEN field in Egress Treatment Table CFGE_DATA format. 858 */ 859 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_SHIFT (16U) 860 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_MASK (0x07FF0000UL) 861 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_DATA_LEN_MASK) 862 863 /*! 864 * @brief EFM_LEN_CHANGE field in Egress Treatment Table CFGE_DATA format. 865 */ 866 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_SHIFT (9U) 867 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_MASK (0x0000FE00UL) 868 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_LEN_CHANGE_MASK) 869 870 /*! 871 * @brief ECA field in Egress Treatment Table CFGE_DATA format. 872 */ 873 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_SHIFT (6U) 874 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_MASK (0x000001C0UL) 875 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_COUNTER_ACTION_MASK) 876 877 /*! 878 * @brief ESQA field in Egress Treatment Table CFGE_DATA format. 879 */ 880 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_SHIFT (4U) 881 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_MASK (0x00000030UL) 882 #define NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_EGRESS_SEQUENCE_ACTION_MASK) 883 884 /*! 885 * @brief EFM_MODE field in Egress Treatment Table CFGE_DATA format. 886 */ 887 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_SHIFT (0U) 888 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_MASK (0x00000003UL) 889 #define NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_SHIFT)) & NETC_ETHSWT_IP_ETTABLE_CFGE_FRM_MODIFICATION_MODE_MASK) 890 891 /*! 892 * @brief Egress Treatment Table egress counter action data type definitions. 893 */ 894 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableCounterActionType; 895 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_NOT_INCREMENT_EGRESSFRMCOUNTER (0x0U) /*!< Do not increment egress frame counter */ 896 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_INCREMENT_EGRESSFRMCOUNTER (0x1U) /*!< Increment egress frame counter */ 897 898 /*! 899 * @brief Egress Treatment Table egress sequence actions data type definitions. 900 */ 901 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableSequenceActionType; 902 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_NO_SEQUENCE_ACTION_REQUIRED (0x0U) /*!< No Sequence Action required */ 903 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_SEQUENCE_RECOVERY_ACTION (0x2U) /*!< Sequence Recovery action */ 904 905 /*! 906 * @brief Egress Treatment Table egress frame modification mode data type definitions. 907 */ 908 typedef uint32 Netc_EthSwt_Ip_EgressTreatmentTableFrmModificationModeType; 909 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_DEFAULT_FRM_MODIFICATION_MODE (0x0U) /*!< Normal/Default mode */ 910 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_L2ACTION_FRM_MODIFICATION_MODE (0x1U) /*!< When EFM_EID[L2_ACT]=1b */ 911 #define NETC_ETHSWT_EGRESSTREATMENTTABLE_PAYLOADACTION_FRM_MODIFICATION_MODE (0x2U) /*!< When EFM_EID[PLD_ACT]=001b */ 912 913 /*! 914 * @brief Egress Treatment Table response data type enumeration. Netc_EthSwt_Ip_EgressTreatmentTable_RspDataIndexType 915 */ 916 typedef enum { 917 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_ENTRYID_FIELD = 0U, /*!< first uint32 item of Egress Treatment Table Response Data Buffer Format */ 918 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA0, /*!< first item of CFGEDATA but second item of Egress Treatment Table Response Data Buffer Format */ 919 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA1, /*!< second item of CFGEDATA but third item of Egress Treatment Table Response Data Buffer Format */ 920 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA2, /*!< third item of CFGEDATA but forth item of Egress Treatment Table Response Data Buffer Format */ 921 NETC_ETHSWT_IP_EGRESSTREATMENTTABLE_RSPFMT_CFGEDATA3 /*!< forth item of CFGEDATA but fifth item of Egress Treatment Table Response Data Buffer Format */ 922 } Netc_EthSwt_Ip_EgressTreatmentTable_RspDataIndexType; 923 924 /*! 925 * @brief defines Egress Treatment Table entries. 926 */ 927 typedef struct 928 { 929 uint32 EgressTreatmentEntryID; /*!< Egress Treatment Table Entry ID */ 930 uint32 EgressSeqActionsTargetEID; /*!< Egress Sequence Actions Target Entry ID */ 931 uint32 EgressCountTableEID; /*!< Egress Count Table Entry ID */ 932 uint32 EgressFrmModificationEID; /*!< Egress Frame Modification Entry ID */ 933 uint16 EgressFrmModificationDataLength; /*!< Egress Frame Modification Data Length */ 934 uint8 EgressFrmModificationLengthChange; /*!< Egress Frame Modification Length Change */ 935 Netc_EthSwt_Ip_EgressTreatmentTableCounterActionType EgressCounterAction; /*!< Egress Counter Action */ 936 Netc_EthSwt_Ip_EgressTreatmentTableSequenceActionType EgressSequenceAction; /*!< Egress Sequence Actions */ 937 Netc_EthSwt_Ip_EgressTreatmentTableFrmModificationModeType EgressFrmModificationMode; /*!< Egress Frame Modification Mode */ 938 } Netc_EthSwt_Ip_EgressTreatmentEntryDataType; 939 940 /*! 941 * @brief DEST_MAC_ADDR (most significant portion) field in Frame Modification Table CFGE_DATA format. 942 */ 943 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_SHIFT (16U) 944 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_MASK (0xFFFF0000UL) 945 #define NENETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_DEST_MAC_ADDR_H_MASK) 946 947 /*! 948 * @brief SMAC_PORT field in Frame Modification Table CFGE_DATA format. 949 */ 950 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_SHIFT (11U) 951 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_MASK (0x0000F800UL) 952 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SRC_MAC_ADDR_PORT_MASK) 953 954 /*! 955 * @brief SQT_ACT field in Frame Modification Table CFGE_DATA format. 956 */ 957 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_SHIFT (8U) 958 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_MASK (0x00000700UL) 959 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_SEQUENCE_TAG_ACTION_MASK) 960 961 /*! 962 * @brief OUTER_VID_ACT field in Frame Modification Table CFGE_DATA format. 963 */ 964 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_SHIFT (6U) 965 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_MASK (0x000000C0UL) 966 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VID_ACTION_MASK) 967 968 /*! 969 * @brief VLAN_HDR_ACT field in Frame Modification Table CFGE_DATA format. 970 */ 971 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_SHIFT (4U) 972 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_MASK (0x00000030UL) 973 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_VLAN_HEADER_ACTION_MASK) 974 975 /*! 976 * @brief MAC_HDR_ACT field in Frame Modification Table CFGE_DATA format. 977 */ 978 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_SHIFT (1U) 979 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_MASK (0x0000000EUL) 980 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_MAC_HEADER_ACTION_MASK) 981 982 /*! 983 * @brief L2_ACT field in Frame Modification Table CFGE_DATA format. 984 */ 985 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_SHIFT (0U) 986 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_MASK (0x00000001UL) 987 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_LAYER2_ACTION_MASK) 988 989 /*! 990 * @brief PLD_ACT field in Frame Modification Table CFGE_DATA format. 991 */ 992 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_SHIFT (24U) 993 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_MASK (0x07000000UL) 994 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_ACTION_MASK) 995 996 /*! 997 * @brief OUTER_DEI_ACT field in Frame Modification Table CFGE_DATA format. 998 */ 999 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_SHIFT (22U) 1000 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_MASK (0x00C00000UL) 1001 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_DEI_ACTION_MASK) 1002 1003 /*! 1004 * @brief OUTER_PCP_ACT field in Frame Modification Table CFGE_DATA format. 1005 */ 1006 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_SHIFT (19U) 1007 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_MASK (0x00380000UL) 1008 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_PCP_ACTION_MASK) 1009 1010 /*! 1011 * @brief OUTER_TPID_ACT field in Frame Modification Table CFGE_DATA format. 1012 */ 1013 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_SHIFT (16U) 1014 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_MASK (0x00070000UL) 1015 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_TPID_ACTION_MASK) 1016 1017 /*! 1018 * @brief OUTER_VLAN_DEI field in Frame Modification Table CFGE_DATA format. 1019 */ 1020 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_SHIFT (15U) 1021 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_MASK (0x00008000UL) 1022 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_DEI_MASK) 1023 1024 /*! 1025 * @brief OUTER_VLAN_PCP field in Frame Modification Table CFGE_DATA format. 1026 */ 1027 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_SHIFT (12U) 1028 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_MASK (0x00007000UL) 1029 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_PCP_MASK) 1030 1031 /*! 1032 * @brief OUTER_VLAN_VID field in Frame Modification Table CFGE_DATA format. 1033 */ 1034 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_SHIFT (0U) 1035 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_MASK (0x00000FFFUL) 1036 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_OUTER_VLAN_VID_MASK) 1037 1038 /*! 1039 * @brief PLD_OFFSET field in Frame Modification Table CFGE_DATA format. 1040 */ 1041 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_SHIFT (0U) 1042 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_MASK (0x000000FFUL) 1043 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_PAYLOAD_OFFSET_MASK) 1044 1045 /*! 1046 * @brief FMD_BYTES field in Frame Modification Table CFGE_DATA format. 1047 */ 1048 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_SHIFT (0U) 1049 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_MASK (0x0000FFFFUL) 1050 #define NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_SHIFT)) & NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_CFGE_FRM_MODI_BYTES_MASK) 1051 1052 /*! 1053 * @brief Frame Modification Table response data type enumeration. Netc_EthSwt_Ip_FrmModificationTable_RspDataIndexType 1054 */ 1055 typedef enum { 1056 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_ENTRYID_FIELD = 0U, /*!< first uint32 item of Frame modification Table Response Data Buffer Format */ 1057 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA0, /*!< first item of CFGEDATA but second item of Frame Modification Table Response Data Buffer Format */ 1058 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA1, /*!< second item of CFGEDATA but third item of Frame Modification Table Response Data Buffer Format */ 1059 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA2, /*!< third item of CFGEDATA but forth item of Frame Modification Table Response Data Buffer Format */ 1060 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA3, /*!< forth item of CFGEDATA but fifth item of Frame Modification Table Response Data Buffer Format */ 1061 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but sixth item of Frame Modification Table Response Data Buffer Format */ 1062 NETC_ETHSWT_IP_FRMMODIFICATIONTABLE_RSPFMT_CFGEDATA5 /*!< sixth item of CFGEDATA but seventh item of Frame Modification Table Response Data Buffer Format */ 1063 } Netc_EthSwt_Ip_FrmModificationTable_RspDataIndexType; 1064 1065 /*! 1066 * @brief defines Frame Modification Table entries. 1067 */ 1068 typedef struct 1069 { 1070 uint32 FrmModificationEntryID; /*!< Frame Modification Table Entry ID */ 1071 uint32 FrmModificationDataEntryID; /*!< Frame Modification Data Table Entry ID */ 1072 uint16 FrmModificationDataBytes; /*!< Frame Modification Data Bytes */ 1073 uint8 DestMacAddr[6U]; /*!< Destination Mac Address, big-endian order */ 1074 uint8 SrcMacAddrRegisterPort; /*!< Source Mace Address Register Port */ 1075 uint8 SequenceTagAction; /*!< Sequence Tag Action */ 1076 uint8 OuterVidActions; /*!< Outer VID Actions */ 1077 uint8 L2HeaderVlanActions; /*!< Layer 2 VLAN Actions */ 1078 uint8 L2HeaderMacActions; /*!< Layer 2 Header Mac Actions */ 1079 uint8 L2Actions; /*!< Layer 2 Actions */ 1080 uint8 PayloadActions; /*!< Payload Actions */ 1081 uint8 OuterDeiAction; /*!< Outer DEI Action */ 1082 uint8 OuterPcpAction; /*!< Outer PCP Action */ 1083 uint8 OuterTpidAction; /*!< Outer TPID Action */ 1084 uint8 OuterVlanDei; /*!< Outer VLAN DEI */ 1085 uint8 OuterVlanPcp; /*!< Outer VLAN PCP */ 1086 uint16 OuterVlanVID; /*!< Outer VLAN VID */ 1087 uint8 PayloadOffset; /*!< Payload Offset */ 1088 } Netc_EthSwt_Ip_FrmModificationEntryDataType; 1089 1090 /*! 1091 * @brief Ingress Port Filter Table CFGE_DATA format enum type. Netc_EthSwt_Ip_IngressPortFilterTableCFGEDataIndexType 1092 */ 1093 typedef enum { 1094 NETC_ETHSWT_IP_INGRESSPORTFILTER_CFGE_CONFIG_FIELD = 54U, /*!< CONFIG field includes IPV, DR, FLTFA etc in Ingress Port Filter Table CFGE_DATA Format */ 1095 NETC_ETHSWT_IP_INGRESSPORTFILTER_CFGE_FLTATGT_FIELD = 55U /*!< FLTA_TGT (Target For Selected Filter Action) field in Ingress Port Filter Table CFGE_DATA Format */ 1096 } Netc_EthSwt_Ip_IngressPortFilterTableCFGEDataIndexType; 1097 1098 /*! 1099 * @brief Ingress Port Filter table CFGE_DATA config field. 1100 */ 1101 /* IPV field */ 1102 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT (0U) 1103 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK (0x0000000FUL) 1104 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IPV_MASK) 1105 1106 /* OIPV */ 1107 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT (4U) 1108 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK (0x00000010UL) 1109 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_OIPV_MASK) 1110 1111 /* DR */ 1112 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT (5U) 1113 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_MASK (0x00000060UL) 1114 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_DR_MASK) 1115 1116 /* ODR */ 1117 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT (7U) 1118 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK (0x00000080UL) 1119 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_ODR_MASK) 1120 1121 /* FLTFA */ 1122 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT (8U) 1123 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK (0x00000300UL) 1124 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTFA_MASK) 1125 1126 /* IMIRE */ 1127 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_SHIFT (11U) 1128 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_MASK (0x00000800UL) 1129 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_IMIRE_MASK) 1130 1131 /* WOLTE */ 1132 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT (12U) 1133 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK (0x00001000UL) 1134 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_WOLTE_MASK) 1135 1136 /* FLTA */ 1137 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT (13U) 1138 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK (0x00006000UL) 1139 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_FLTA_MASK) 1140 1141 /* RPR */ 1142 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT (15U) 1143 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK (0x00018000UL) 1144 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_RPR_MASK) 1145 1146 /* CTD */ 1147 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_SHIFT (17U) 1148 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_MASK (0x00020000UL) 1149 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_CTD_MASK) 1150 1151 /* HR */ 1152 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_SHIFT (18U) 1153 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_MASK (0x003C0000UL) 1154 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_HR_MASK) 1155 1156 /* TIMECAP */ 1157 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_SHIFT (22U) 1158 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_MASK (0x00400000UL) 1159 #define NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_CFGE_CONFIG_TIMECAP_MASK) 1160 1161 /*! 1162 * @brief Ingress Port Filter table KEYE_DATA field. 1163 */ 1164 /* DSCP field */ 1165 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT (0U) 1166 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK (0x0000003FUL) 1167 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DIFFSCP_MASK) 1168 1169 /* DSCP Mask field */ 1170 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT (6U) 1171 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK (0x00000FC0UL) 1172 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_DSCPMASK_MASK) 1173 1174 /* SRC_PORT field */ 1175 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT (16U) 1176 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK (0x001F0000UL) 1177 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPRTID_MASK) 1178 1179 /* SRC_PORT Mask field */ 1180 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT (21U) 1181 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK (0x03E00000UL) 1182 #define NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_KEYE_DATA_SRCPORTMASK_MASK) 1183 1184 /*! 1185 * @brief Ingress Port Filter table Request Data Buffer STSEU field. 1186 */ 1187 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT (1U) 1188 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK (0x00000002UL) 1189 #define NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_SHIFT)) & NETC_ETHSWT_IP_IPFTABLE_REQFMT_ACTIONS_FIELD_STSEU_MASK) 1190 1191 /*! 1192 * @brief Filter Forwarding Action data type definitions for Ingress Port Filter Table. 1193 */ 1194 typedef uint32 Netc_EthSwt_Ip_CfgeFilterForwardingActionDataType; 1195 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_DISCARDFRAMES (0x0U) /*!< discard frames */ 1196 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_PERMITFRAMES (0x1U) /*!< permit frames */ 1197 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_REDIRECTFRAMES (0x2U) /*!< Redirect frame to switch management port without any frame modification */ 1198 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_COPYFRAMES (0x3U) /*!< Copy frame to switch management port without any frame modification */ 1199 1200 /*! 1201 * @brief Filter Action data type definitions for Ingress Port Filter Table. 1202 */ 1203 typedef uint32 Netc_EthSwt_Ip_CfgeFilterActionDataType; 1204 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_NOACTION (0x0U) /*!< no action */ 1205 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_RATEACTION (0x1U) /*!< Rate action with the Rate Policer Entry ID (RP_EID) set to the value configured in the FLTA_TGT field of this entry */ 1206 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_INGRESSSTREAMIDENTIFICATIONACTION (0x2U) /*!< Ingress stream identification action where the Ingress Stream Entry ID (IS_EID) is set to the value configured in the FLTA_TGT field of this entry */ 1207 #define NETC_ETHSWT_IP_INGRESSPORTFILTERTABLE_SETTINGL2FILTERINGSIBITMAP (0x3U) /*!< valid on ENETC side. Setting a pre L2 filtering SI bitmap that will be used by the L2 filtering function to determine the final SI bitmap */ 1208 1209 /*! 1210 * @brief defines Ingress Port Filter Table CFGE_DATA type. 1211 */ 1212 typedef struct 1213 { 1214 uint32 CfgeTargetForSelectedFilterAction; /*!< FLTA_TGT filed in CFGE_DATA format */ 1215 uint8 CfgeIpv; /*!< IPV (internal priority value) filed in CFGE_DATA format */ 1216 uint8 CfgeDr; /*!< DR (drop resilience) field in CFGE_DATA format */ 1217 uint8 CfgeRelativePrecedentResolution; /*!< RPR field in CFGE_DATA format */ 1218 uint8 CfgeHostReason; /*!< HR field in CFGE_DATA format */ 1219 boolean CfgeOverrideIpv; /*!< OIPV (override internal priority value) field in CFGE_DATA format*/ 1220 boolean CfgeOverrideDr; /*!< ODR (override drop resilience) field in CFGE_DATA format */ 1221 boolean CfgeIngressMirroringEnable; /*!< IMIRE field in CFGE_DATA format */ 1222 boolean CfgeWakeOnLanTriggerEnable; /*!< WOLTE filed in CFGE_DATA format */ 1223 boolean CfgeCutThroughDisable; /*!< CTD field in CFGE_DATA format */ 1224 boolean CfgeTimestampCaptureEable; /*!< TIMECAPE field in CFGE_DATA format */ 1225 Netc_EthSwt_Ip_CfgeFilterForwardingActionDataType CfgeFilterForwardingAction; /*!< FLTFA field in CFGE_DATA format */ 1226 Netc_EthSwt_Ip_CfgeFilterActionDataType CfgeFilterAction; /*!< FLTA field in CFGE_DATA format */ 1227 } Netc_EthSwt_Ip_IngressPortFilterCfgeDataType; 1228 1229 /*! 1230 * @brief defines Ingress Port Filter Table KEYE_DATA type. 1231 */ 1232 typedef struct 1233 { 1234 uint16 KeyePrecedence; /*!< Precedence field */ 1235 uint16 keyeFrmAttributeFlags; /*!< Frame Attribute Flags field */ 1236 uint16 KeyeFrmAttributeFlagsMask; /*!< Frame Attribute Flags Mask field */ 1237 uint8 KeyeDifferentiatedServicesCodePoint; /*!< Differentiated Services Code Point field */ 1238 uint8 KeyeDifferentiatedServicesCodePointMask; /*!< Differentiated Services Code Point Mask field */ 1239 uint8 KeyeSourcePortID; /*!< Source Port ID field */ 1240 uint8 KeyeSourcePortIDMask; /*!< Source Port ID Mask field */ 1241 uint16 KeyeOuterVLANTagControlInformation; /*!< Outer VLAN Tag Control Information field */ 1242 uint16 KeyeOuterVLANTagControlInformationMask; /*!< Outer VLAN Tag Control Information Mask field */ 1243 uint8 KeyeDstMacAddr[6U]; /*!< Destination MAC Address field */ 1244 uint8 KeyeDstMacAddrMask[6U]; /*!< Destination MAC Address Mask field */ 1245 uint8 KeyeSrcMacAddr[6U]; /*!< Source MAC Address field */ 1246 uint8 KeyeSrcMacAddrMask[6U]; /*!< Source MAC Address Mask field */ 1247 uint16 KeyeInnerVLANTagControlInformation; /*!< Inner VLAN Tag Control Information field */ 1248 uint16 KeyeInnerVLANTagControlInformationMask; /*!< Inner VLAN Tag Control Information Mask field */ 1249 uint16 KeyeEtherType; /*!< EtherType field */ 1250 uint16 KeyeEtherTypeMask; /*!< EtherType Mask field */ 1251 uint8 KeyeIPProtocol; /*!< IP Protocol field */ 1252 uint8 KeyeIPProtocolMask; /*!< IP Protocol Mask field */ 1253 uint32 KeyeIPSourceAddress[4U]; /*!< IP Source Address field */ 1254 uint32 KeyeIPSourceAddressMask[4U]; /*!< IP Source Address Mask field */ 1255 uint16 KeyeL4SourcePort; /*!< L4 Source Port field */ 1256 uint16 KeyeL4SourcePortMask; /*!< L4 Source Port Mask field */ 1257 uint32 KeyeIPDestinationAddress[4U]; /*!< IP Destination Address field */ 1258 uint32 KeyeIPDestinationAddressMask[4U]; /*!< IP Destination Address Mask field */ 1259 uint16 KeyeL4DestinationPort; /*!< L4 Destination Port field */ 1260 uint16 KeyeL4DestinationPortMask; /*!< L4 Destination Port Mask field */ 1261 uint8 KeyePayloadBytes[24U]; /*!< Payload Bytes field */ 1262 uint8 KeyePayloadBytesMask[24U]; /*!< Payload Bytes Mask field */ 1263 } Netc_EthSwt_Ip_IngressPortFilterKeyeDataType; 1264 1265 /*! 1266 * @brief defines Ingress Port Filter Table entries. 1267 */ 1268 typedef struct 1269 { 1270 uint32 IngressPortFilterEntryID; /*!< Ingress Port Filter Table Entry ID */ 1271 Netc_EthSwt_Ip_IngressPortFilterCfgeDataType IngressPortFilterCfgeData; /*!< Ingress Port Filter Table CFGE_DATA format */ 1272 Netc_EthSwt_Ip_IngressPortFilterKeyeDataType IngressPortFilterkeyeData; /*!< Ingress Port Filter Table KEYE_DATA format */ 1273 uint64 IngressPortFilterMatchCount; /*!< Ingress Port Filter Table Match Count Data */ 1274 } Netc_EthSwt_Ip_IngressPortFilterEntryDataType; 1275 1276 /*! 1277 * @brief enum type for administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry. 1278 */ 1279 typedef enum { 1280 ETHSWT_HOST_REQUEST_UNCHANGED, /*!< 0x0: SetGateStates. HoldRequest is unchanged. */ 1281 ETHSWT_HOST_REQUEST_HOLD, /*!< 0x1: Set-And-Hold-MAC. HoldRequest is set to value hold (1). */ 1282 ETHSWT_HOST_REQUEST_RELEASE /*!< 0x2: Set-And-Release-MAC. HoldRequest is set to value release (0). */ 1283 } Netc_EthSwt_Ip_AdminGateOperationType; 1284 1285 /*! 1286 * @brief enum type for Administrative Traffic Class Gate States. 1287 */ 1288 typedef enum { 1289 ETHSWT_TRAFFIC_CLASS_GATE_CLOSED, /*!< 0x0: Gate closed. */ 1290 ETHSWT_TRAFFIC_CLASS_GATE_OPEN /*!< 0x1: Gate open. */ 1291 } Netc_EthSwt_Ip_AdminTrafficClassGateStateType; 1292 1293 /*! 1294 * @brief Time Gate Scheduling Table CFGE_DATA field. 1295 */ 1296 /* Administrative Traffic Class Gate States for Gate Entry */ 1297 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT (0U) 1298 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK (0x000000FFUL) 1299 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_SHIFT)) & NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_TC_STATES_MASK) 1300 1301 /* Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 1302 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT (16U) 1303 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK (0x000F0000UL) 1304 #define NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_SHIFT)) & NETC_ETHSWT_IP_TGSTABLE_CFGE_ADMIN_HR_CB_MASK) 1305 1306 /*! 1307 * @brief defines Gate Entry Admin Control List Data type for Time Gate Scheduling Table. 1308 */ 1309 typedef struct 1310 { 1311 uint32 AdminTimeInterval; /*!< Administrative Time Interval for Gate Entry */ 1312 uint8 AdminTrafficClassGateStates; /*!< Administrative Traffic Class Gate States for Gate Entry */ 1313 Netc_EthSwt_Ip_AdminGateOperationType AdminGateOperationType; /*!< Administrative gate operation type (as per IEEE 802.1Q-2018) field for gate control list entry */ 1314 } Netc_EthSwt_Ip_GateEntryAdminControlListDataType; 1315 1316 /*! 1317 * @brief defines Time Gate Scheduling Table entries. 1318 */ 1319 typedef struct 1320 { 1321 uint32 TimeGateSchedulingTable_EID; /*!< Time Gate Scheduling Table Entry ID, which is actually the port index of switch */ 1322 uint64 AdminBaseTime; /*!< Administrative Base Time */ 1323 uint32 AdminCycleTime; /*!< Administrative Cycle Time */ 1324 uint32 AdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 1325 uint16 AdminControlListLength; /*!< Administrative Control List Length */ 1326 Netc_EthSwt_Ip_GateEntryAdminControlListDataType GateEntryAdminControlListData[NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; 1327 } Netc_EthSwt_Ip_TimeGateSchedulingEntryDataType; 1328 1329 /** 1330 * @brief MAC learning optoin type enumeration. 1331 * @implements Netc_EthSwt_Ip_MacLearningOptionType_enum 1332 */ 1333 typedef enum { 1334 ETHSWT_MACLEARNINGOPTION_HWDISABLED = (uint8)0x1U, /*!< @brief If hardware learning disabled, the switch must not learn new MAC addresses */ 1335 ETHSWT_MACLEARNINGOPTION_HWENABLED = (uint8)0x2U, /*!< @brief If hardware learning enabled, the switch learns new MAC addresses */ 1336 ETHSWT_MACLEARNINGOPTION_SWSECUREENABLED = (uint8)0x3U, /*!< @brief If software learning secure enabled, A MAC learning lookup is performed into the FDB table. 1337 If there is no match, no attempt is made to add a new entry, and the frame is redirect to the switch management port. 1338 If there is match, and the entry's port number does not match frame ingress port number, the frame is redirected to the switch management port. */ 1339 ETHSWT_MACLEARNINGOPTION_SWUNSECUREENABLED = (uint8)0x4U, /*!< @brief If software learning unsecure enabled, A MAC learning lookup is performed into the FDB table. 1340 If there is no match, no attempt is made to add a new entry, and a copy of the frame is sent to the switch management port. 1341 If there is match, and the entry's port number does not match frame ingress port number, the frame is copied to the switch management port.*/ 1342 ETHSWT_MACLEARNINGOPTION_DISABLEDWITHSWVALIDATION = (uint8)0x5U /*!< @brief if Disable MAC learning with SMAC validation. A MAC learning lookup is performed into the FDB table. 1343 If there is no match or there is a match but the ingress port is not a member of the FDB entry, 1344 the frame is discarded and counted against the bridge port discard count register (BPDCR) with discard reason BPDCRR0[MACLNFDR]. */ 1345 } Netc_EthSwt_Ip_MacLearningOptionType; 1346 1347 typedef enum{ 1348 ETHSWT_NO_FDB_LOOKUP_FLOOD_FRAME = (uint8)0x1U, /**< @brief No FDB lookup is performed, the frame is flooded */ 1349 ETHSWT_FDB_LOOKUP_FLOOD_FRAME = (uint8)0x2U, /**< @brief FDB lookup is performed, and if there is no match, the frame is flooded. */ 1350 ETHSWT_FDB_LOOKUP_DISCARD_FRAME = (uint8)0x3U /**< @brief FDB lookup is performed, and if there is no match, the frame is discarded */ 1351 } Netc_EthSwt_Ip_MacForwardingOptionType; 1352 1353 typedef enum{ 1354 ETHSWT_EXTERNAL_REFERENCE_CLOCK = (uint8)0x0U, /**< @brief external reference clock is selected for 1588 timer */ 1355 ETHSWT_MODULE_REFERENCE_CLOCK = (uint8)0x1U, /**< @brief module reference clock (NETC system clock) is selected for 1588 timer */ 1356 ETHSWT_REFERENCE_CLOCK_DISABLED = (uint8)0x2U /**< @brief No reference clock selected for 1588 timer, means the timer is disabled */ 1357 } Netc_EthSwt_Ip_1588ClockSourceOptionType; 1358 1359 /*! 1360 * @brief Port selection enumeration Netc_EthSwt_Ip_PortSelectionType_Class 1361 */ 1362 typedef enum 1363 { 1364 NETC_ETHSWT_PORT2 = 2U, /**< Pseudo port 2 */ 1365 NETC_ETHSWT_PORT1 = 1U, /**< Switch port 1 */ 1366 NETC_ETHSWT_PORT0 = 0U /**< Switch port 0 */ 1367 } Netc_EthSwt_Ip_PortSelectionType; 1368 1369 /*! 1370 * @brief XMII mode of port Netc_EthSwt_Ip_XmiiModeType_Enumeration 1371 */ 1372 typedef enum 1373 { 1374 NETC_ETHSWT_MII_MODE = 0U, /**< MII interface mode */ 1375 NETC_ETHSWT_RMII_MODE = 1U, /**< RMII interface mode */ 1376 NETC_ETHSWT_RGMII_MODE = 2U, /**< RGMII interface mode */ 1377 } Netc_EthSwt_Ip_XmiiModeType; 1378 1379 /*! 1380 * @brief Link duplex. 1381 * Netc_EthSwt_Ip_PortDuplexType_Class 1382 */ 1383 typedef enum 1384 { 1385 NETC_ETHSWT_PORT_FULL_DUPLEX = 1, /**< full duplex mode */ 1386 NETC_ETHSWT_PORT_HALF_DUPLEX = 0, /**< half duplex mode */ 1387 } Netc_EthSwt_Ip_PortDuplexType; 1388 1389 /*! 1390 * @brief Link speed. 1391 * Netc_EthSwt_Ip_PortSpeedType_Class 1392 */ 1393 typedef enum 1394 { 1395 NETC_ETHSWT_PORT_SPEED_100_MBPS = 1, /**< 100 Mbps */ 1396 NETC_ETHSWT_PORT_SPEED_10_MBPS = 0, /**< 10 Mbps */ 1397 } Netc_EthSwt_Ip_PortSpeedType; 1398 1399 /*! 1400 * @brief Direction selection enumeration Netc_EthSwt_Ip_DirectionType_Class 1401 */ 1402 typedef enum 1403 { 1404 NETC_ETHSWT_DIRECTION_INGRESS = 1U, /**< Ingress direction */ 1405 NETC_ETHSWT_DIRECTION_EGRESS = 0U /**< Egress direction */ 1406 } Netc_EthSwt_Ip_DirectionType; 1407 1408 /*! 1409 * @brief Mode of the port Netc_EthSwt_Ip_PortModeType_Class 1410 */ 1411 typedef enum 1412 { 1413 NETC_ETHSWT_PORT_MODE_INGRESS = 4U, /**< Port is enabled, ingress communication only */ 1414 NETC_ETHSWT_PORT_MODE_EGRESS = 3U, /**< Port is enabled, egress communication only */ 1415 NETC_ETHSWT_PORT_MODE_FULL = 1U, /**< Port is enabled, ingress and egress communication possible */ 1416 NETC_ETHSWT_PORT_MODE_OFF = 0U /**< Port is off, no communication possible */ 1417 } Netc_EthSwt_Ip_PortModeType; 1418 1419 /*! 1420 * @brief Interrupt flags shifts Netc_EthSwt_Ip_IrqType_Class 1421 */ 1422 typedef enum 1423 { 1424 NETC_ETHSWT_IRQ_CBTX = 14U, /**< 100BASETX */ 1425 NETC_ETHSWT_IRQ_SGMII4 = 13U, /**< SGMII 4 */ 1426 NETC_ETHSWT_IRQ_SGMII3 = 12U, /**< SGMII 3 */ 1427 NETC_ETHSWT_IRQ_SGMII2 = 11U, /**< SGMII 2 */ 1428 NETC_ETHSWT_IRQ_SGMII1 = 10U, /**< SGMII 1 */ 1429 NETC_ETHSWT_IRQ_CBT1_COMB = 9U, /**< 100BASE-T1 SubSystem Combined */ 1430 NETC_ETHSWT_IRQ_CBT1_PHY6 = 8U, /**< 100BASE-T1 SubSystem PHY # 6 */ 1431 NETC_ETHSWT_IRQ_CBT1_PHY5 = 7U, /**< 100BASE-T1 SubSystem PHY # 5 */ 1432 NETC_ETHSWT_IRQ_CBT1_PHY4 = 6U, /**< 100BASE-T1 SubSystem PHY # 4 */ 1433 NETC_ETHSWT_IRQ_CBT1_PHY3 = 5U, /**< 100BASE-T1 SubSystem PHY # 3 */ 1434 NETC_ETHSWT_IRQ_CBT1_PHY2 = 4U, /**< 100BASE-T1 SubSystem PHY # 2 */ 1435 NETC_ETHSWT_IRQ_CBT1_PHY1 = 3U, /**< 100BASE-T1 SubSystem PHY # 1 */ 1436 NETC_ETHSWT_IRQ_CBT1_PHYSS = 2U, /**< 100BASE-T1 SubSystem PHY Common module */ 1437 NETC_ETHSWT_IRQ_NETC_ETHSWTCORE1 = 1U, /**< Ethernet Netc_EthSwt SubSystem Automotive Netc_EthSwt Interrupt 1 */ 1438 NETC_ETHSWT_IRQ_NETC_ETHSWTCORE0 = 0U /**< Ethernet Netc_EthSwt SubSystem Automotive Netc_EthSwt Interrupt 0 */ 1439 } Netc_EthSwt_Ip_IrqType; 1440 1441 /* ---bits field and structure for Vlan Filter Table Data Buffer Format--- */ 1442 1443 /* index of Vlan Filter Table Request Data Buffer Format */ 1444 #define NETC_ETHSWT_IP_VLANFILTERTABLE_REQFMT_VID_FIELD (1U) /*!< second uint32 item of Vlan Filter Table Request Data Buffer Format when ACCESS_METHOD = 0x1 (Key Element Match) */ 1445 #define NETC_ETHSWT_IP_VLANFILTERTABLE_REQFMT_RESUMEENTRYID_FIELD (1U) /*!< second uint32 item of Vlan Filter Table Request Data Buffer Format when ACCESS_METHOD = 0x2 (Search) */ 1446 1447 typedef enum { 1448 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ACTIONS_FIELD = 0U, /*!< first uint32 item of Switch Tables Request Data Buffer Format */ 1449 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_ENTRYID_FIELD, /*!< second uint32 item of Switch Tables Request Data Buffer Format when ACCESS_METHOD = 0x0 (ENTRY_ID Match) */ 1450 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA0, /*!< first item of CFGEDATA but third item of Switch Tables Request Data Buffer Format */ 1451 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA1, /*!< second item of CFGEDATA but forth item of Switch Tables Request Data Buffer Format */ 1452 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA2, /*!< third item of CFGEDATA but fifth item of Switch Tables Request Data Buffer Format */ 1453 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA3, /*!< forth item of CFGEDATA but sixth item of Switch Tables Request Data Buffer Format */ 1454 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA4, /*!< fifth item of CFGEDATA but seventh item of Switch Tables Request Data Buffer Format */ 1455 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA5, /*!< sixth item of CFGEDATA but eighth item of Switch Tables Request Data Buffer Format */ 1456 NETC_ETHSWT_IP_SWITCHTABLE_REQFMT_CFGEDATA6 /*!< seventh item of CFGEDATA but ninth item of Switch Tables Request Data Buffer Format */ 1457 } Netc_EthSwt_Ip_SwitchTableRequestDataIndexType; 1458 1459 /* bits field for Vlan Filter Table CFGE_DATA Format */ 1460 /*! 1461 * @brief Vlan Filter Table Config Data STG_ID field. 1462 */ 1463 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_SHIFT (24U) 1464 /*! 1465 * @brief Vlan Filter Table Config Data STG_ID field mask. 1466 */ 1467 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_MASK (0x0F000000UL) 1468 /*! 1469 * @brief Vlan Filter Table Config Data STG_ID. 1470 */ 1471 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_STG_ID_MASK) 1472 1473 /*! 1474 * @brief Vlan Filter Table Config Data PORT membership field. 1475 */ 1476 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_SHIFT (0U) 1477 /*! 1478 * @brief Vlan Filter Table Config Data PORT membership field mask. 1479 */ 1480 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_MASK (0x00FFFFFFUL) 1481 /*! 1482 * @brief Vlan Filter Table Config Data PORT membership. 1483 */ 1484 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_PORT_MEMBERSHIP_MASK) 1485 1486 /*! 1487 * @brief Vlan Filter Table Config Data IPMFLE field. 1488 */ 1489 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_SHIFT (23U) 1490 /*! 1491 * @brief Vlan Filter Table Config Data IPMFLE field mask. 1492 */ 1493 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_MASK (0x00800000UL) 1494 /*! 1495 * @brief Vlan Filter Table Config Data IPMFLE. 1496 */ 1497 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFLE_MASK) 1498 1499 /*! 1500 * @brief Vlan Filter Table Config Data IPMFE field. 1501 */ 1502 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_SHIFT (22U) 1503 /*! 1504 * @brief Vlan Filter Table Config Data IPMFE field mask. 1505 */ 1506 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_MASK (0x00400000UL) 1507 /*! 1508 * @brief Vlan Filter Table Config Data IPMFE. 1509 */ 1510 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_IPMFE_MASK) 1511 1512 /*! 1513 * @brief Vlan Filter Table Config Data MFO field. 1514 */ 1515 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_SHIFT (19U) 1516 /*! 1517 * @brief Vlan Filter Table Config Data MFO field mask. 1518 */ 1519 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_MASK (0x00180000UL) 1520 /*! 1521 * @brief Vlan Filter Table Config Data MFO. 1522 */ 1523 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MFO_MASK) 1524 1525 /*! 1526 * @brief Vlan Filter Table Config Data MLO field. 1527 */ 1528 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_SHIFT (16U) 1529 /*! 1530 * @brief Vlan Filter Table Config Data MLO field mask. 1531 */ 1532 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_MASK (0x00070000UL) 1533 /*! 1534 * @brief Vlan Filter Table Config Data MLO. 1535 */ 1536 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_MLO_MASK) 1537 1538 /*! 1539 * @brief Vlan Filter Table Config Data FID field. 1540 */ 1541 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_SHIFT (0U) 1542 /*! 1543 * @brief Vlan Filter Table Config Data FID field mask. 1544 */ 1545 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_MASK (0x00000FFFUL) 1546 /*! 1547 * @brief Vlan Filter Table Config Data FID. 1548 */ 1549 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_FID_MASK) 1550 1551 /*! 1552 * @brief Vlan Filter Table Config Data ETA port bitmap field. 1553 */ 1554 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_SHIFT (0U) 1555 /*! 1556 * @brief Vlan Filter Table Config Data ETA port bitmap field mask. 1557 */ 1558 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_MASK (0x00FFFFFFUL) 1559 /*! 1560 * @brief Vlan Filter Table Config Data ETA port bitmap. 1561 */ 1562 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_ETA_PORT_BITMAP_MASK) 1563 1564 /*! 1565 * @brief Vlan Filter Table Config Data base ET_EID field. 1566 */ 1567 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_SHIFT (0U) 1568 /*! 1569 * @brief Vlan Filter Table Config Data base ET_EID field mask. 1570 */ 1571 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_MASK (0xFFFFFFFFUL) 1572 /*! 1573 * @brief Vlan Filter Table Config Data base ET_EID. 1574 */ 1575 #define NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_CFGEDATA_BASE_ET_EID_MASK) 1576 1577 /*! 1578 * @brief Vlan Filter Table Config Data KEY_DATA bits field. 1579 */ 1580 #define NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_SHIFT (0U) 1581 /*! 1582 * @brief Vlan Filter Table Config Data KEY_DATA bits field mask. 1583 */ 1584 #define NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_MASK (0x00000FFFUL) 1585 /*! 1586 * @brief Vlan Filter Table Config Data KEY_DATA bits. 1587 */ 1588 #define NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID(x) (((uint32)(((uint32)(x)) << NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_SHIFT)) & NETC_ETHSWT_VLANFILTERTABLE_KEYEDATA_VID_MASK) 1589 1590 /*! 1591 * @brief Vlan Filter Table response data type enumeration. Netc_EthSwt_Ip_VlanFilterTable_ResponsDataIndexType 1592 */ 1593 typedef enum { 1594 NETC_ETHSWT_VLANFILTERTABLE_RSPDATA_STATUS = 0x0U, /*!< Status Field In Vlan Filter Table Response Data Buffer */ 1595 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_ENTRYID, /*!< Entry_ID Field In Vlan Filter Table Response Data Buffer */ 1596 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_VID, /*!< VID field of KEYE DATA In Vlan Filter Table Response Data Buffer */ 1597 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA0, /*!< The first element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 1598 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA1, /*!< The second element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 1599 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA2, /*!< The third element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 1600 NETC_ETHSWT_VLANFILTERTABL_RSPDATA_CFGEDATA3 /*!< The last element of CFGE DATA In Vlan Filter Table Response Data Buffer */ 1601 } Netc_EthSwt_Ip_VlanFilterTable_ResponsDataIndexType; 1602 1603 /*! 1604 * @brief Vlan Filter Table CFGE_DATA format. 1605 */ 1606 typedef struct { 1607 uint32 Cfge_Data[NETC_ETHSWT_TABLE_CFGEDATA_ITEMS]; /*!< Config data for Vlan Filtre Table */ 1608 } Netc_EthSwt_Ip_VlanFilterTableCFGEDataType; 1609 /* ---bits field and structure for Vlan Filter Table Data Buffer Format--- */ 1610 1611 /*! 1612 * @brief VLAN Tag Netc_EthSwt_Ip_VlanTagType_Class 1613 */ 1614 typedef struct 1615 { 1616 uint16 id; /*!< Specifies the VLAN address 0..65535 */ 1617 uint8 pcp; /*!< Priority to be added in the tag 0..7 */ 1618 uint8 dei; /*!< 1 bit field - drop eligible indicator */ 1619 } Netc_EthSwt_Ip_VlanTagType; 1620 1621 /*! 1622 * @brief PHY configuration of a port Netc_EthSwt_Ip_FdbEntryType_Class 1623 */ 1624 typedef struct 1625 { 1626 uint16 ePortMask; /*!< Mask of the egress ports */ 1627 uint8 macAddr[6U]; /*!< Array containing the MAC addresses of the port */ 1628 } Netc_EthSwt_Ip_FdbEntryType; 1629 1630 /*! 1631 * @brief PHY configuration of a port Netc_EthSwt_Ip_VlanFilterEntryType 1632 */ 1633 typedef struct 1634 { 1635 uint16 iPortMask; /*!< Mask of the ingress ports */ 1636 uint16 vlanId; /*!< VLAN ID, VlanMembershipId */ 1637 } Netc_EthSwt_Ip_VlanFilterEntryType; 1638 1639 /*! 1640 * @brief Netc_EthSwt counter structure Netc_EthSwt_Ip_CounterType 1641 */ 1642 typedef struct { 1643 uint64 rxEtherOctetCounter; /*!< Port MAC 0 Receive Ethernet Octets Counter(etherStatsOctetsn) (PM0_REOCTn) */ 1644 uint64 rxOctetCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Octets Counter(iflnOctetsn) (PM0_ROCTn) */ 1645 uint64 rxValidPauseFrmCounter; /*!< Port MAC 0 Receive Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_RXPFn) */ 1646 uint64 rxFrmCounter; /*!< MAC 0 Receive Frame Counter Register(aFramesReceivedOKn) (PM0_RFRMn) */ 1647 uint64 rxFrameCheckSequenceErrorCounter; /*!< Port MAC 0 Receive Frame Check Sequence Error Counter Register() (PM0_RFCSn) */ 1648 uint64 rxVlanFrmCounter; /*!< Port MAC 0 Receive VLAN Frame Counter Register(VLANReceivedOKn) (PM0_RVLANn) */ 1649 uint64 rxFrameErrorCounter; /*!< Port MAC 0 Receive Frame Error Counter Register(ifInErrorsn) (PM0_RERRn) */ 1650 uint64 rxUnicastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Unicast Frame Counter Register(ifInUcastPktsn) (PM0_RUCAn) */ 1651 uint64 rxMulticastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Multicast Frame Counter Register(ifInMulticastPktsn) (PM0_RMCAn) */ 1652 uint64 rxBroadcastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Receive Broadcast Frame Counter Register(ifInBroadcastPktsn) (PM0_RBCAn) */ 1653 uint64 rxDroppedPktCounter; /*!< Port MAC 0 Receive Dropped Packets Counter Register(etherStatsDropEventsn) (PM0_RDRPn) */ 1654 uint64 rxPktCounter; /*!< Port MAC 0 Receive Packets Counter Register(etherStatsPktsn) (PM0_RPKTn) */ 1655 uint64 rxUndersizePacketCounter; /*!< Port MAC 0 Receive Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_RUNDn) */ 1656 uint64 rx64OctetPktCounter; /*!< Port MAC 0 Receive 64-Octet Packet Counter Register(etherStatsPkts64OctetsN) (PM0_R64n) */ 1657 uint64 rx65to127OctetPktCounter; /*!< Port MAC 0 Receive 65 to 127-Octet Packet Counter Register(etherStatsPkts65to127OctetsN) (PM0_R127n) */ 1658 uint64 rx128to255OctetPktCounter; /*!< Port MAC 0 Receive 128 to 255-Octet Packet Counter Register(etherStatsPkts128to255OctetsN) (PM0_R255n) */ 1659 uint64 rx256to511OctetPktCounter; /*!< Port MAC 0 Receive 256 to 511-Octet Packet Counter Register(etherStatsPkts256to511OctetsN) (PM0_R511n) */ 1660 uint64 rx512to1023OctetPktCounter; /*!< Port MAC 0 Receive 512 to 1023-Octet Packet Counter Register(etherStatsPkts512to1023OctetsN) (PM0_R1023n) */ 1661 uint64 rx1024to1522OctetPktCounter; /*!< Port MAC 0 Receive 1024 to 1522-Octet Packet Counter Register(etherStatsPkts1024to1522OctetsN) (PM0_R1522n) */ 1662 uint64 rx1523toMaxOctetPktCounter; /*!< Port MAC 0 Receive 1523 to Max-Octet Packet Counter Register(etherStatsPkts1523toMaxOctetsN) (PM0_R1523Xn) */ 1663 uint64 rxOversizedPacketsCounter; /*!< Port MAC 0 Receive Oversized Packet Counter Register(etherStatsOversizePktsn) (PM0_ROVRn) */ 1664 uint64 rxJabberPktCounter; /*!< Port MAC 0 Receive Jabber Packet Counter Register(etherStatsJabbersn) (PM0_RJBRn) */ 1665 uint64 rxFragmentPktCounter; /*!< Port MAC 0 Receive Fragment Packet Counter Register(etherStatsFragmentsn (PM0_RFRGn) */ 1666 uint64 rxControlPktCounter; /*!< Port MAC 0 Receive Control Packet Counter Register (PM0_RCNPn) */ 1667 uint64 rxDroppedNTruncatedPktCounter; /*!< Port MAC 0 Receive Dropped Not Truncated Packets Counter Register(etherStatsDropEventsn) (PM0_RDRNTPn) */ 1668 1669 uint64 txEtherOctetCounter; /*!< MAC 0 Transmit Ethernet Octets Counter(etherStatsOctetsn) (PM0_TEOCTn) */ 1670 uint64 txOctetCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Octets Counter Register(ifOutOctetsn) (PM0_TOCTn) */ 1671 uint64 txValidPauseFrmCounter; /*!< Port MAC 0 Transmit Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_TXPFn) */ 1672 uint64 txFrmCounter; /*!< Port MAC 0 Transmit Frame Counter Register(aFramesTransmittedOKn) (PM0_TFRMn) */ 1673 uint64 txFrameCheckSequenceErrorCounter; /*!< Port MAC 0 Transmit Frame Check Sequence Error Counter Register() (PM0_TFCSn) */ 1674 uint64 txVlanFrmCounter; /*!< Port MAC 0 Transmit VLAN Frame Counter Register(VLANTransmittedOKn) (PM0_TVLANn) */ 1675 uint64 txFrameErrorCounter; /*!< Port MAC 0 Transmit Frame Error Counter Register(ifOutErrorsn) (PM0_TERRn) */ 1676 uint64 txUnicastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Unicast Frame Counter Register(ifOutUcastPktsn) (PM0_TUCAn) */ 1677 uint64 txMulticastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Multicast Frame Counter Register(ifOutMulticastPktsn) (PM0_TMCAn) */ 1678 uint64 txBroadcastFrmCounter; /*!< Supported by pseudo port. Port MAC 0 Transmit Broadcast Frame Counter Register(ifOutBroadcastPktsn) (PM0_TBCAn) */ 1679 uint64 txPktCounter; /*!< Port MAC 0 Transmit Packets Counter Register(etherStatsPktsn) (PM0_TPKTn) */ 1680 uint64 txUndersizePacketCounter; /*!< Port MAC 0 Transmit Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_TUNDn) */ 1681 uint64 tx64OctetPktCounter; /*!< Port MAC 0 Transmit 64-Octet Packet Counter Register (etherStatsPkts64OctetsN) (PM0_T64n) */ 1682 uint64 tx65to127OctetPktCounter; /*!< Port MAC 0 Transmit 65 to 127-Octet Packet Counter Register (etherStatsPkts65to127OctetsN) (PM0_T127n) */ 1683 uint64 tx128to255OctetPktCounter; /*!< Port MAC 0 Transmit 128 to 255-Octet Packet Counter Register (etherStatsPkts128to255OctetsN) (PM0_T255n) */ 1684 uint64 tx256to511OctetPktCounter; /*!< Port MAC 0 Transmit 256 to 511-Octet Packet Counter Register (etherStatsPkts256to511OctetsN) (PM0_T511n) */ 1685 uint64 tx512to1023OctetPktCounter; /*!< Port MAC 0 Transmit 512 to 1023-Octet Packet Counter Register (etherStatsPkts512to1023OctetsN) (PM0_T1023n) */ 1686 uint64 tx1024to1522OctetPktCounter; /*!< Port MAC 0 Transmit 1024 to 1522-Octet Packet Counter Register (etherStatsPkts1024to1522OctetsN) (PM0_T1522n) */ 1687 uint64 tx1523toMaxOctetPktCounter; /*!< Port MAC 0 Transmit 1523 to TX_MTU-Octet Packet Counter Register (etherStatsPkts1523toMaxOctetsN) (PM0_T1523Xn) */ 1688 uint64 txControlPktCounter; /*!< Port MAC 0 Transmit Control Packet Counter Register (PM0_TCNPn) */ 1689 uint64 txDeferredPktCounter; /*!< Port MAC 0 Transmit Deferred Packet Counter Register(aFramesWithDeferredXmissions) (PM0_TDFRn) */ 1690 uint64 txMultiCollisionCounter; /*!< Port MAC 0 Transmit Multiple Collisions Counter Register(aMultipleCollisionFrames) (PM0_TMCOLn) */ 1691 uint64 txSingleCollisionCounter; /*!< Port MAC 0 Transmit Single Collision Counter(aSingleCollisionFrames) Register (PM0_TSCOLn) */ 1692 uint64 txLateCollisionCounter; /*!< Port MAC 0 Transmit Late Collision Counter(aLateCollisions) Register (PM0_TLCOLn) */ 1693 uint64 txExcessiveCollisionCounter; /*!< Port MAC 0 Transmit Excessive Collisions Counter Register (PM0_TECOLn) */ 1694 1695 uint32 rxDiscardCounter; /*!< Port Rx discard count register (PRXDCR) */ 1696 uint32 txDiscardCounter; /*!< Port Tx discard count register (PTXDCR) */ 1697 uint32 unIntegrityErrorCounter; /* Uncorrectable non-fatal integrity error count register (UNIECTR) which tracks how many events have been detected. */ 1698 } Netc_EthSwt_Ip_CounterType; 1699 1700 /*! 1701 * @brief Netc_EthSwt counter enum Netc_EthSwt_Ip_SingleCounterType 1702 */ 1703 typedef enum { 1704 NETC_ETHSWT_IP_RX_ETH_OCTETS_COUNT = 0x1100U, /*!< Port MAC 0 Receive Ethernet Octets Counter(etherStatsOctetsn) (PM0_REOCTn) */ 1705 NETC_ETHSWT_IP_RX_OCTETS_COUNT = 0x1108U, /*!< Supported by pseudo port. Port MAC 0 Receive Octets Counter(iflnOctetsn) (PM0_ROCTn) */ 1706 NETC_ETHSWT_IP_RX_VALID_PAUSE_FRM_COUNT = 0x1118U, /*!< Port MAC 0 Receive Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_RXPFn) */ 1707 NETC_ETHSWT_IP_RX_FRM_COUNT = 0x1120U, /*!< Port MAC 0 Receive Frame Counter Register(aFramesReceivedOKn) (PM0_RFRMn) */ 1708 NETC_ETHSWT_IP_RX_FRM_CHK_SEQUENCE_COUNT = 0x1128U, /*!< Port MAC 0 Receive Frame Check Sequence Error Counter Register() (PM0_RFCSn) */ 1709 NETC_ETHSWT_IP_RX_VLAN_FRM_COUNT = 0x1130U, /*!< Port MAC 0 Receive VLAN Frame Counter Register(VLANReceivedOKn) (PM0_RVLANn) */ 1710 NETC_ETHSWT_IP_RX_FRM_ERROR_COUNT = 0x1138U, /*!< Port MAC 0 Receive Frame Error Counter Register(ifInErrorsn) (PM0_RERRn) */ 1711 NETC_ETHSWT_IP_RX_UNICAST_FRM_COUNT = 0x1140U, /*!< Supported by pseudo port. Port MAC 0 Receive Unicast Frame Counter Register(ifInUcastPktsn) (PM0_RUCAn) */ 1712 NETC_ETHSWT_IP_RX_MULTICAST_FRM_COUNT = 0x1148U, /*!< Supported by pseudo port. Port MAC 0 Receive Multicast Frame Counter Register(ifInMulticastPktsn) (PM0_RMCAn) */ 1713 NETC_ETHSWT_IP_RX_BROADCAST_FRM_COUNT = 0x1150U, /*!< Supported by pseudo port. Port MAC 0 Receive Broadcast Frame Counter Register(ifInBroadcastPktsn) (PM0_RBCAn) */ 1714 NETC_ETHSWT_IP_RX_DROPPED_PKTS_COUNT = 0x1158U, /*!< Port MAC 0 Receive Dropped Packets Counter Register(etherStatsDropEventsn) (PM0_RDRPn) */ 1715 NETC_ETHSWT_IP_RX_PKTS_COUNT = 0x1160U, /*!< Port MAC 0 Receive Packets Counter Register(etherStatsPktsn) (PM0_RPKTn) */ 1716 NETC_ETHSWT_IP_RX_UNDERSIZED_PKT_COUNT = 0x1168U, /*!< Port MAC 0 Receive Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_RUNDn) */ 1717 NETC_ETHSWT_IP_RX_64_OCTETS_PKT_COUNT = 0x1170U, /*!< Port MAC 0 Receive 64-Octet Packet Counter Register(etherStatsPkts64OctetsN) (PM0_R64n) */ 1718 NETC_ETHSWT_IP_RX_127_OCTETS_PKT_COUNT = 0x1178U, /*!< Port MAC 0 Receive 65 to 127-Octet Packet Counter Register(etherStatsPkts65to127OctetsN) (PM0_R127n) */ 1719 NETC_ETHSWT_IP_RX_255_OCTETS_PKT_COUNT = 0x1180U, /*!< Port MAC 0 Receive 128 to 255-Octet Packet Counter Register(etherStatsPkts128to255OctetsN) (PM0_R255n) */ 1720 NETC_ETHSWT_IP_RX_511_OCTETS_PKT_COUNT = 0x1188U, /*!< Port MAC 0 Receive 256 to 511-Octet Packet Counter Register(etherStatsPkts256to511OctetsN) (PM0_R511n) */ 1721 NETC_ETHSWT_IP_RX_1023_OCTETS_PKT_COUNT = 0x1190U, /*!< Port MAC 0 Receive 512 to 1023-Octet Packet Counter Register(etherStatsPkts512to1023OctetsN) (PM0_R1023n) */ 1722 NETC_ETHSWT_IP_RX_1522_OCTETS_PKT_COUNT = 0x1198U, /*!< Port MAC 0 Receive 1024 to 1522-Octet Packet Counter Register(etherStatsPkts1024to1522OctetsN) (PM0_R1522n) */ 1723 NETC_ETHSWT_IP_RX_1523_TOMAXOCTETS_PKT_COUNT = 0x11A0U, /*!< Port MAC 0 Receive 1523 to Max-Octet Packet Counter Register(etherStatsPkts1523toMaxOctetsN) (PM0_R1523Xn) */ 1724 NETC_ETHSWT_IP_RX_OVERSIZED_PKT_COUNT = 0x11A8U, /*!< Port MAC 0 Receive Oversized Packet Counter Register(etherStatsOversizePktsn) (PM0_ROVRn) */ 1725 NETC_ETHSWT_IP_RX_JABBER_PKT_COUNT = 0x11B0U, /*!< Port MAC 0 Receive Jabber Packet Counter Register(etherStatsJabbersn) (PM0_RJBRn) */ 1726 NETC_ETHSWT_IP_RX_FRAGMENT_PKT_COUNT = 0x11B8U, /*!< Port MAC 0 Receive Fragment Packet Counter Register(etherStatsFragmentsn (PM0_RFRGn) */ 1727 NETC_ETHSWT_IP_RX_CONTROL_PKT_COUNT = 0x11C0U, /*!< Port MAC 0 Receive Control Packet Counter Register (PM0_RCNPn) */ 1728 NETC_ETHSWT_IP_RX_DROPPED_NOT_TRUNCATED_PKT_COUNT = 0x11C8U, /*!< Port MAC 0 Receive Dropped Not Truncated Packets Counter Register(etherStatsDropEventsn) (PM0_RDRNTPn) */ 1729 1730 NETC_ETHSWT_IP_TX_ETH_OCTETS_COUNT = 0x1200U, /*!< Port MAC 0 Transmit Ethernet Octets Counter(etherStatsOctetsn) (PM0_TEOCTn) */ 1731 NETC_ETHSWT_IP_TX_OCTETS_COUNT = 0x1208U, /*!< Supported by pseudo port. Port MAC 0 Transmit Octets Counter Register(ifOutOctetsn) (PM0_TOCTn) */ 1732 NETC_ETHSWT_IP_TX_VALID_PAUSE_FRM_COUNT = 0x1218U, /*!< Port MAC 0 Transmit Valid Pause Frame Counter Register(aPAUSEMACCtrlFramesReceivedn) (PM0_TXPFn) */ 1733 NETC_ETHSWT_IP_TX_FRM_COUNT = 0x1220U, /*!< Port MAC 0 Transmit Frame Counter Register(aFramesTransmittedOKn) (PM0_TFRMn) */ 1734 NETC_ETHSWT_IP_TX_FRM_CHK_SEQUENCE_COUNT = 0x1228U, /*!< Port MAC 0 Transmit Frame Check Sequence Error Counter Register() (PM0_TFCSn) */ 1735 NETC_ETHSWT_IP_TX_VLAN_FRM_COUNT = 0x1230U, /*!< Port MAC 0 Transmit VLAN Frame Counter Register(VLANTransmittedOKn) (PM0_TVLANn) */ 1736 NETC_ETHSWT_IP_TX_FRM_ERROR_COUNT = 0x1238U, /*!< Port MAC 0 Transmit Frame Error Counter Register(ifOutErrorsn) (PM0_TERRn) */ 1737 NETC_ETHSWT_IP_TX_UNICAST_FRM_COUNT = 0x1240U, /*!< Supported by pseudo port. Port MAC 0 Transmit Unicast Frame Counter Register(ifOutUcastPktsn) (PM0_TUCAn) */ 1738 NETC_ETHSWT_IP_TX_MULTICAST_FRM_COUNT = 0x1248U, /*!< Supported by pseudo port. Port MAC 0 Transmit Multicast Frame Counter Register(ifOutMulticastPktsn) (PM0_TMCAn) */ 1739 NETC_ETHSWT_IP_TX_BROADCAST_FRM_COUNT = 0x1250U, /*!< Supported by pseudo port. Port MAC 0 Transmit Broadcast Frame Counter Register(ifOutBroadcastPktsn) (PM0_TBCAn) */ 1740 NETC_ETHSWT_IP_TX_PKTS_COUNT = 0x1260U, /*!< Port MAC 0 Transmit Packets Counter Register(etherStatsPktsn) (PM0_TPKTn) */ 1741 NETC_ETHSWT_IP_TX_UNDERSIZED_PKT_COUNT = 0x1268U, /*!< Port MAC 0 Transmit Undersized Packet Counter Register(etherStatsUndersizePktsn) (PM0_TUNDn) */ 1742 NETC_ETHSWT_IP_TX_64_OCTETS_PKT_COUNT = 0x1270U, /*!< Port MAC 0 Transmit 64-Octet Packet Counter Register (etherStatsPkts64OctetsN) (PM0_T64n) */ 1743 NETC_ETHSWT_IP_TX_127_OCTETS_PKT_COUNT = 0x1278U, /*!< Port MAC 0 Transmit 65 to 127-Octet Packet Counter Register (etherStatsPkts65to127OctetsN) (PM0_T127n) */ 1744 NETC_ETHSWT_IP_TX_255_OCTETS_PKT_COUNT = 0x1280U, /*!< Port MAC 0 Transmit 128 to 255-Octet Packet Counter Register (etherStatsPkts128to255OctetsN) (PM0_T255n) */ 1745 NETC_ETHSWT_IP_TX_511_OCTETS_PKT_COUNT = 0x1288U, /*!< Port MAC 0 Transmit 256 to 511-Octet Packet Counter Register (etherStatsPkts256to511OctetsN) (PM0_T511n) */ 1746 NETC_ETHSWT_IP_TX_1023_OCTETS_PKT_COUNT = 0x1290U, /*!< Port MAC 0 Transmit 512 to 1023-Octet Packet Counter Register (etherStatsPkts512to1023OctetsN) (PM0_T1023n) */ 1747 NETC_ETHSWT_IP_TX_1522_OCTETS_PKT_COUNT = 0x1298U, /*!< Port MAC 0 Transmit 1024 to 1522-Octet Packet Counter Register (etherStatsPkts1024to1522OctetsN) (PM0_T1522n) */ 1748 NETC_ETHSWT_IP_TX_1523_TOMAXOCTETS_PKT_COUNT = 0x12A0U, /*!< Port MAC 0 Transmit 1523 to TX_MTU-Octet Packet Counter Register (etherStatsPkts1523toMaxOctetsN) (PM0_T1523Xn) */ 1749 NETC_ETHSWT_IP_TX_CONTROL_PKT_COUNT = 0x12C0U, /*!< Port MAC 0 Transmit Control Packet Counter Register (PM0_TCNPn) */ 1750 NETC_ETHSWT_IP_TX_DEFERRED_PKT_COUNT = 0x12D0U, /*!< Port MAC 0 Transmit Deferred Packet Counter Register(aFramesWithDeferredXmissions) (PM0_TDFRn) */ 1751 NETC_ETHSWT_IP_TX_MULTIPLE_COLLISIONS_COUNT = 0x12D8U, /*!< Port MAC 0 Transmit Multiple Collisions Counter Register(aMultipleCollisionFrames) (PM0_TMCOLn) */ 1752 NETC_ETHSWT_IP_TX_SINGLE_COLLISION_COUNT = 0x12E0U, /*!< Port MAC 0 Transmit Single Collision Counter(aSingleCollisionFrames) Register (PM0_TSCOLn) */ 1753 NETC_ETHSWT_IP_TX_LATE_COLLISION_COUNT = 0x12E8U, /*!< Port MAC 0 Transmit Late Collision Counter(aLateCollisions) Register (PM0_TLCOLn) */ 1754 NETC_ETHSWT_IP_TX_EXCESSIVE_COLLISIONS_COUNT = 0x12F0U /*!< Port MAC 0 Transmit Excessive Collisions Counter Register (PM0_TECOLn) */ 1755 } Netc_EthSwt_Ip_SingleCounterType; 1756 1757 typedef enum { 1758 NETC_ETHSWT_IP_PPMROCR0 = 0x1080U, /*!< Port pseudo MAC receive octets counter PPMROCR0. The lower 32bits of the counter. */ 1759 NETC_ETHSWT_IP_PPMROCR1 = 0x1084U, /*!< Port pseudo MAC receive octets counter PPMROCR1. The upper 32bits of the counter. */ 1760 NETC_ETHSWT_IP_PPMRUFCR0 = 0x1088U, /*!< Port pseudo MAC receive unicast frame counter register PPMRUFCR0. The lower 32bits of the counter. */ 1761 NETC_ETHSWT_IP_PPMRUFCR1 = 0x108CU, /*!< Port pseudo MAC receive unicast frame counter register PPMRUFCR1. The upper 32bits of the counter. */ 1762 NETC_ETHSWT_IP_PPMRMFCR0 = 0x1090U, /*!< Port pseudo MAC receive multicast frame counter register PPMRMFCR0. The lower 32bits of the counter. */ 1763 NETC_ETHSWT_IP_PPMRMFCR1 = 0x1094U, /*!< Port pseudo MAC receive multicast frame counter register PPMRMFCR1. The upper 32bits of the counter. */ 1764 NETC_ETHSWT_IP_PPMRBFCR0 = 0x1098U, /*!< Port pseudo MAC receive broadcast frame counter register PPMRBFCR0. The lower 32bits of the counter. */ 1765 NETC_ETHSWT_IP_PPMRBFCR1 = 0x109CU, /*!< Port pseudo MAC receive broadcast frame counter register PPMRBFCR1. The upper 32bits of the counter. */ 1766 1767 NETC_ETHSWT_IP_PPMTOCR0 = 0x10C0U, /*!< Port pseudo MAC transmit octets counter PPMTOCR0. The lower 32bits of the counter. */ 1768 NETC_ETHSWT_IP_PPMTOCR1 = 0x10C4U, /*!< Port pseudo MAC transmit octets counter PPMTOCR1. The upper 32bits of the counter. */ 1769 NETC_ETHSWT_IP_PPMTUFCR0 = 0x10C8U, /*!< Port pseudo MAC transmit unicast frame counter register PPMTUFCR0. The lower 32bits of the counter. */ 1770 NETC_ETHSWT_IP_PPMTUFCR1 = 0x10CCU, /*!< Port pseudo MAC transmit unicast frame counter register PPMTUFCR1. The upper 32bits of the counter. */ 1771 NETC_ETHSWT_IP_PPMTMFCR0 = 0x10D0U, /*!< Port pseudo MAC transmit multicast frame counter register PPMTMFCR0. The lower 32bits of the counter. */ 1772 NETC_ETHSWT_IP_PPMTMFCR1 = 0x10D4U, /*!< Port pseudo MAC transmit multicast frame counter register PPMTMFCR1. The upper 32bits of the counter. */ 1773 NETC_ETHSWT_IP_PPMTBFCR0 = 0x10D8U, /*!< Port pseudo MAC transmit broadcast frame counter register PPMTBFCR0. The lower 32bits of the counter. */ 1774 NETC_ETHSWT_IP_PPMTBFCR1 = 0x10DCU, /*!< Port pseudo MAC transmit broadcast frame counter register PPMTBFCR1. The upper 32bits of the counter. */ 1775 } Netc_EthSwt_Ip_PseudoPortCounterType; 1776 1777 typedef uint64 Netc_EthSwt_Ip_CounterValueType; 1778 1779 /*! 1780 * @brief Action to be taken when the rate policy criteria defined for this EthSwtPortPolicer are met. 1781 */ 1782 typedef enum { 1783 NETC_ETHSWT_BLOCK_SOURCE, /*!< Eth Switch rate violation block source. */ 1784 NETC_ETHSWT_DROP_FRAME /*!< Eth Switch rate violation drop frame. */ 1785 } Netc_EthSwt_Ip_RateViolationActionType; 1786 1787 /*! 1788 * @brief How the message with a specific VLAN Id shall be handled. 1789 */ 1790 typedef enum { 1791 NETC_ETHSWT_NOT_SENT, /*!< Eth Switch vlan frame not sent. */ 1792 NETC_ETHSWT_SENT_TAGGED, /*!< Eth Switch vlan frame sent tagged. */ 1793 NETC_ETHSWT_SENT_UNTAGGED /*!< Eth Switch vlan frame sent untagged. */ 1794 } Netc_EthSwt_Ip_VlanHandlingType; 1795 1796 /*! 1797 * @brief Message priority the incoming message will be tagged with. 1798 */ 1799 typedef struct { 1800 uint8 EthSwtPriorityRegenerationIngressPriority; /*!< Message priority of the incoming message. */ 1801 uint8 EthSwtPriorityRegenerationRegeneratedPriority; /*!< Message priority the incoming message will be tagged with. */ 1802 } Netc_EthSwt_Ip_PriorityRegenerationType; 1803 1804 /*! 1805 * @brief Priority based traffic class assignment. 1806 */ 1807 typedef struct { 1808 uint8 EthSwtPriorityTrafficClassAssignmentTrafficClass[8U]; /*!< Traffic Class value. */ 1809 } Netc_EthSwt_Ip_PriorityTrafficClassAssignmentType; 1810 1811 /*! 1812 * @brief Rate Policing parameters. 1813 */ 1814 typedef struct { 1815 Netc_EthSwt_Ip_PriorityRegenerationType priorityRegeneration[8U]; /*!< Message priority the incoming message will be tagged with. */ 1816 uint8 EthSwtPortRatePolicedPriority; /*!< The priority which this rate policy shall be limited on. */ 1817 Netc_EthSwt_Ip_RateViolationActionType EthSwtPortRateViolationAction; /*!< Action to be taken when the rate policy criteria defined for this EthSwtPortPolicer are met. */ 1818 uint32 EthSwtPriorityTrafficClassAssignmentType[8U]; /*!< Message priority. */ 1819 } Netc_EthSwt_Ip_PortPolicerType; 1820 1821 /*! 1822 * @brief Port ingress description 1823 */ 1824 typedef struct { 1825 uint8 EthSwtPortIngressDefaultPriority; /*!< Default priority for ingress. */ 1826 uint16 EthSwtPortIngressDefaultVlan; /*!< Default VLAN for ingress. */ 1827 boolean SentUntaggedFrames; /* EthSwtPortVlanForwardingType for the default VLAN */ 1828 boolean portIngressAllowCutThroughFrames; /*!< Allow cut through frames */ 1829 boolean EthSwtPortIngressDropUntagged; /*!< Defines the ingress behavior for untagged frames. */ 1830 boolean EthSwtDropDoubleTagged; /*!< if a switch shall drop double tagged frames. */ 1831 boolean EthSwtPortIngressDropSingleTagged; /*!< if a switch shall drop single tagged frames. */ 1832 boolean EthSwtPortIngressDropPriorityTagged; /*!< if a switch shall drop priority tagged frames. */ 1833 uint16 EthSwtPortIngressVlanModification; /*!< Tagged all frames with this VLAN Id. */ 1834 uint8 EthSwtPortTrafficClassAssignment; /*!< Priority based traffic class assignment. */ 1835 Netc_EthSwt_Ip_PortPolicerType *policer; /*!< Rate Policing parameters. */ 1836 Netc_EthSwt_Ip_PriorityRegenerationType (*priorityRegeneration)[8U]; /*!< Priority of the incoming message. */ 1837 Netc_EthSwt_Ip_PriorityTrafficClassAssignmentType PriorityTrafficClassAssignment[8U]; /*!< Priority based traffic class assignment. */ 1838 boolean vlanEnable; /*!< Use the IVP and DR from the frame or use port default */ 1839 uint8 vlanDefaultIpv; /*!< Default for untaged frames or when vlan is disable */ 1840 uint8 vlanDefaultDr; /*!< Default for untaged frames or when vlan is disable */ 1841 uint8 vlanMappingProfile; /*!< Select the VLANIPV profile 0/1 using the PCP and DEI */ 1842 boolean vlanEnableIngressPcpToPcpMapping; /*!< If there is frame modification enable the PCP change */ 1843 uint8 vlanIngressPcpToPcpProfile; /*!< If there is frame modification and enable use this profile */ 1844 } Netc_EthSwt_Ip_PortIngressType; 1845 1846 /*! 1847 * @brief Defines the scheduler algorithm. 1848 */ 1849 typedef struct { 1850 uint32 EthSwtPortSchedulerPredecessorOrder; /*!< The order of the scheduler predecessors. */ 1851 } Netc_EthSwt_Ip_PortSchedulerType; 1852 1853 /*! 1854 * @brief Represents a Shaper in the egress port. 1855 */ 1856 typedef struct { 1857 /* To improve the speed of the init of the drivers, Bandwidth and hiCredit are calculated in the upper layes */ 1858 boolean EthSwtPortEgressCBShaperEnable; /*!< Enable the Credit-Based Shaper. */ 1859 uint32 EthSwtPortEgressCBShaperBandwidth; /*!< Bandwidth of the Credit-Based Shaper. Bandwidth = (idleSlope/portTxRate) * 100, Note: total CBS bandwidth on a port should be less the 75% */ 1860 uint32 EthSwtPortEgressHiCredit; /*!< HiCredit if the Credit-Based Shaper. (hiCredit on credit) = maxSizedFrame * Bandwidth * (enetClockFrequency / portTxRate) */ 1861 uint32 EthSwtPortMaxSizedFrame; /*!< Max Frame Size, should be less the 2000 bytes */ 1862 } Netc_EthSwt_Ip_PortShaperType; 1863 1864 /*! 1865 * @brief Port egress description 1866 */ 1867 typedef struct { 1868 Netc_EthSwt_Ip_PortSchedulerType *portScheduler; /*!< Defines the scheduler algorithm. */ 1869 Netc_EthSwt_Ip_PortShaperType (*portShaper)[8U]; /*!< Represents a Shaper in the egress port. */ 1870 boolean portEgressAllowCutThroughFrames; /*!< Allow cut through frames */ 1871 boolean updateEgressDr; /*!< If there is frame modification and enable DEI change */ 1872 uint8 (*vlanDrToDei)[NETC_ETHSWT_NUMBER_OF_DR]; /*!< If there is frame modification and enable map DR to DEI */ 1873 uint8 vlanMappingProfile; /*!< Select the VLANIPV profile 0/1 using the PCP and DEI */ 1874 boolean vlanEnableEgressPcpToPcpMapping; /*!< If there is frame modification enable the PCP change */ 1875 uint8 vlanEgressPcpToPcpProfile; /*!< If there is frame modification and enable use this profile */ 1876 uint8 portPPDUByteCountOverhead; /* PPDU Byte count overhead which includes IPG, SFD and Preamble. */ 1877 uint8 portMACSecByteCountOverhead; /* Number of bytes of overhead due to MACSec encapsulation */ 1878 uint32 portTimeGateSchedulingAdvanceTimeOffsetReg; /* This is the port time gate scheduling advance time offset register */ 1879 boolean portTimeAwareShaperEnable; /*!< If the data for time gate scheduling talbe is configured */ 1880 uint64 portEgressAdminBaseTime; /*!< Administrative Base Time */ 1881 uint32 portEgressAdminCycleTime; /*!< Administrative Cycle Time */ 1882 uint32 portEgressAdminCycleTimeExt; /*!< Administrative Cycle Time Extension */ 1883 uint8 numberOfGateControlListEntries; /*!< Number of entries in Administrative Gate Control list. */ 1884 Netc_EthSwt_Ip_GateEntryAdminControlListDataType (*TimeGateControlListEntries)[NETC_ETHSWT_MAX_NUMBER_OF_GATECONTROLLIST_ENTRIES]; /*!< Pointer to an array containing the gate control list for port. */ 1885 } Netc_EthSwt_Ip_PortEgressType; 1886 1887 /*! 1888 * @brief Port description for initalisation 1889 */ 1890 typedef struct { 1891 boolean EthSwtPortMacLayerPortEnable; /*!< enable/disable port mac layer */ 1892 Netc_EthSwt_Ip_PortEgressType *ePort; /*!< Configuration of one Ethernet Switch Port Egress behavior. */ 1893 Netc_EthSwt_Ip_PortIngressType *iPort; /*!< Configuration of one Ethernet Switch Port Ingress behavior. */ 1894 EthTrcv_BaudRateType EthSwtPortMacLayerSpeed; /**< Defines the baud rate of the MAC layer. */ 1895 Netc_EthSwt_Ip_PortDuplexType EthSwtPortMacLayerDuplexMode; /*!< Defines the duplex mode of switch mac layer duplex mode*/ 1896 Netc_EthSwt_Ip_XmiiModeType EthSwtPortPhysicalLayerType; /*!< Defines the physical layer type of this EthSwtPort. */ 1897 uint8 EthSwtPortMacAddresses[6U]; /*!< Default MAC address. */ 1898 uint16 EthSwtPortMaxDynamicEntries; /*!< Specifies for a given port, the maximium number of dynamic entries in the FDB table.*/ 1899 boolean EthSwtPortEnableMagicPacketDetection; /*!< Enable/Disable packet magic detection*/ 1900 boolean EthSwtPortTimeStampSupport; /*!< Activates egress time stamping. */ 1901 boolean EthSwtPortPruningEnable; /*!< A received frame is not allowed to be transmitted on same port it was recceived. */ 1902 boolean EthSwtPortLoopbackEnable; /*!< Enable loopback mode for current port */ 1903 boolean EthSwtPortDisallowMacStationMove; /*!< MAC station move disallowed.*/ 1904 } Netc_EthSwt_Ip_PortType; 1905 1906 /*! 1907 * @brief Configuration of one Ethernet Switch for initalisation 1908 */ 1909 typedef struct { 1910 Netc_EthSwt_Ip_MacLearningOptionType MacLearningOption; /*!< specifies the Mac learning mode */ 1911 Netc_EthSwt_Ip_MacForwardingOptionType MacForwardingOption; /*!< specifies the Mac forwarding option */ 1912 uint16 EthSwtMaxDynamicEntries; /*!< This field specifies the maximum number of dynamic entries allowed in the FDB table for the entire switch. A value of 0 implies no global switch limit imposed for dynamic entries.*/ 1913 uint16 EthSwtArlTableEntryTimeout; /*!< specifies the timeout in seconds for removing unused entries. */ 1914 boolean EthSwtEnableSharedLearning; /*!< Used to determine the FID when doing a lookup in the FDB table. 0: Independent VLAN learning: FID is set to to the VID assigned to the frame 1: Shared VLAN learning: Use the FID specified in this register */ 1915 uint16 EthSwtCustomVlanEtherType1; /*!< Custom VLAN */ 1916 uint16 EthSwtCustomVlanEtherType2; /*!< Custom VLAN */ 1917 Netc_EthSwt_Ip_PortType (*port)[NETC_ETHSWT_NUMBER_OF_PORTS]; /*!< Port description. */ 1918 #if (NETC_ETHSWT_NUMBER_OF_FDB_ENTRIES > 0U) 1919 uint8 NumberOfFdbEntries; /*!< Number of FDB entries. */ 1920 const Netc_EthSwt_Ip_FdbEntryType (*FdbEntries)[NETC_ETHSWT_NUMBER_OF_FDB_ENTRIES]; /*!< Pointer to an array containing the FDB configuration. */ 1921 #endif 1922 #if (NETC_ETHSWT_NUMBER_OF_VLANFILTER_ENTRIES > 0U) 1923 uint8 NumberOfVlanFilterEntries; /*!< Number of Vlan Filter entries. */ 1924 const Netc_EthSwt_Ip_VlanFilterEntryType (*VlanFilterEntries)[NETC_ETHSWT_NUMBER_OF_VLANFILTER_ENTRIES]; /*!< Pointer to an array containing the Vlan configuration. */ 1925 #endif 1926 uint8 (*vlanPcpDei2IpvProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_PCP_DEI]; /*!< Profiles for PCP_DEI to IPV ingress mapping. */ 1927 uint8 (*vlanPcpDei2DrProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_PCP_DEI]; /*!< Profiles for PCP_DEI to DR ingress mapping. */ 1928 uint8 (*vlanPcp2PcpProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_PCP]; /*!< Profiles for PCP to PCP frame modification. */ 1929 uint8 (*vlanIpvDr2PcpProfile)[NETC_ETHSWT_NUMBER_OF_PROFILES][NETC_ETHSWT_NUMBER_OF_IPV][NETC_ETHSWT_NUMBER_OF_DR]; /*!< Profiles for egress IPV/DR to PCP frame modification. */ 1930 uint32 netcClockFrequency; /*!< Netc system clock */ 1931 uint32 netcExternalClockFrequency; /*!< extern reference clock */ 1932 Netc_EthSwt_Ip_1588ClockSourceOptionType Timer1588ClkSrc; /*!< reference clock source for 1588 timer */ 1933 } Netc_EthSwt_Ip_ConfigType; 1934 1935 /** 1936 * @brief Type to request or obtain the mirroring state (enable/disable) for a particular Ethernet switch. 1937 * @implements Netc_EthSwt_Ip_SwitchMirrorStateType_enum 1938 */ 1939 typedef enum 1940 { 1941 NETC_ETHSWT_MIRROR_DISABLED = 0x0U, /*!< @brief switch mirroring disabled. */ 1942 NETC_ETHSWT_MIRROR_ENABLED = 0x1U /*!< @brief switch mirroring enabled. */ 1943 } Netc_EthSwt_Ip_SwitchMirrorStateType; 1944 1945 /** 1946 * @brief Switch Mirroring Mode Type 1947 */ 1948 typedef enum 1949 { 1950 NETC_ETHSWT_NO_VLAN_RETAGGING = 0x0U, /*!< @brief No VLAN retagging. */ 1951 NETC_ETHSWT_VLAN_RETAGGING = 0x1U, /*!< @brief VLAN retagging. */ 1952 NETC_ETHSWT_VLAN_DOUBLE_TAGGING = 0x2U /*!< @brief VLAN Double tagging. */ 1953 } Netc_EthSwt_Ip_SwitchMirroringModeType; 1954 1955 /** @brief The Netc_EthSwt_Ip_SwitchMirrorCfgType specify the mirror configuration which is set up per Ethernet switch. 1956 * @implements Netc_EthSwt_Ip_SwitchMirrorCfgType_struct 1957 * */ 1958 typedef struct 1959 { 1960 uint8 SrcMacAddrFilter[6U]; /*!< @brief Specifies the source MAC address [0..255,0..255,0..255,0..255,0..255,0..255] that should be mirrored. If set to 0,0,0,0,0,0, no source MAC address filtering shall take place. */ 1961 uint8 DstMacAddrFilter[6U]; /*!< @brief Specifies the destination MAC address [0..255,0..255,0..255,0..255,0..255,0..255] that should be mirrored. If set to 0,0,0,0,0,0, no destination MAC address filtering shall take place. */ 1962 uint16 VlanIdFilter; /*!< @brief Specifies the VLAN address 0..4094 that should be mirrored. If set to 65535, no VLAN filtering shall take place. */ 1963 uint32 TrafficDirectionIngressBitMask; /*!< @brief Specifies the bit mask of Ethernet switch ingress port traffic direction to be mirrored. The bit mask is calculated depending of the values of EthSwtPortIdx. (e.g. set EthSwtPortIdx == 2 => TrafficDirectionIngressBitMask = 0b0000 0000 0000 0000 0000 0000 0000 0100). 1964 0b0 == disable ingress port mirroring 0b1 == enable ingress port mirroring Example: TrafficDirectionIngressBitMask = 0b0000 0000 0000 0000 0000 0000 0000 0100 => Ingress traffic mirroring is enabled of Ethernet switch port with EthSwtPortIdx=2 */ 1965 uint8 CapturePortIdx; /*!< @brief Specifies the Ethernet switch port which capture the mirrored traffic */ 1966 uint16 VlanId; /*!< @brief Specifies the VLAN address 0..4094 which shall be used for re-tagging or double-tagging if MirroringMode is set to 0x01 (VLAN re-tagging) or 0x02 (VLAN double tagging). 1967 If the value is set to 65535, the value shall be ignored */ 1968 Netc_EthSwt_Ip_SwitchMirroringModeType MirroringMode; /*!< @brief specifies the mode how the mirrored traffic should be tagged : 0x00 == No VLAN retagging; 0x01 == VLAN retagging; 0x03 == VLAN Double tagging */ 1969 } Netc_EthSwt_Ip_SwitchMirrorCfgType; 1970 1971 /*================================================================================================== 1972 * GLOBAL VARIABLE DECLARATIONS 1973 ==================================================================================================*/ 1974 1975 /*================================================================================================== 1976 * FUNCTION PROTOTYPES 1977 ==================================================================================================*/ 1978 1979 #ifdef __cplusplus 1980 } 1981 #endif 1982 1983 /** @} */ 1984 1985 #endif /* NETC_ETHSWT_IP_TYPES_H */ 1986