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Searched defs:pll_mul (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.5.0/drivers/clock_control/
Dclock_stm32f1.c41 uint32_t pll_source, pll_mul, pll_div; in config_pll_sysclock() local
123 uint32_t pll_mul, pll_div; in config_pll2() local
Dclock_stm32f0_f3.c48 uint32_t pll_source, pll_mul, pll_div; in config_pll_sysclock() local
108 uint32_t pll_input_freq, pll_mul, pll_div; in get_pllout_frequency() local
Dclock_stm32l0_l1.c22 #define pll_mul(v) z_pll_mul(v) macro