pllDiv5En (definition) in projects: hal_nxp-3.6.0

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Searched defs:pllDiv5En (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
D	fsl_clock.h	`1895 bool pllDiv5En; /!< Enable Sys Pll1 divide-by-5 clock or not. / member`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
D	fsl_clock.h	`1895 bool pllDiv5En; /!< Enable Sys Pll1 divide-by-5 clock or not. / member`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
D	fsl_clock.h	`1895 bool pllDiv5En; /!< Enable Sys Pll1 divide-by-5 clock or not. / member`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
D	fsl_clock.h	`1861 bool pllDiv5En; /!< Enable Sys Pll1 divide-by-5 clock or not. / member`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
D	fsl_clock.h	`1895 bool pllDiv5En; /!< Enable Sys Pll1 divide-by-5 clock or not. / member`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
D	fsl_clock.h	`1895 bool pllDiv5En; /!< Enable Sys Pll1 divide-by-5 clock or not. / member`
/hal_nxp-3.6.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
D	fsl_clock.h	`1861 bool pllDiv5En; /!< Enable Sys Pll1 divide-by-5 clock or not. / member`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
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babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
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