1 /*
2 * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8 #include <string.h>
9
10 #include <arch_helpers.h>
11 #include <common/debug.h>
12 #include <common/desc_image_load.h>
13 #include <drivers/fwu/fwu.h>
14 #include <drivers/fwu/fwu_metadata.h>
15 #include <drivers/io/io_block.h>
16 #include <drivers/io/io_driver.h>
17 #include <drivers/io/io_fip.h>
18 #include <drivers/io/io_memmap.h>
19 #include <drivers/io/io_mtd.h>
20 #include <drivers/io/io_storage.h>
21 #include <drivers/mmc.h>
22 #include <drivers/partition/efi.h>
23 #include <drivers/partition/partition.h>
24 #include <drivers/raw_nand.h>
25 #include <drivers/spi_nand.h>
26 #include <drivers/spi_nor.h>
27 #include <drivers/st/io_mmc.h>
28 #include <drivers/st/stm32_fmc2_nand.h>
29 #include <drivers/st/stm32_qspi.h>
30 #include <drivers/st/stm32_sdmmc2.h>
31 #include <drivers/usb_device.h>
32 #include <lib/fconf/fconf.h>
33 #include <lib/mmio.h>
34 #include <lib/utils.h>
35 #include <plat/common/platform.h>
36 #include <tools_share/firmware_image_package.h>
37
38 #include <platform_def.h>
39 #include <stm32cubeprogrammer.h>
40 #include <stm32mp_fconf_getter.h>
41 #include <stm32mp_io_storage.h>
42 #include <usb_dfu.h>
43
44 /* IO devices */
45 uintptr_t fip_dev_handle;
46 uintptr_t storage_dev_handle;
47
48 static const io_dev_connector_t *fip_dev_con;
49
50 #if STM32MP_SDMMC || STM32MP_EMMC
51 static struct mmc_device_info mmc_info;
52
53 static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE);
54
55 static io_block_dev_spec_t mmc_block_dev_spec = {
56 /* It's used as temp buffer in block driver */
57 .buffer = {
58 .offset = (size_t)&block_buffer,
59 .length = MMC_BLOCK_SIZE,
60 },
61 .ops = {
62 .read = mmc_read_blocks,
63 .write = NULL,
64 },
65 .block_size = MMC_BLOCK_SIZE,
66 };
67
68 static const io_dev_connector_t *mmc_dev_con;
69 #endif /* STM32MP_SDMMC || STM32MP_EMMC */
70
71 #if STM32MP_SPI_NOR
72 static io_mtd_dev_spec_t spi_nor_dev_spec = {
73 .ops = {
74 .init = spi_nor_init,
75 .read = spi_nor_read,
76 },
77 };
78 #endif
79
80 #if STM32MP_RAW_NAND
81 static io_mtd_dev_spec_t nand_dev_spec = {
82 .ops = {
83 .init = nand_raw_init,
84 .read = nand_read,
85 .seek = nand_seek_bb
86 },
87 };
88
89 static const io_dev_connector_t *nand_dev_con;
90 #endif
91
92 #if STM32MP_SPI_NAND
93 static io_mtd_dev_spec_t spi_nand_dev_spec = {
94 .ops = {
95 .init = spi_nand_init,
96 .read = nand_read,
97 .seek = nand_seek_bb
98 },
99 };
100 #endif
101
102 #if STM32MP_SPI_NAND || STM32MP_SPI_NOR
103 static const io_dev_connector_t *spi_dev_con;
104 #endif
105
106 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
107 static const io_dev_connector_t *memmap_dev_con;
108 #endif
109
110 io_block_spec_t image_block_spec = {
111 .offset = 0U,
112 .length = 0U,
113 };
114
open_fip(const uintptr_t spec)115 int open_fip(const uintptr_t spec)
116 {
117 return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID);
118 }
119
open_storage(const uintptr_t spec)120 int open_storage(const uintptr_t spec)
121 {
122 return io_dev_init(storage_dev_handle, 0);
123 }
124
125 #if STM32MP_EMMC_BOOT
get_boot_part_fip_header(void)126 static uint32_t get_boot_part_fip_header(void)
127 {
128 io_block_spec_t emmc_boot_fip_block_spec = {
129 .offset = STM32MP_EMMC_BOOT_FIP_OFFSET,
130 .length = MMC_BLOCK_SIZE, /* We are interested only in first 4 bytes */
131 };
132 uint32_t magic = 0U;
133 int io_result;
134 size_t bytes_read;
135 uintptr_t fip_hdr_handle;
136
137 io_result = io_open(storage_dev_handle, (uintptr_t)&emmc_boot_fip_block_spec,
138 &fip_hdr_handle);
139 assert(io_result == 0);
140
141 io_result = io_read(fip_hdr_handle, (uintptr_t)&magic, sizeof(magic),
142 &bytes_read);
143 if ((io_result != 0) || (bytes_read != sizeof(magic))) {
144 panic();
145 }
146
147 io_close(fip_hdr_handle);
148
149 VERBOSE("%s: eMMC boot magic at offset 256K: %08x\n",
150 __func__, magic);
151
152 return magic;
153 }
154 #endif
155
print_boot_device(boot_api_context_t * boot_context)156 static void print_boot_device(boot_api_context_t *boot_context)
157 {
158 switch (boot_context->boot_interface_selected) {
159 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
160 INFO("Using SDMMC\n");
161 break;
162 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
163 INFO("Using EMMC\n");
164 break;
165 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
166 INFO("Using QSPI NOR\n");
167 break;
168 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
169 INFO("Using FMC NAND\n");
170 break;
171 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
172 INFO("Using SPI NAND\n");
173 break;
174 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
175 INFO("Using UART\n");
176 break;
177 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
178 INFO("Using USB\n");
179 break;
180 default:
181 ERROR("Boot interface %u not found\n",
182 boot_context->boot_interface_selected);
183 panic();
184 break;
185 }
186
187 if (boot_context->boot_interface_instance != 0U) {
188 INFO(" Instance %d\n", boot_context->boot_interface_instance);
189 }
190 }
191
192 #if STM32MP_SDMMC || STM32MP_EMMC
boot_mmc(enum mmc_device_type mmc_dev_type,uint16_t boot_interface_instance)193 static void boot_mmc(enum mmc_device_type mmc_dev_type,
194 uint16_t boot_interface_instance)
195 {
196 int io_result __unused;
197 struct stm32_sdmmc2_params params;
198
199 zeromem(¶ms, sizeof(struct stm32_sdmmc2_params));
200
201 mmc_info.mmc_dev_type = mmc_dev_type;
202
203 switch (boot_interface_instance) {
204 case 1:
205 params.reg_base = STM32MP_SDMMC1_BASE;
206 break;
207 case 2:
208 params.reg_base = STM32MP_SDMMC2_BASE;
209 break;
210 case 3:
211 params.reg_base = STM32MP_SDMMC3_BASE;
212 break;
213 default:
214 WARN("SDMMC instance not found, using default\n");
215 if (mmc_dev_type == MMC_IS_SD) {
216 params.reg_base = STM32MP_SDMMC1_BASE;
217 } else {
218 params.reg_base = STM32MP_SDMMC2_BASE;
219 }
220 break;
221 }
222
223 params.device_info = &mmc_info;
224 if (stm32_sdmmc2_mmc_init(¶ms) != 0) {
225 ERROR("SDMMC%u init failed\n", boot_interface_instance);
226 panic();
227 }
228
229 /* Open MMC as a block device to read FIP */
230 io_result = register_io_dev_block(&mmc_dev_con);
231 if (io_result != 0) {
232 panic();
233 }
234
235 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec,
236 &storage_dev_handle);
237 assert(io_result == 0);
238
239 #if STM32MP_EMMC_BOOT
240 if (mmc_dev_type == MMC_IS_EMMC) {
241 io_result = mmc_part_switch_current_boot();
242 assert(io_result == 0);
243
244 if (get_boot_part_fip_header() != TOC_HEADER_NAME) {
245 WARN("%s: Can't find FIP header on eMMC boot partition. Trying GPT\n",
246 __func__);
247 io_result = mmc_part_switch_user();
248 assert(io_result == 0);
249 return;
250 }
251
252 VERBOSE("%s: FIP header found on eMMC boot partition\n",
253 __func__);
254 image_block_spec.offset = STM32MP_EMMC_BOOT_FIP_OFFSET;
255 }
256 #endif
257 }
258 #endif /* STM32MP_SDMMC || STM32MP_EMMC */
259
260 #if STM32MP_SPI_NOR
boot_spi_nor(boot_api_context_t * boot_context)261 static void boot_spi_nor(boot_api_context_t *boot_context)
262 {
263 int io_result __unused;
264
265 io_result = stm32_qspi_init();
266 assert(io_result == 0);
267
268 io_result = register_io_dev_mtd(&spi_dev_con);
269 assert(io_result == 0);
270
271 /* Open connections to device */
272 io_result = io_dev_open(spi_dev_con,
273 (uintptr_t)&spi_nor_dev_spec,
274 &storage_dev_handle);
275 assert(io_result == 0);
276 }
277 #endif /* STM32MP_SPI_NOR */
278
279 #if STM32MP_RAW_NAND
boot_fmc2_nand(boot_api_context_t * boot_context)280 static void boot_fmc2_nand(boot_api_context_t *boot_context)
281 {
282 int io_result __unused;
283
284 io_result = stm32_fmc2_init();
285 assert(io_result == 0);
286
287 /* Register the IO device on this platform */
288 io_result = register_io_dev_mtd(&nand_dev_con);
289 assert(io_result == 0);
290
291 /* Open connections to device */
292 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec,
293 &storage_dev_handle);
294 assert(io_result == 0);
295 }
296 #endif /* STM32MP_RAW_NAND */
297
298 #if STM32MP_SPI_NAND
boot_spi_nand(boot_api_context_t * boot_context)299 static void boot_spi_nand(boot_api_context_t *boot_context)
300 {
301 int io_result __unused;
302
303 io_result = stm32_qspi_init();
304 assert(io_result == 0);
305
306 io_result = register_io_dev_mtd(&spi_dev_con);
307 assert(io_result == 0);
308
309 /* Open connections to device */
310 io_result = io_dev_open(spi_dev_con,
311 (uintptr_t)&spi_nand_dev_spec,
312 &storage_dev_handle);
313 assert(io_result == 0);
314 }
315 #endif /* STM32MP_SPI_NAND */
316
317 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
mmap_io_setup(void)318 static void mmap_io_setup(void)
319 {
320 int io_result __unused;
321
322 io_result = register_io_dev_memmap(&memmap_dev_con);
323 assert(io_result == 0);
324
325 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL,
326 &storage_dev_handle);
327 assert(io_result == 0);
328 }
329
330 #if STM32MP_UART_PROGRAMMER
stm32cubeprogrammer_uart(void)331 static void stm32cubeprogrammer_uart(void)
332 {
333 int ret __unused;
334 boot_api_context_t *boot_context =
335 (boot_api_context_t *)stm32mp_get_boot_ctx_address();
336 uintptr_t uart_base;
337
338 uart_base = get_uart_address(boot_context->boot_interface_instance);
339 ret = stm32cubeprog_uart_load(uart_base, DWL_BUFFER_BASE, DWL_BUFFER_SIZE);
340 assert(ret == 0);
341 }
342 #endif
343
344 #if STM32MP_USB_PROGRAMMER
stm32cubeprogrammer_usb(void)345 static void stm32cubeprogrammer_usb(void)
346 {
347 int ret __unused;
348 struct usb_handle *pdev;
349
350 /* Init USB on platform */
351 pdev = usb_dfu_plat_init();
352
353 ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE);
354 assert(ret == 0);
355 }
356 #endif
357 #endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */
358
359
stm32mp_io_setup(void)360 void stm32mp_io_setup(void)
361 {
362 int io_result __unused;
363 boot_api_context_t *boot_context =
364 (boot_api_context_t *)stm32mp_get_boot_ctx_address();
365
366 print_boot_device(boot_context);
367
368 if ((boot_context->boot_partition_used_toboot == 1U) ||
369 (boot_context->boot_partition_used_toboot == 2U)) {
370 INFO("Boot used partition fsbl%u\n",
371 boot_context->boot_partition_used_toboot);
372 }
373
374 io_result = register_io_dev_fip(&fip_dev_con);
375 assert(io_result == 0);
376
377 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL,
378 &fip_dev_handle);
379
380 switch (boot_context->boot_interface_selected) {
381 #if STM32MP_SDMMC
382 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
383 dmbsy();
384 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
385 break;
386 #endif
387 #if STM32MP_EMMC
388 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
389 dmbsy();
390 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
391 break;
392 #endif
393 #if STM32MP_SPI_NOR
394 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
395 dmbsy();
396 boot_spi_nor(boot_context);
397 break;
398 #endif
399 #if STM32MP_RAW_NAND
400 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
401 dmbsy();
402 boot_fmc2_nand(boot_context);
403 break;
404 #endif
405 #if STM32MP_SPI_NAND
406 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
407 dmbsy();
408 boot_spi_nand(boot_context);
409 break;
410 #endif
411 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
412 #if STM32MP_UART_PROGRAMMER
413 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
414 #endif
415 #if STM32MP_USB_PROGRAMMER
416 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
417 #endif
418 dmbsy();
419 mmap_io_setup();
420 break;
421 #endif
422
423 default:
424 ERROR("Boot interface %d not supported\n",
425 boot_context->boot_interface_selected);
426 panic();
427 break;
428 }
429 }
430
bl2_plat_handle_pre_image_load(unsigned int image_id)431 int bl2_plat_handle_pre_image_load(unsigned int image_id)
432 {
433 static bool gpt_init_done __unused;
434 uint16_t boot_itf = stm32mp_get_boot_itf_selected();
435
436 switch (boot_itf) {
437 #if STM32MP_SDMMC || STM32MP_EMMC
438 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
439 #if STM32MP_EMMC_BOOT
440 if (image_block_spec.offset == STM32MP_EMMC_BOOT_FIP_OFFSET) {
441 break;
442 }
443 #endif
444 /* fallthrough */
445 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
446 if (!gpt_init_done) {
447 /*
448 * With FWU Multi Bank feature enabled, the selection of
449 * the image to boot will be done by fwu_init calling the
450 * platform hook, plat_fwu_set_images_source.
451 */
452 #if !PSA_FWU_SUPPORT
453 const partition_entry_t *entry;
454
455 partition_init(GPT_IMAGE_ID);
456 entry = get_partition_entry(FIP_IMAGE_NAME);
457 if (entry == NULL) {
458 ERROR("Could NOT find the %s partition!\n",
459 FIP_IMAGE_NAME);
460 return -ENOENT;
461 }
462
463 image_block_spec.offset = entry->start;
464 image_block_spec.length = entry->length;
465 #endif
466 gpt_init_done = true;
467 } else {
468 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
469 assert(bl_mem_params != NULL);
470
471 mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base;
472 mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size;
473 }
474
475 break;
476 #endif
477
478 #if STM32MP_RAW_NAND || STM32MP_SPI_NAND
479 #if STM32MP_RAW_NAND
480 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
481 #endif
482 #if STM32MP_SPI_NAND
483 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
484 #endif
485 image_block_spec.offset = STM32MP_NAND_FIP_OFFSET;
486 break;
487 #endif
488
489 #if STM32MP_SPI_NOR
490 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
491 image_block_spec.offset = STM32MP_NOR_FIP_OFFSET;
492 break;
493 #endif
494
495 #if STM32MP_UART_PROGRAMMER
496 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
497 if (image_id == FW_CONFIG_ID) {
498 stm32cubeprogrammer_uart();
499 /* FIP loaded at DWL address */
500 image_block_spec.offset = DWL_BUFFER_BASE;
501 image_block_spec.length = DWL_BUFFER_SIZE;
502 }
503 break;
504 #endif
505 #if STM32MP_USB_PROGRAMMER
506 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
507 if (image_id == FW_CONFIG_ID) {
508 stm32cubeprogrammer_usb();
509 /* FIP loaded at DWL address */
510 image_block_spec.offset = DWL_BUFFER_BASE;
511 image_block_spec.length = DWL_BUFFER_SIZE;
512 }
513 break;
514 #endif
515
516 default:
517 ERROR("FIP Not found\n");
518 panic();
519 }
520
521 return 0;
522 }
523
524 /*
525 * Return an IO device handle and specification which can be used to access
526 * an image. Use this to enforce platform load policy.
527 */
plat_get_image_source(unsigned int image_id,uintptr_t * dev_handle,uintptr_t * image_spec)528 int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
529 uintptr_t *image_spec)
530 {
531 int rc;
532 const struct plat_io_policy *policy;
533
534 policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id);
535 rc = policy->check(policy->image_spec);
536 if (rc == 0) {
537 *image_spec = policy->image_spec;
538 *dev_handle = *(policy->dev_handle);
539 }
540
541 return rc;
542 }
543
544 #if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
545 /*
546 * In each boot in non-trial mode, we set the BKP register to
547 * FWU_MAX_TRIAL_REBOOT, and return the active_index from metadata.
548 *
549 * As long as the update agent didn't update the "accepted" field in metadata
550 * (i.e. we are in trial mode), we select the new active_index.
551 * To avoid infinite boot loop at trial boot we decrement a BKP register.
552 * If this counter is 0:
553 * - an unexpected TAMPER event raised (that resets the BKP registers to 0)
554 * - a power-off occurs before the update agent was able to update the
555 * "accepted' field
556 * - we already boot FWU_MAX_TRIAL_REBOOT times in trial mode.
557 * we select the previous_active_index.
558 */
559 #define INVALID_BOOT_IDX 0xFFFFFFFF
560
plat_fwu_get_boot_idx(void)561 uint32_t plat_fwu_get_boot_idx(void)
562 {
563 /*
564 * Select boot index and update boot counter only once per boot
565 * even if this function is called several times.
566 */
567 static uint32_t boot_idx = INVALID_BOOT_IDX;
568 const struct fwu_metadata *data;
569
570 data = fwu_get_metadata();
571
572 if (boot_idx == INVALID_BOOT_IDX) {
573 boot_idx = data->active_index;
574 if (fwu_is_trial_run_state()) {
575 if (stm32_get_and_dec_fwu_trial_boot_cnt() == 0U) {
576 WARN("Trial FWU fails %u times\n",
577 FWU_MAX_TRIAL_REBOOT);
578 boot_idx = data->previous_active_index;
579 }
580 } else {
581 stm32_set_max_fwu_trial_boot_cnt();
582 }
583 }
584
585 return boot_idx;
586 }
587
stm32_get_image_spec(const uuid_t * img_type_uuid)588 static void *stm32_get_image_spec(const uuid_t *img_type_uuid)
589 {
590 unsigned int i;
591
592 for (i = 0U; i < MAX_NUMBER_IDS; i++) {
593 if ((guidcmp(&policies[i].img_type_guid, img_type_uuid)) == 0) {
594 return (void *)policies[i].image_spec;
595 }
596 }
597
598 return NULL;
599 }
600
plat_fwu_set_images_source(const struct fwu_metadata * metadata)601 void plat_fwu_set_images_source(const struct fwu_metadata *metadata)
602 {
603 unsigned int i;
604 uint32_t boot_idx;
605 const partition_entry_t *entry;
606 const uuid_t *img_type_uuid, *img_uuid;
607 io_block_spec_t *image_spec;
608
609 boot_idx = plat_fwu_get_boot_idx();
610 assert(boot_idx < NR_OF_FW_BANKS);
611
612 for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
613 img_type_uuid = &metadata->img_entry[i].img_type_uuid;
614 image_spec = stm32_get_image_spec(img_type_uuid);
615 if (image_spec == NULL) {
616 ERROR("Unable to get image spec for the image in the metadata\n");
617 panic();
618 }
619
620 img_uuid =
621 &metadata->img_entry[i].img_props[boot_idx].img_uuid;
622
623 entry = get_partition_entry_by_uuid(img_uuid);
624 if (entry == NULL) {
625 ERROR("Unable to find the partition with the uuid mentioned in metadata\n");
626 panic();
627 }
628
629 image_spec->offset = entry->start;
630 image_spec->length = entry->length;
631 }
632 }
633
plat_set_image_source(unsigned int image_id,uintptr_t * handle,uintptr_t * image_spec,const char * part_name)634 static int plat_set_image_source(unsigned int image_id,
635 uintptr_t *handle,
636 uintptr_t *image_spec,
637 const char *part_name)
638 {
639 struct plat_io_policy *policy;
640 io_block_spec_t *spec;
641 const partition_entry_t *entry = get_partition_entry(part_name);
642
643 if (entry == NULL) {
644 ERROR("Unable to find the %s partition\n", part_name);
645 return -ENOENT;
646 }
647
648 policy = &policies[image_id];
649
650 spec = (io_block_spec_t *)policy->image_spec;
651 spec->offset = entry->start;
652 spec->length = entry->length;
653
654 *image_spec = policy->image_spec;
655 *handle = *policy->dev_handle;
656
657 return 0;
658 }
659
plat_fwu_set_metadata_image_source(unsigned int image_id,uintptr_t * handle,uintptr_t * image_spec)660 int plat_fwu_set_metadata_image_source(unsigned int image_id,
661 uintptr_t *handle,
662 uintptr_t *image_spec)
663 {
664 char *part_name;
665
666 assert((image_id == FWU_METADATA_IMAGE_ID) ||
667 (image_id == BKUP_FWU_METADATA_IMAGE_ID));
668
669 partition_init(GPT_IMAGE_ID);
670
671 if (image_id == FWU_METADATA_IMAGE_ID) {
672 part_name = METADATA_PART_1;
673 } else {
674 part_name = METADATA_PART_2;
675 }
676
677 return plat_set_image_source(image_id, handle, image_spec,
678 part_name);
679 }
680 #endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
681
