1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include "tmr.h"
22 #include "tmr_revb.h"
23 #include "tmr_common.h"
24 #include "stdbool.h"
25
MXC_TMR_Init(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg,bool init_pins,sys_map_t pin_sel)26 int MXC_TMR_Init(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg, bool init_pins, sys_map_t pin_sel)
27 {
28 uint8_t tmr_id;
29 uint8_t clockSource = MXC_TMR_CLK0;
30
31 if (cfg == NULL) {
32 return E_NULL_PTR;
33 }
34
35 tmr_id = MXC_TMR_GET_IDX(tmr);
36 MXC_ASSERT(tmr_id >= 0);
37
38 switch (cfg->clock) {
39 case MXC_TMR_ERFO_CLK:
40 if (tmr_id > 2) { // Timer 3 do not support this clock source
41 return E_NOT_SUPPORTED;
42 }
43
44 clockSource = MXC_TMR_CLK3;
45 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO);
46 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, ERFO_FREQ);
47 break;
48
49 case MXC_TMR_IBRO_CLK:
50 if (tmr_id > 2) { // Timer 3 do not support this clock source
51 return E_NOT_SUPPORTED;
52 }
53
54 clockSource = MXC_TMR_CLK2;
55 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO);
56 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, IBRO_FREQ);
57 break;
58
59 case MXC_TMR_ERTCO_CLK:
60 if (tmr_id < 3) { // Timers 0-2 do not support this clock source
61 return E_NOT_SUPPORTED;
62 }
63
64 clockSource = MXC_TMR_CLK2;
65 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERTCO);
66 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, ERTCO_FREQ);
67 break;
68
69 case MXC_TMR_INRO_CLK:
70 if (tmr_id < 3) { // Timers 0-2 do not support this clock source
71 return E_NOT_SUPPORTED;
72 }
73
74 clockSource = MXC_TMR_CLK3;
75 MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_INRO);
76 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, INRO_FREQ);
77 break;
78
79 case MXC_TMR_EXT_CLK:
80 if (tmr_id < 3) {
81 MXC_GPIO_Config(&gpio_cfg_hf_extclk);
82 } else {
83 MXC_GPIO_Config(&gpio_cfg_lp_extclk);
84 }
85
86 clockSource = MXC_TMR_CLK1;
87 break;
88
89 default:
90 MXC_TMR_RevB_SetClockSourceFreq((mxc_tmr_revb_regs_t *)tmr, PeripheralClock);
91 break;
92 }
93
94 #ifndef MSDK_NO_GPIO_CLK_INIT
95 //enable peripheral clock and configure gpio pins
96 switch (tmr_id) {
97 case 0:
98 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TMR0);
99 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR0);
100
101 if (init_pins) {
102 switch (pin_sel) {
103 case MAP_A:
104 MXC_GPIO_Config(&gpio_cfg_tmr0);
105 break;
106 case MAP_B:
107 MXC_GPIO_Config(&gpio_cfg_tmr0b);
108 break;
109 case MAP_C:
110 MXC_GPIO_Config(&gpio_cfg_tmr0c);
111 break;
112 default:
113 return E_BAD_PARAM;
114 }
115 }
116 break;
117
118 case 1:
119 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TMR1);
120 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR1);
121
122 if (init_pins) {
123 switch (pin_sel) {
124 case MAP_A:
125 MXC_GPIO_Config(&gpio_cfg_tmr1);
126 break;
127 case MAP_B:
128 MXC_GPIO_Config(&gpio_cfg_tmr1b);
129 break;
130 case MAP_C:
131 MXC_GPIO_Config(&gpio_cfg_tmr1c);
132 break;
133 default:
134 return E_BAD_PARAM;
135 }
136 }
137 break;
138
139 case 2:
140 MXC_SYS_Reset_Periph(MXC_SYS_RESET0_TMR2);
141 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR2);
142
143 if (init_pins) {
144 switch (pin_sel) {
145 case MAP_A:
146 MXC_GPIO_Config(&gpio_cfg_tmr2);
147 break;
148 case MAP_B:
149 MXC_GPIO_Config(&gpio_cfg_tmr2b);
150 break;
151 case MAP_C:
152 MXC_GPIO_Config(&gpio_cfg_tmr2c);
153 break;
154 default:
155 return E_BAD_PARAM;
156 }
157 }
158 break;
159
160 case 3:
161 MXC_SYS_Reset_Periph(MXC_SYS_RESET_TMR3);
162 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_TMR3);
163
164 if (init_pins) {
165 MXC_GPIO_Config(&gpio_cfg_tmr3);
166 }
167 break;
168
169 default:
170 return E_BAD_PARAM;
171 }
172 #else
173 (void)init_pins;
174 (void)pin_sel;
175 #endif
176
177 return MXC_TMR_RevB_Init((mxc_tmr_revb_regs_t *)tmr, cfg, clockSource);
178 }
179
MXC_TMR_Shutdown(mxc_tmr_regs_t * tmr)180 void MXC_TMR_Shutdown(mxc_tmr_regs_t *tmr)
181 {
182 MXC_ASSERT(MXC_TMR_GET_IDX(tmr) >= 0);
183
184 MXC_TMR_RevB_Shutdown((mxc_tmr_revb_regs_t *)tmr);
185
186 // System settigns
187 //diasble peripheral clock
188 if (tmr == MXC_TMR0) {
189 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR0);
190 }
191
192 if (tmr == MXC_TMR1) {
193 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR1);
194 }
195
196 if (tmr == MXC_TMR2) {
197 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR2);
198 }
199
200 if (tmr == MXC_TMR3) {
201 MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_TMR3);
202 }
203 }
204
MXC_TMR_Start(mxc_tmr_regs_t * tmr)205 void MXC_TMR_Start(mxc_tmr_regs_t *tmr)
206 {
207 MXC_TMR_RevB_Start((mxc_tmr_revb_regs_t *)tmr);
208 }
209
MXC_TMR_Stop(mxc_tmr_regs_t * tmr)210 void MXC_TMR_Stop(mxc_tmr_regs_t *tmr)
211 {
212 MXC_TMR_RevB_Stop((mxc_tmr_revb_regs_t *)tmr);
213 }
214
MXC_TMR_SetPWM(mxc_tmr_regs_t * tmr,uint32_t pwm)215 int MXC_TMR_SetPWM(mxc_tmr_regs_t *tmr, uint32_t pwm)
216 {
217 return MXC_TMR_RevB_SetPWM((mxc_tmr_revb_regs_t *)tmr, pwm);
218 }
219
MXC_TMR_GetCompare(mxc_tmr_regs_t * tmr)220 uint32_t MXC_TMR_GetCompare(mxc_tmr_regs_t *tmr)
221 {
222 return MXC_TMR_RevB_GetCompare((mxc_tmr_revb_regs_t *)tmr);
223 }
224
MXC_TMR_GetCapture(mxc_tmr_regs_t * tmr)225 uint32_t MXC_TMR_GetCapture(mxc_tmr_regs_t *tmr)
226 {
227 return MXC_TMR_RevB_GetCapture((mxc_tmr_revb_regs_t *)tmr);
228 }
229
MXC_TMR_GetPeriod(mxc_tmr_regs_t * tmr,mxc_tmr_clock_t clock,uint32_t prescalar,uint32_t frequency)230 uint32_t MXC_TMR_GetPeriod(mxc_tmr_regs_t *tmr, mxc_tmr_clock_t clock, uint32_t prescalar,
231 uint32_t frequency)
232 {
233 uint32_t clockFrequency = PeripheralClock;
234 uint8_t tmr_id = MXC_TMR_GET_IDX(tmr);
235
236 MXC_ASSERT(tmr_id >= 0);
237
238 if (tmr_id > 2) {
239 switch (clock) {
240 case MXC_TMR_APB_CLK:
241 clockFrequency = PeripheralClock / 4;
242 break;
243
244 case MXC_TMR_ERTCO_CLK:
245 clockFrequency = ERTCO_FREQ;
246 break;
247
248 case MXC_TMR_INRO_CLK:
249 clockFrequency = INRO_FREQ;
250 break;
251
252 default:
253 break;
254 }
255 } else {
256 switch (clock) {
257 case MXC_TMR_APB_CLK:
258 clockFrequency = PeripheralClock;
259 break;
260
261 case MXC_TMR_IBRO_CLK:
262 clockFrequency = IBRO_FREQ;
263 break;
264
265 case MXC_TMR_ERFO_CLK:
266 clockFrequency = ERFO_FREQ;
267 break;
268
269 default:
270 break;
271 }
272 }
273
274 return MXC_TMR_RevB_GetPeriod((mxc_tmr_revb_regs_t *)tmr, clockFrequency, prescalar, frequency);
275 }
276
MXC_TMR_GetCount(mxc_tmr_regs_t * tmr)277 uint32_t MXC_TMR_GetCount(mxc_tmr_regs_t *tmr)
278 {
279 return MXC_TMR_RevB_GetCount((mxc_tmr_revb_regs_t *)tmr);
280 }
281
MXC_TMR_ClearFlags(mxc_tmr_regs_t * tmr)282 void MXC_TMR_ClearFlags(mxc_tmr_regs_t *tmr)
283 {
284 MXC_TMR_RevB_ClearFlags((mxc_tmr_revb_regs_t *)tmr);
285 }
286
MXC_TMR_GetFlags(mxc_tmr_regs_t * tmr)287 uint32_t MXC_TMR_GetFlags(mxc_tmr_regs_t *tmr)
288 {
289 return MXC_TMR_RevB_GetFlags((mxc_tmr_revb_regs_t *)tmr);
290 }
291
MXC_TMR_EnableInt(mxc_tmr_regs_t * tmr)292 void MXC_TMR_EnableInt(mxc_tmr_regs_t *tmr)
293 {
294 MXC_TMR_RevB_EnableInt((mxc_tmr_revb_regs_t *)tmr);
295 }
296
MXC_TMR_DisableInt(mxc_tmr_regs_t * tmr)297 void MXC_TMR_DisableInt(mxc_tmr_regs_t *tmr)
298 {
299 MXC_TMR_RevB_DisableInt((mxc_tmr_revb_regs_t *)tmr);
300 }
301
MXC_TMR_EnableWakeup(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg)302 void MXC_TMR_EnableWakeup(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
303 {
304 MXC_TMR_RevB_EnableWakeup((mxc_tmr_revb_regs_t *)tmr, cfg);
305 }
306
MXC_TMR_DisableWakeup(mxc_tmr_regs_t * tmr,mxc_tmr_cfg_t * cfg)307 void MXC_TMR_DisableWakeup(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
308 {
309 MXC_TMR_RevB_DisableWakeup((mxc_tmr_revb_regs_t *)tmr, cfg);
310 }
311
MXC_TMR_SetCompare(mxc_tmr_regs_t * tmr,uint32_t cmp_cnt)312 void MXC_TMR_SetCompare(mxc_tmr_regs_t *tmr, uint32_t cmp_cnt)
313 {
314 MXC_TMR_RevB_SetCompare((mxc_tmr_revb_regs_t *)tmr, cmp_cnt);
315 }
316
MXC_TMR_SetCount(mxc_tmr_regs_t * tmr,uint32_t cnt)317 void MXC_TMR_SetCount(mxc_tmr_regs_t *tmr, uint32_t cnt)
318 {
319 MXC_TMR_RevB_SetCount((mxc_tmr_revb_regs_t *)tmr, cnt);
320 }
321
MXC_TMR_Delay(mxc_tmr_regs_t * tmr,uint32_t us)322 void MXC_TMR_Delay(mxc_tmr_regs_t *tmr, uint32_t us)
323 {
324 MXC_TMR_Common_Delay(tmr, us);
325 }
326
MXC_TMR_TO_Start(mxc_tmr_regs_t * tmr,uint32_t us)327 void MXC_TMR_TO_Start(mxc_tmr_regs_t *tmr, uint32_t us)
328 {
329 MXC_TMR_RevB_TO_Start((mxc_tmr_revb_regs_t *)tmr, us);
330 }
331
MXC_TMR_TO_Check(mxc_tmr_regs_t * tmr)332 int MXC_TMR_TO_Check(mxc_tmr_regs_t *tmr)
333 {
334 return MXC_TMR_Common_TO_Check(tmr);
335 }
336
MXC_TMR_TO_Stop(mxc_tmr_regs_t * tmr)337 void MXC_TMR_TO_Stop(mxc_tmr_regs_t *tmr)
338 {
339 MXC_TMR_Common_TO_Stop(tmr);
340 }
341
MXC_TMR_TO_Clear(mxc_tmr_regs_t * tmr)342 void MXC_TMR_TO_Clear(mxc_tmr_regs_t *tmr)
343 {
344 MXC_TMR_Common_TO_Clear(tmr);
345 }
346
MXC_TMR_TO_Elapsed(mxc_tmr_regs_t * tmr)347 unsigned int MXC_TMR_TO_Elapsed(mxc_tmr_regs_t *tmr)
348 {
349 return MXC_TMR_Common_TO_Elapsed(tmr);
350 }
351
MXC_TMR_TO_Remaining(mxc_tmr_regs_t * tmr)352 unsigned int MXC_TMR_TO_Remaining(mxc_tmr_regs_t *tmr)
353 {
354 return MXC_TMR_Common_TO_Remaining(tmr);
355 }
356
MXC_TMR_SW_Start(mxc_tmr_regs_t * tmr)357 void MXC_TMR_SW_Start(mxc_tmr_regs_t *tmr)
358 {
359 return MXC_TMR_Common_SW_Start(tmr);
360 }
361
MXC_TMR_SW_Stop(mxc_tmr_regs_t * tmr)362 unsigned int MXC_TMR_SW_Stop(mxc_tmr_regs_t *tmr)
363 {
364 return MXC_TMR_Common_SW_Stop(tmr);
365 }
366
MXC_TMR_GetTime(mxc_tmr_regs_t * tmr,uint32_t ticks,uint32_t * time,mxc_tmr_unit_t * units)367 int MXC_TMR_GetTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, mxc_tmr_unit_t *units)
368 {
369 return MXC_TMR_RevB_GetTime((mxc_tmr_revb_regs_t *)tmr, ticks, time, units);
370 }
371
MXC_TMR_GetTicks(mxc_tmr_regs_t * tmr,uint32_t time,mxc_tmr_unit_t units,uint32_t * ticks)372 int MXC_TMR_GetTicks(mxc_tmr_regs_t *tmr, uint32_t time, mxc_tmr_unit_t units, uint32_t *ticks)
373 {
374 return MXC_TMR_RevB_GetTicks((mxc_tmr_revb_regs_t *)tmr, time, units, ticks);
375 }
376
