1 /*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2017-2021 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_IEE_H_
10 #define _FSL_IEE_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup iee
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*@{*/
25 /*! @brief IEE driver version. Version 2.1.1.
26 *
27 * Current version: 2.1.1
28 *
29 * Change log:
30 * - Version 2.0.0
31 * - Initial version
32 * - Version 2.1.0
33 * - Add region lock function IEE_LockRegionConfig() and driver clock control
34 * - Version 2.1.1
35 * - Fixed MISRA issues.
36 */
37 #define FSL_IEE_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
38 /*@}*/
39
40 /*! @brief IEE region. */
41 typedef enum _iee_region
42 {
43 kIEE_Region0 = 0U, /*!< IEE region 0 */
44 kIEE_Region1 = 1U, /*!< IEE region 1 */
45 kIEE_Region2 = 2U, /*!< IEE region 2 */
46 kIEE_Region3 = 3U, /*!< IEE region 3 */
47 kIEE_Region4 = 4U, /*!< IEE region 4 */
48 kIEE_Region5 = 5U, /*!< IEE region 5 */
49 kIEE_Region6 = 6U, /*!< IEE region 6 */
50 kIEE_Region7 = 7U /*!< IEE region 7 */
51 } iee_region_t;
52
53 /*! @brief IEE AES enablement/bypass. */
54 typedef enum _iee_aes_bypass
55 {
56 kIEE_AesUseMdField = 0U, /*!< AES encryption/decryption enabled */
57 kIEE_AesBypass = 1U /*!< AES encryption/decryption bypass */
58 } iee_aes_bypass_t;
59
60 /*! @brief IEE AES mode. */
61 typedef enum _iee_aes_mode
62 {
63 kIEE_ModeNone = 0U, /*!< AES NONE mode */
64 kIEE_ModeAesXTS = 1U, /*!< AES XTS mode */
65 kIEE_ModeAesCTRWAddress = 2U, /*!< CTR w address binding mode */
66 kIEE_ModeAesCTRWOAddress = 3U, /*!< AES CTR w/o address binding mode */
67 kIEE_ModeAesCTRkeystream = 4U /*!< AES CTR keystream only */
68 } iee_aes_mode_t;
69
70 /*! @brief IEE AES key size. */
71 typedef enum _iee_aes_key_size
72 {
73 kIEE_AesCTR128XTS256 = 0U, /*!< AES 128 bits (CTR), 256 bits (XTS) */
74 kIEE_AesCTR256XTS512 = 1U /*!< AES 256 bits (CTR), 512 bits (XTS) */
75 } iee_aes_key_size_t;
76
77 /*! @brief IEE AES ke number. */
78 typedef enum _iee_aes_key_num
79 {
80 kIEE_AesKey1 = 1U, /*!< AES Key 1 */
81 kIEE_AesKey2 = 2U /*!< AES Key 2 */
82 } iee_aes_key_num_t;
83
84 /*! @brief IEE configuration structure. */
85 typedef struct _iee_config
86 {
87 iee_aes_bypass_t bypass; /*!< AES encryption/decryption bypass */
88 iee_aes_mode_t mode; /*!< AES mode */
89 iee_aes_key_size_t keySize; /*!< size of AES key */
90 uint32_t pageOffset; /*!< Offset to physical memory location from IEE start address */
91 } iee_config_t;
92
93 /*******************************************************************************
94 * API
95 ******************************************************************************/
96 #if defined(__cplusplus)
97 extern "C" {
98 #endif
99
100 /*!
101 * @brief Resets IEE module to factory default values.
102 *
103 * This function performs hardware reset of IEE module. Attributes and keys of all regions are cleared.
104 *
105 * @param base IEER peripheral address.
106 */
107 void IEE_Init(IEE_Type *base);
108
109 /*!
110 * @brief Loads default values to the IEE configuration structure.
111 *
112 * Loads default values to the IEE region configuration structure. The default values are as follows.
113 * @code
114 * config->bypass = kIEE_AesUseMdField;
115 * config->mode = kIEE_ModeNone;
116 * config->keySize = kIEE_AesCTR128XTS256;
117 * config->pageOffset = 0U;
118 * @endcode
119 *
120 * @param config Configuration for the selected IEE region.
121 */
122 void IEE_GetDefaultConfig(iee_config_t *config);
123
124 /*!
125 * @brief Sets the IEE module according to the configuration structure.
126 *
127 * This function configures IEE region according to configuration structure.
128 *
129 * @param base IEE peripheral address.
130 * @param region Selection of the IEE region to be configured.
131 * @param config Configuration for the selected IEE region.
132 */
133 void IEE_SetRegionConfig(IEE_Type *base, iee_region_t region, iee_config_t *config);
134
135 /*!
136 * @brief Sets the IEE module key.
137 *
138 * This function sets specified AES key for the given region.
139 *
140 * @param base IEE peripheral address.
141 * @param region Selection of the IEE region to be configured.
142 * @param keyNum Selection of AES KEY1 or KEY2.
143 * @param key AES key.
144 * @param keySize Size of AES key.
145 */
146 status_t IEE_SetRegionKey(
147 IEE_Type *base, iee_region_t region, iee_aes_key_num_t keyNum, const uint8_t *key, size_t keySize);
148
149 /*!
150 * @brief Computes IEE offset to be set for specifed memory location.
151 *
152 * This function calculates offset that must be set for IEE region to access physical memory location.
153 *
154 * @param addressIee Address of IEE peripheral.
155 * @param addressMemory Address of physical memory location.
156 */
IEE_GetOffset(uint32_t addressIee,uint32_t addressMemory)157 static inline uint32_t IEE_GetOffset(uint32_t addressIee, uint32_t addressMemory)
158 {
159 return (addressMemory - addressIee) >> 12;
160 }
161
162 /*!
163 * @brief Lock the IEE region configuration.
164 *
165 * This function locks IEE region registers for Key, Offset and Attribute.
166 * Only system reset can clear the Lock bit.
167 *
168 * @param base IEE peripheral address.
169 * @param region Selection of the IEE region to be locked.
170 */
171 void IEE_LockRegionConfig(IEE_Type *base, iee_region_t region);
172
173 #if defined(__cplusplus)
174 }
175 #endif
176
177 /*!
178 *@}
179 */
180
181 #endif /* _FSL_IEE_H_ */
182
